A 2.125 Gbaud 1.6Kω Transimpedance Preamplifier in 0.5Μm CMOS

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A 2.125 Gbaud 1.6kΩ Transimpedance

Preampliﬁer in 0.5µm CMOS

Sunderarajan S. Mohan

Thomas H. Lee

Center for Integrated Systems

Stanford University

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. OUTLINE

• Motivation

• Shunt-peaked Ampliﬁer

• Inductor Modeling and Optimization

• Circuit Layout and Measurement

• Summary

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. SYSTEM OVERVIEW

Var. gain Decision amp circuit

Digital Optical data Photo Pre- ﬁber amp diode AGC

Clock synthesizer

• Pre-amp design is critical • Challenge: CMOS implementation

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. CMOS VS.GAAS

Factor GaAs CMOS Performance Excellent Sufﬁcient for up to low GHz Integration Photodiode with Pre-amp Analog and Digital Cost High Low

• Photodiode in GaAs

• Flip-chip techniques can reduce parasitics at the GaAs to CMOS transition

• Parasitic coupling from digital to analog is a challenge for integration

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. TRANSIMPEDANCE AMPLIFIER

− A Cd Cg +

Photo Transimpedance diode ampliﬁer

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. 1 (A+1) A • ω3dB = = ≈ RinCin Rf (Cd+Cg) Rf (Cd+Cg) ω • AMAX = k T where (k ≈ 1) ω3dB

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. TRANSIMPEDANCE LIMIT

• R ≈ kωT f,MAX 2 ω3dB (Cd+Cg)

• Desire maximum Rf for sensitivity, stability and high gain

• Need to circumvent this limit

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. CIRCUMVENTING THE TRANSIMPEDANCE LIMIT

− A Cd Cg +

Photo Common-gate Shunt-peaked diode stage transimpedance stage

• Decouple photodiode from the transimpedance stage with common-gate stage • Increase gain-bandwidth product by shunt-peaking

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. SHUNT-PEAKED AMPLIFIER

Common Source Ampliﬁer Shunt-peaked Ampliﬁer

Vdd Vdd

R R vout vout

vin vin C C

• Bandwidth enhancement using zeros • No additional power dissipation

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. SMALL SIGNAL MODELS

Common Source Ampliﬁer Shunt-peaked Ampliﬁer

vout vout

gmvin gmvin RC L C

• One pole • One zero, two poles ( + ) • vout (ω)= gmR • vout (ω)= gm R jωL 1+ 2 vin jωRC vin 1+jωRC−ω LC

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. MAGNITUDE RESPONSE

1.1 1.0 0.9 0.8 0.7 No peaking 0.6 Optimum group delay Maximally flat 0.5 Maximum bandwidth 0.4 0 0.2 0.4 0.6 0.8 1.0 1.21.41.61.82.0 Normalized frequency

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. PHASE RESPONSE

0 −10 −20 −30 −40 −50 Phase −60 No peaking −70 Optimum group delay Maximally flat −80 Maximum bandwidth −90 00.20.40.60.81.01.21.41.61.82.0 Normalized frequency

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. FREQUENCY RESPONSE

vout • Two time constants: R τC = RC, τL = L/R gmvin • C Ratio determines performance: L τL L m = = 2 τC R C

Factor (m) Normalized ω3dB Response 0 1.00 No shunt peaking 0.32 1.60 Optimum group delay 0.41 1.72 Maximally ﬂat 0.71 1.85 Maximum bandwidth

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. ON-CHIP SHUNT PEAKING :PREVIOUS WORK

Bond-wire inductor Maximum Q on-chip V dd Vdd

Lbondwire L CL Rs Cbondpad R R vout vout vin vin Cd Cload Cd Cload Cg Cg

• Large Cbondpad • Large CL • Limited Lbondwire • Large area • Coupling issues • Limited L

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. ON-CHIP SHUNT PEAKING:NEW

Vdd • Work with inductor parasitics L C L • Rs is not an issue Rs (now part of load resistance)

• Inductor Q is not relevant (R − Rs) • Minimize area and C vout L

vin • L determined by Cd Cload R, Cload, CL and Cd Cg

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. MODELING CHALLENGE

• Simultaneous optimization of active and passive components • 3-D ﬁeld solvers are inconvenient { Numerically expensive and cumbersome { Good for veriﬁcation but not for design

• Scalable, analytical models { Design guidelines and explore trade-offs { Circuit design and optimization

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. INDUCTOR MODELING

Two port (without PGS) Cs L

L Rs port 1 port 2 CL = Cox + Cs Rs Cox Cox One port (with PGS) Rsi Csi Csi Rsi

substrate

• Simple expressions for Rs, Cox and Cs

• Patterned ground shield (PGS) eliminates Rsi and Csi • NEED simple, accurate expression for inductance!

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. CURRENT SHEET APPROACH

OD = (1 + ρ)AD w

s ρAD = nw +(n−1)s

• Reduce complexity by 4n2 • Use symmetry • Derive simple expression using GMD, AMD and AMSD

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. GMD, AMD AND AMSD

w w 2 2 −w w 2

ln (GMD) = ln |x1 + x2| =lnw−1.5 AMD = | + | = w x1 x2 3 w2 l I AMSD2 = ( + )2 = x1 x2 6

h i = µl ln 2l − 1+ AMD − AMSD2 L 2π GMD l 4l2 h i = µl ln 2l +05+ w − w2 2π w . 3l 24l2

x1 x2

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. INDUCTANCE EXPRESSSION

s w

• AD = 0.5(OD + ID) ID OD OD−ID • ρ = OD+ID

• ρAD = nw +(n−1)s

AD h i 2 • L = 2µn AD ln 2.067 +0.176ρ +0.125ρ2 π ρ

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. INDUCTANCE EXPRESSSION

100

80 Min Max L(nH) 0.170 60 OD(µm) 100 400 40 n 120 s/w 0.02 3 20 ρ 0.03 0.95

Inductors exceeding abs. error 0

% 01234567 % Absolute error

Veriﬁed by measurements (75) and 3-D ﬁeld solver simulations (19,000)

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. TRANSIMPEDANCE STAGE

V dd

L CL • Input current drive Rs

• Cascode stage (R − Rs) vout • On-chip shunt-peaking C C Rf d load • Feedback

i in Cin Cg

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. DESIGN METHODOLOGY

1. Design and optimize transimpedance stage without shunt peaking 2. Transistor current determines conductor width, w 3. Lithography sets spacing, s 4. Choose n and AD to realize desired L while minimizing parasitic capacitance and area

5. Increase transimpedance resistance, Rf

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. OPTIMIZATION VIA GEOMETRIC PROGRAMMING

• Simultaneous optimization of active and passive components • Global Optimum or Proof of Infeasibility

DAC99, Session 54.3

(June 24, 1999): Optimization of Inductor Circuits

via Geometric Programming Maria del Mar Hershenson, Sunderarajan S. Mohan

Stephen P. Boyd and Thomas H. Lee

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. EXPERIMENTAL VERIFICATION OF INDUCTOR

1000

800 real(ZL) measured

) • OD = 180µm real(ZL) predicted Ω imag(ZL) measured • w =3.2µm 600 imag(ZL) predicted • s =2.1µm 400 • n =11.75 Impedance ( 200 • Lmeas =20.5nH

• Lpred =20.3nH 0 0 0.5 1.0 1.5 2.0 2.5 3.0 Frequency (GHz)

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. COMMON-GATE STAGE

V dd • Decouple sensitive feedback node from external capacitances

• Realize higher transimpedance

• Extra power

• Additional noise terms

• Junction capacitances degrade noise

Photo Common-gate Shunt-peaked at high frequency diode stage transimpedance stage

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. DIFFERENTIAL PREAMPLIFIER

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. TRANSIMPEDANCE BANDWIDTH

1800

1600 ) Ω 1400

CPD = 100fF 1200 CPD = 300fF

Transmpedance ( C = 500fF 1000 PD CPD = 700fF 800 00.20.40.60.81.01.2 frequency (GHz)

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. INPUT REFERRED CURRENT NOISE DENSITY

40 γ =2/3 γ=4/3 30 γ=2 Hz

√ 20 / pA

0 0 0.5 1.0 1.5 2.0 frequency (GHz)

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. EYE DIAGRAM 1.6 Gb/s 2.1 Gb/s

25 120 20 15 80 10 40 5 0 0 mV −5 mV −10 −40 −15 −80 −20 −25 −120 6 2 6 4 6 6687072 6 06264666870 . . . ns...... ns . . .

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. PERFORMANCE SUMMARY

Transimpedance (small-signal) 1600Ω (differential) 800Ω (single-ended) Bandwidth (3dB) 1.2GHz Max. photodiode capacitance 0.6pF Max. input current 1.0mA Simulated input noise current 0.6µA Max. output voltage swing 1.0Vpp (differential) (50Ω load at each output) 0.5Vpp (single-ended) Power consumption 115mW (core) 110mW (50Ω driver) Die area 0.6mm2 Technology 0.5µm CMOS

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. CONTRIBUTIONS

• Shunt-peaking with optimized on-chip inductor

• Simple accurate expression for inductance

• Common-gate input stage

• CMOS implementation of differential preampliﬁer

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999. ACKNOWLEDGMENTS

IBM fellowship support Rockwell International Dr. Christopher Hull Dr. Paramjit Singh

Prof. L. Kazovsky and Dr. Allen Lu

Dr. C. Patrick Yue, Dr. Derek Shaeffer, Dr. Arvin Shahani Maria del Mar Hershenson and Dr. Ali Hajimiri

S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preampliﬁer in 0.5µm CMOS, ” CICC May 1999.