Analysis and Design of a Microphone Preamplifier for Mobile Applications

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Article Analysis and Design of a Microphone Preampliﬁer for Mobile Applications

Saemin Im and Sang-Gyu Park *

Department of Electronic Engineering, Hanyang University, Seoul 04763, Korea; [email protected] * Correspondence: [email protected]

Abstract: A design of an on-chip ac-coupling preamplifier for mobile applications is presented. A microphone preamplifier should have a large input impedance to mitigate the effective-gain reduction caused by the microphone’s non-zero output impedance. From a review of previously reported microphone preamplifier structures in terms of input impedance, feasibility of on-chip ac- coupling, and noise performance, we chose an inverting amplifier structure with capacitive feedback. In addition, to provide dc bias path, we used off-state MOSFET switches as pseudo-resistors of very large resistance in the giga-ohm range. The large resistance enables on-chip ac-coupling with sufficient noise performance. A fast start-up is achieved by turning-on the switch for a short period during the preamplifier start-up. The gain of the preamplifier can be programmed from 0 dB to 21 dB with 3 dB steps. A 2-stage pseudo-class-AB amplifier was adopted to reduce power consumption. The proposed preamplifier was implemented using a 28 nm CMOS process and achieves 107 dB dynamic range in a 20 kHz bandwidth under 0 dB gain setting and balanced differential input signal. The preamplifier dissipates a power of 270 µW with a 1.8 V supply.

Keywords: programmable-gain amplifier; low-noise amplifier; on-chip ac-coupling; microphone preamplifier

Citation: Im, S.; Park, S.-G. Analysis and Design of a Microphone Preamplifier for Mobile Applications. Electronics 2021, 10, 1624. https:// 1. Introduction doi.org/10.3390/electronics10141624 Recent advances of mobile audio devices such as true wireless stereos and cellular phones require microphone read-out integrated circuits (M-ROICs) with wide dynamic Academic Editor: Paolo Colantonio range (DR). Furthermore, the power consumption of the M-ROIC should be kept low to make the battery life acceptably long. Besides electrical performance, the silicon area Received: 28 May 2021 occupied by the M-ROIC and the area occupied on the printed circuit board (PCB) by the Accepted: 5 July 2021 silicon chip and auxiliary passive devices such as ac-coupling capacitors becomes more Published: 7 July 2021 critical for the mobile applications, because the number of the required audio recording channels is increasing to enhance the audio quality by techniques such as echo cancellation Publisher’s Note: MDPI stays neutral and environmental noise cancellation [1,2]. with regard to jurisdictional claims in A microphone is a small sensor device that produces electrical signals from sound published maps and institutional affil- pressure. The electrical signals should be converted into digital signals by an audio ADC iations. for the desired digital signal processing. However, the small amplitude of the microphone’s output signals, and the uncertain dc level of the output make it unpractical for a microphone to drive ADCs directly. Therefore, a preamplifier is usually used in an M-ROIC to handle such obstacle [3–8]. Copyright: © 2021 by the authors. Microphones have non-zero output resistance, which is usually in the kilo-ohms Licensee MDPI, Basel, Switzerland. range. This dictates that the preamplifier should have a large input impedance to avoid the This article is an open access article reduction of the effective gain. There are a variety of preamplifier structures that aim for distributed under the terms and different performances, and each of them has different drawbacks. For example, inverting conditions of the Creative Commons an amplifier with resistive feedback can achieve over 100 dB dynamic range (DR). However, Attribution (CC BY) license (https:// the required noise level for the SNR limits the input impedance of the preamplifier, which creativecommons.org/licenses/by/ leads to effective gain reduction [3–6]. Moreover, typical resistive feedback architectures 4.0/).

Electronics 2021, 10, 1624. https://doi.org/10.3390/electronics10141624 https://www.mdpi.com/journal/electronics Electronics 2021, 10, 1624 2 of 15

require large off-chip ac-coupling capacitors to obtain a lower cut-off frequency of less than 20 Hz, which is undesirable in mobile applications requiring a very small footprint. This paper presents a high performance programmable-gain microphone preamplifier with on-chip ac-coupling capacitors for driving an audio ADC. The preamplifier adopts an inverting architecture with capacitive feedback because of its large input impedance. Pseudo-resistors with very large resistance were employed to realize ac-coupling with on- chip capacitors of practical size. The proposed preamplifier was designed and fabricated in a 28 nm CMOS process. The designed preamplifier shows peak SNR of 107 dBA, peak SNDR of 95.5 dBA, DR of 107 dB, and the power consumption of 270 µW at 1.8 V supply voltage. The rest of this paper is organized as follows: In Section2, the optimum preamplifier architecture for the mobile applications is selected after reviewing previously reported architectures, and the method to implement very large resistance needed for on-chip ac- coupling is proposed. In Section3, detailed circuit level descriptions along with simulation results are presented. The measurement results of the fabricated chips are reported in Section4 and the conclusions are given in Section5.

2. Architecture 2.1. Target Specification A microphone produces electrical signals from the input sound pressure variations. The amplitude of the produced electrical signal for a given sound pressure depends on the sensitivity of the microphone. Typical electret condenser microphones (ECMs) or micro electromechanical systems (MEMS) microphones produce an output signal amplitude of about 70 mVpk at 100 dB sound pressure level [9–12]. If we assume that the maximum preamplifier output swing is 800 mVpk with 1.8 V supply, we can infer that the required gain for the preamplifier is about 21 dB. As already mentioned in the introduction, when choosing a preamplifier structure, the input impedance of the preamplifier should be taken into account. With a non-zero output impedance of the microphone, a small input impedance of the preamplifier lowers the effective gain of the preamplifier, leading to noise performance degradation. Figure1 shows a simplified block diagram of a microphone (in the solid box) and a preamplifier with the gain of G (in the dashed box). The Rout,mic, Rin,pre, and Vni,pre represent the output impedance of the microphone, the input impedance of the preamplifier, and the input-referred noise of the preamplifier, respectively. Then, the effective gain Geff of the preamplifier in Figure1 can be expressed as Rin,pre Ge f f = G. (1) Rout,mic + Rin,pre

From Equation (1), we observe that the non-zero Rout,mic lowers the effective gain of the preamplifier. To compensate the effective gain reduction, the preamplifier gain G should be increased. However, this leads to the increase of the output noise and reduction of SNR at the preamplifier output. For example, if the Rout,mic is 5 kΩ and the Rin,pre is 10 kΩ, then the effective gain is reduced by 3.5 dB. The reduced effective gain can be recovered by increasing G by 3.5 dB, which is accompanied by an 3.5 dB (= G × Vni,pre) increase of the preamplifier output noise. The discussion above shows that the input impedance of a preamplifier is an important parameter, and the architecture of the preamplifier should be selected carefully to get a large input impedance, while managing the trade-offs between various parameters such as DR and area occupation. Electronics 2021, 10, x FOR PEER REVIEW 3 of 15 Electronics 2021, 10, 1624 3 of 15

Figure 1. Block diagram of microphone and preampliﬁer.preamplifier.

InIn thethe nextnext sub-sections,sub-sections, we we compare compare and and analyze analyze previously previously reported reported architectures architectures of microphoneof microphone preamplifiers preamplifiers in terms in terms of input of input impedance, impedance, SNR, SNR, and and the feasibilitythe feasibility of on-chip of on- ac-couplingchip ac-coupling to select to selectan optimal an optimal preamplifier preamplifier architecture. architecture. The target TheA-weighted target A-weighted SNR is 100SNR dB is when100 dB the when preamplifier the preamplifier gain is 0 gain dB. Sinceis 0 dB. the Since output the impedance output impedance of the microphone of the mi- variescrophone from varies several from hundred several ohmshundred to severalohms to kilo several ohms kilo [9– ohms12], the [9– microphone’s12], the microphone’s output impedanceoutput impedance is assumed is assumed to be 5 ktoΩ be. To 5 keepkΩ. To the keep effective the effective gain reduction gain reduction less than less 1%, than the target1%, the input target impedance input impedance for the preamplifier for the preamplifier is determined is determined to be larger to be than larger 500 kthanΩ. The500 targetkΩ. The specifications target specifications for the microphone for the microphone preamplifier preamplifier are summarized are summarized in Table1 .in Table 1.

TableTable 1.1. TargetTarget speciﬁcations.specifications.

ParameterParameter Target Target Specification Speciﬁcation SupplySupply Voltage Voltage 1.8 1.8V V BandwidthBandwidth 20 Hz 20– Hz–2020 kHz kHz PeakPeak SNR SNR (A- (A-weighted)weighted) >100 >100 dB dB InputInput impedance impedance >500 >500 kΩ k Ω

2.2. Resistive Feedback Architecture Figure2 2aa shows shows an an inverting inverting amplifier amplifier with with resistive resistive feedback feedback [ [33––66].]. TheThe gaingain ofof thethe R R G −R R amplifieramplifier isis setset byby thethe ratioratio ofof resistorsresistors R11 andand R22 (G = −R2/2R/1) and1) and the the input input impedance impedance of of it is R . Then, the output noise of the preamplifier from the thermal noise of resistors it is R1. Then,1 the output noise of the preamplifier from the thermal noise of resistors can canbe expressed be expressed by by 2 Vn,out = 8kBTR1G(G + 1) fB, (2) , = 8( + 1), (2) where kB, T, and fB represent the Boltzmann constant, absolute temperature, and the where kB, T, and fB represent the Boltzmann constant, absolute temperature, and the band- bandwidth, respectively. If the maximum amplifier output swing is 800 mVpk,diff, to obtain awidth, 100 dB respectively. SNR, the output If the maximum noise should amplifier be smaller output than swing 3.2 ×is 10800−11 mVVpk,diff2. If, weto obtain apply a this 100 dB SNR, the output noise should be smaller than 3.2 × 10−11 V2. If we apply this to Equation to Equation (2), then for a 100 dB A-weighted SNR over fB = 20 kHz with a gain of 0 dB (2), then for a 100 dB A-weighted SNR over fB = 20 kHz with a gain of 0 dB (R1 = R2), we (R1 = R2), we find that the maximum R1 is 32.5 kΩ. The cut-off frequency of the ac-coupling find that the maximum R1 is 32.5 kΩ. The cut-off frequency of the ac-coupling high-pass high-pass filter in the circuit of Figure2a is 1/(2 πR1CAC). For the 20 Hz cut-off frequency filter in the circuit of Figure 2a is 1/(2πR1CAC). For the 20 Hz cut-off frequency with R1 = with R1 = 32.5 kΩ, CAC should be 330 nF. This capacitance is too large to be integrated on the silicon.32.5 kΩ, From CAC should this, we be can330 nF. determine This capacitance that it is difficult is too large to achieve to be integrated a low-noise on performance the silicon. andFrom on-chip this, we ac-coupling can determine at the that same it is timedifficult when to invertingachieve a low the- amplifiernoise performance architecture and with on- resistivechip ac-coupling feedback. at Moreover,the same time when when the inverting output resistance the amplifier of the architecture microphone with is 5 resistive kΩ, for afeedback. small R1 Moreover,of 32.5 kΩ when, the amplifierthe output suffers resistance from of a the substantial microphone gain is reduction 5 kΩ, for a of small 1.3 dB. R1 Noteof 32.5 that kΩR, 1the= 32.5amplifier kΩ was suffers obtained from assuming a substantial noise-less gain reduction OTA. To accommodateof 1.3 dB. Note the that noise R1 = of32.5 a practicalkΩ was obtained OTA, R1 assumingshould be nois madee-less even OTA. smaller, To accommodate which would the exacerbate noise of a the practical input impedanceOTA, R1 should and thebe made capacitance even smaller, size issues. which would exacerbate the input impedance and the capacitance size issues.

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(a) (b)

FigureFigure 2. 2. ArchitectureArchitecture of of ( (aa)) resistive resistive inverting inverting preamplifier preampliﬁer and ( b) resistive non-invertingnon-inverting preampliﬁer.preamplifier.

Figure2 2bb shows shows the the non-inverting non-inverting preamplifier preamplifier architecture architecture with with resistive resistive feedback feedback [ 7]. [7].The The ac-coupling ac-coupling circuit, circuit, which which consists consists of ofR1 R, R1, 2,R2and, andC CACAC atat thethe inputinput of the preamplifier,fier, determines the input common mode levellevel (ICML) and the input impedance of the preamplifier.preamplifier. The The gain gain of of this this amplifier amplifier can can be be easily easily calculated calculated to to be be G G= 1= + 1 R +3/R43./ InR 4con-. In trastcontrast to the to inverting the inverting architecture, architecture, the non the-inverting non-inverting architecture architecture can achieve can achieve both a both large a inputlarge inputimpedance impedance and a high and aSN highR if SNRthe size if the of sizepassive of passive devices devices in the preamplifier in the preamplifier is chosen is properly.chosen properly. For the Forlarge the swing large swingrange, range,R1 = R2R can1 = Rbe2 canused be, and used, the and corresponding the corresponding input impedanceinput impedance of the ofpreamplifier the preamplifier is R1/2. is FromR1/2. this, From we this, can we determine can determine that R1that = 1 MRΩ1 = (= 1R M2) Ωis required(=R2) is required to get the to 500 get kΩ the input 500 kimpedance.Ω input impedance. With R1 = 1 With MΩ, RC1AC= = 115.9 MΩ nF, C isAC required= 15.9 for nF the is 20required Hz cut-off for frequency. the 20 Hz cut-off frequency. The total output noise of the non non-inverting-inverting architecture from the thermal noise of the resistors can be expressed as Z 20k 2 2 d f Vn,out=8=kB8T(R1(||R|2|)G) ++88kBTR4((G−−11)()(22G−−11))fB.. (3)(3) , 20 + 2 1 1 [+2π[2(R(1||R||2)C)ACf]] The firstfirst andand thethe second second term term of of the the right-hand right-hand side side of Equation of Equation (3) represent (3) represent the noise the noisefrom thefrom ac-coupling the ac-coupling circuit circuit and the and preamplifier the preamplifier itself, itself, respectively. respectively. From From the first the term, first term,we can we notice can thatnotice the that larger the the largerCAC theis, the CAC lower is, the the lower noise the from noise the ac-couplingfrom the ac circuit-coupling can circuitbe. With canR 1be.= WithR2 = R 11 M = ΩR2 and= 1 M theΩ andCAC the= 15.9 CAC nF,= 15.9 the nF, noise the noise from from the the ac-coupling ac-coupling circuit circuit isis −14 2 estimated to to be be 3.37 3.37 ×× 1010−14 V2 V(A-(A-weighted),weighted), which which is only is only 0.1% 0.1% of the of total the noise total noisebudget budget for the 100for dB the SNR 100 and dB SNRis negligible. and is negligible.Therefore, the Therefore, noise is mainly the noise from the is mainly second term from of the Equation second (3) term and theof Equationnoise of the (3) operational and the noise transconductance of the operational amplifier transconductance (OTA), which is not amplifier included (OTA),in Equation which (3). Theseis not noises included are inindependent Equation (3).from These input noisescoupling are and independent can be made from to satisfy input the coupling 100 dB andSNR can re- be made to satisfy the 100 dB SNR requirement by choosing a small R and designing a low quirement by choosing a small R4 and designing a low noise OTA. In other4 words, in the non- invertingnoise OTA. structure, In other satisfying words, in the the input non-inverting resistance structure, requirement satisfying and the the SNR input requirement resistance requirement and the SNR requirement can be separated from each other. Still, C = 15.9 nF can be separated from each other. Still, CAC = 15.9 nF is too large to be integratedAC in a silicon.is too Therefore, large to be we integrated conclude in that a silicon. it is difficult Therefore, to design we conclude a preamplifier that it iswith difficult resistive to design feed- backa preamplifier that satisfies with the resistive noise performance, feedback that large satisfies input impedance, the noise performance, and the on-chip large ac input-cou- plingimpedance, feasibility and simultaneously. the on-chip ac-coupling feasibility simultaneously. 2.3. Capacitive Feedback Architecture 2.3. Capacitive Feedback Architecture Figure3 shows the inverting amplifier architectures with capacitive feedback [ 8,13,14]. Figure 3 shows the inverting amplifier architectures with capacitive feedback [8,13,14]. The input impedance of the both architectures is 1/(2πfC1), which can be very large in The input impedance of the both architectures is 1/(2πfC1), which can be very large in the the audio band (f < 20 kHz) for a small capacitor. For example, for C1 = 1 pF, the input

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Electronics 2021, 10, 1624 5 of 15 audio band (f < 20 kHz) for a small capacitor. For example, for C1 = 1 pF, the input impedance at 20 kHz is about 8.0 MΩ, which becomes 800 kΩ for C1 = 10 pF. We observe that, to make the input impedance larger than 500 kΩ, C1 should be smaller than 16 pF. impedance at 20 kHz is about 8.0 MΩ, which becomes 800 kΩ for C1 = 10 pF. We observe The difference between the structures of Figure 3a,b is the location of the RAC, which that, to make the input impedance larger than 500 kΩ, C1 should be smaller than 16 pF. sets the input common-mode level of the OTAs. In Figure 3a, RAC are between the input The difference between the structures of Figure3a,b is the location of the R , which and the output terminals of the OTA and functions as a feedback resistor. In thisAC scheme, sets the input common-mode level of the OTAs. In Figure3a, RAC are between the input the ICML of the OTA becomes the same as the output common-mode level (OCML) of the and the output terminals of the OTA and functions as a feedback resistor. In this scheme, OTA due to the unity gain feedback at dc. In Figure 3b, RAC are between the virtual ground the ICML of the OTA becomes the same as the output common-mode level (OCML) of the node at the OTA input and Vcmi. By placing RAC there, the ICML of the OTA is set at Vcmi OTA due to the unity gain feedback at dc. In Figure3b, RAC are between the virtual ground because no current flows through RAC. node at the OTA input and Vcmi. By placing RAC there, the ICML of the OTA is set at Vcmi because no current ﬂows through RAC.

(a) (b)

FigureFigure 3.3. Architecture ofof capacitivecapacitive preampliﬁer preamplifier with with (a ()a the) theR ACRACplaced placed between between the the input input terminal terminal and and output output terminal terminal of of the OTA and (b) the RAC placed at the virtual ground of the OTA. the OTA and (b) the RAC placed at the virtual ground of the OTA.

The in-bandin-band output noise from the thermal noisenoise ofof thethe resistorsresistors ofof FigureFigure3 3,b,b are are 1 = 8 Z 20k 1 , (4) V ,2 = k TR d f n,out 8 B AC 1 + (2)2 , (4) 20 1 + (2πRACC2 f ) and and Z 20k 1 2 1 Vn,out,= 8=kB8TRAC d f ,, (5)(5) (2)2 20 (2πRACC2 f ) Figure4 4 shows shows thethe A-weightedA-weighted outputoutput noisenoise powerpower calculatedcalculated usingusing (4)(4) andand (5)(5) asas aa function of RAC when the gain is 0 dB for several values of C1 (=C2). The upper triangles function of RAC when the gain is 0 dB for several values of C1 (=C2). The upper triangles and the lower triangles represent the noise from (4) and (5), (5), respectively. respectively. Solid lines, dash dash-- dot lines, and dash-dot-dot lines represent the noise power for C1 of 1 pF, 10 pF and 100 dot lines, and dash-dot-dot lines represent the noise power for C1 of 1 pF, 10 pF and 100 pF, 1 −×12 −212 respectively.pF, respectively. The The horizontal horizontal dashed-line dashed- representsline represents the noise the noise power power of N1 of= 3.2N =× 3.210 10V , 2 whichV , which corresponds corresponds to 10% to 10% of the of totalthe total noise noise budget budget for 100 for dB100 SNR. dB SNR. If the If noise the noise from fromRAC isRAC limited is limited to 10%, to 10%, then then most most of of the the noise noise budget budget can can be be allocated allocated to to the the OTA,OTA, whichwhich isis advantageous for a low-powerlow-power design. In Figure 44,, wewe observeobserve that,that, althoughalthough thethe noisenoise powers fromfrom (4)(4) and and (5) (5) are are different different when whenRAC RACis is small, small, they they are are essentially essentially identical identical in the in targetthe target region region below below the horizontal the horizontal line. From line. Figure From 4 Figure, we can 4, determine we can determine that the required that the RrequiredAC for the RAC noise for the power noise to power be smaller to be than smallerN1 are than 1.38 N1 T areΩ, 13.81.38 GTΩΩ, 13.8 and 138GΩ, M andΩ for 138C MΩ1 of 1for pF, C1 10 of pF 1 pF, and 10 100 pF pF,and respectively. 100 pF, respectively. The lower cut-offcut-off frequencyfrequency of of the the amplifier amplifier of of Figure Figure3 a 3a is is1/(2 1/(2ππRRACACCC22),), which which corresponds to 0.12 Hz, 1. 1.22 Hz Hz,, and and 12 12 Hz, Hz, for for CC11 ofof 1 1 pF, pF, 10 10 pF pF and and 100 100 pF, pF, respectively. The lowerlower cut-offcut-off frequencyfrequency of of the the amplfier amplfier of of Figure Figure3b 3b is 1/(is 1/(AAopop·2∙2ππRRACACCC22),), wherewhere AAopop isis the open-loopopen-loop gain of the OTA. This cut-offcut-off frequency is smaller than that of the amplifieramplifier of Figure 33aa byby a factor of AAopop. This. This reduction reduction can can be behelpful helpful if the if the cut cut-off-off frequency frequency of the of theamplifier amplifier of Figure of Figure 3a is3 atoo is toohigh, high, especially especially when when we need we need to use to small use small resistance resistance resis- resistors.tors. However, However, we note we that note the that use theof small use ofresistance small resistance requires the requires use of the large use capacitors of large capacitors from the noise requirement, which would increase the silicon area and lower the input impedance.

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from the noise requirement, which would increase the silicon area and lower the input

Electronics 2021, 10, 1624 impedance.from the noise requirement, which would increase the silicon area and lower the input6 of 15 impedance.

Figure 4. Output noise from (4) and (5) versus RAC with several C1 (= C2).

Figure 4. Output noise from (4) and (5) versus RAC withwith several several CC11 (=(= CC2).2 ). We have observed that amplifiers of both Figure 3a,b can satisfy the input resistance, SNR andWe haveon-chip observed ac-coupling that amplifiers amplifiers feasibility of requirements. both Figure 33a a,bFrom,b cancan the satisfysatisfy capacitor thethe inputinput area resistance,resistance,and input impedanceSNR and on on-chip point-chip ofac ac-coupling -view,coupling (C1 =feasibility 1 pF and requirements. RAC = 1.38 TΩ) Fromor (C 1the = 10 capacitor pF and R areaAC = and 13.8 input GΩ) combinationsimpedanceimpedance pointpoint seem ofof to view,view, be the ( C(C1 1best= = 11 pF pFchoices. and andR RAC However,AC= = 1.381.38 TT ΩΩ)they) oror require ((CC11 == 10 the pFpF andrealizationand RRACAC = 13.8 of huge G Ω)Ω) resistance.combinations The seem seem resistance to to be the is too best large choices. to to However, be implemented they require on-chip the realization with conventional of huge resistorsresistance. such The The as resistancepolysilicon resistance is is resistors. too too large large Therefore, to to be implementedimplementedwe have to find on-chipon other-chip ways with to conventionalconventional implement largeresistors resistance. such as polysilicon resistors. Therefore, we have to find find other ways to implement largelargeA resistance. very large resistance can be obtained by using MOSFETs in sub-threshold or off states.A Figure very largelarge 5a shows resistanceresistance a pseudo can can be be- obtainedresistor obtained consisting by usingby using MOSFETs of MOSFETs two diod in sub-threshold ein-connected sub-threshold orMOSFETs off or states. off [13states.Figure–15]. 5Figure aIn shows the 5acircuit, a shows pseudo-resistor if Va2 −pseudo V1 < 2V consisting-resistorth, where consisting ofVth two is the diode-connected thresholdof two diod voltagee- MOSFETsconnected of the MOSFETs, [MOSFETs13–15]. In the circuit, if V − V < 2V , where V is the threshold voltage of the MOSFETs, the the[13 –MOSFETs15]. In the are circuit,2 in the 1if offV2 -−state thV1 < and2Vth ,the where thpseudo Vth isresistor the threshold produces voltage a very of large the resistance.MOSFETs, WetheMOSFETs MOSFETscan easily are inareachieve the in off-statethe resistance off-state and andfrom the the pseudo several pseudo resistor giga resistor-ohms produces produces to several a very a veryhundred large large resistance. gigaresistance.-ohms We usingWecan can easily MOSFETs easily achieve achieve of resistance a small resistance area. from Iffrom several we severalapply giga-ohms these giga -pseudoohms to several to-resistors several hundred hundredto the giga-ohms preamplifier giga- usingohms withusingMOSFETs capacitive MOSFETs of a feedback, small of a area.small an Ifonarea. we-chip If apply weac- couplingapply these these pseudo-resistors of the pseudo preamplifier-resistors to theinput to preamplifier the can preamplifier be realized. with withcapacitive capacitive feedback, feedback, an on-chip an on-chip ac-coupling ac-coupling of the of preamplifier the preamplifier input input can becan realized. be realized.

(a) (b) (a) (b) FigureFigure 5. 5. ((aa)) A A pseudo pseudo-resistor-resistor consisting consisting of of two two diode diode connected connected MOSFETs MOSFETs,, ( (bb)) a a MOSFET MOSFET switch switch as a pseudo-resistor. Figureas a pseudo-resistor. 5. (a) A pseudo-resistor consisting of two diode connected MOSFETs, (b) a MOSFET switch as a pseudo-resistor. WhenWhen designing designing a a capacitive capacitive feedback feedback amplifier ampliﬁer with with ac ac-coupling,-coupling, one one more more thing to to considerconsiderWhen is is thedesigning the start start-up-up a capacitivetime. time. In In the the feedback circuit, circuit, aamplifier a very very small small with cut cut-off ac-off-coupling, freq frequencyuency one implies implies more thing a a very very to longconsiderlong time time is constant, constant, the start which- whichup time. can can In lead lead the to tocircuit, a a long long a start start-upvery- upsmall time. cut Adopting Adopting-off frequency the the pseudo pseudo-resistor implies-resistor a very oflongof Figure Figure time 5 5aconstant,a leadsleads toto which thethe increaseincrease can lead ofof to thethe a long start-upstart start-up timetime-up time. becausebecause Adopting ofof highhigh the impedanceimpedance pseudo-resistor atat thethe ofOTA Figure input. 5a Thisleads can to bethe resolved increase byof usingthe start MOSFET-up time switches because in of the high off impedance state as resistors, at the which is shown in Figure5b. During a normal operation of the preampliﬁer, the MOSFET switch is in the off state (Vctrl = VDD) and produces very large resistance. However, when

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the preamplifier starts up, the MOSFET switch is turned on (Vctrl = 0) for a short period and enables quick establishment of the bias condition. In this section, we conclude that the capacitive feedback architecture is better than the resistive feedback one in terms of the input impedance and the noise performance. Moreover, on-chip ac-coupling can be easily obtained with sufficient noise performance by adopting pseudo-resistors in the capacitive feedback architecture. Because huge resis- tances can be easily realized using the pseudo-resistors, the advantage of the structure of Figure3b of the scaled-down cut-off frequency becomes less significant in our design. Furthermore, the structure of Figure3b requires the generation of stable Vcmi. Consider- ing these factors, we chose the capacitive feedback architecture of Figure3a where the resistors were implemented by pseudo-resistors of Figure5b as the architecture for our microphone preamplifier. In the next section, we describe the detailed circuit-level design and simulation results.

3. Circuit Level Design Figure6a shows the architecture of the proposed microphone preamplifier. The switches are off during the normal operation of the preamplifier (Vctrl = 0), and they are turned on for a short period of time during the start-up (Vctrl = VDD). To reduce the nonlinear characteristics of the switches, the switches are realized as CMOS transmission gates, where the NMOS and PMOS have same size of W/L = 0.25 µm/0.15 µm. It can also reduce the charge injection when the switches are being turned off. In this preamplifier, the gain is determined by C1/C2. Figure6b shows the array of capacitors, out of which we select certain sub capacitors to get a desired C2. When designing the switching of sub capacitors, we need to consider the preamplifier output change at the gain-switching moment. If the output voltage does not change instantaneously to the new value that is proper for the new gain, this will lead to an offset in the differential output. Although this offset is eventually removed by the charge flow through RAC, it takes a very long time because of very large RAC. In the proposed scheme shown in Figure6b, the top plates of the sub-capacitors (C2i) are always connected to the virtual ground (i.e., OTA input), while the bottom plates are switched between the preamplifier output node and the common-mode voltage. When the preamplifier gain is increased, the bottom plates of the selected sub capacitors are switched from the output to the common-mode voltage. Then, the charge stored in those capacitors moves to the capacitors whose bottom plate is still connected to the output node. This increases the output voltage to the level which is proper for the new gain. When the gain is lowered, the bottom plates of the selected sub capacitors are switched from the common-mode voltage to the output voltage. Then, the charge redistribution between the sub capacitors instantaneously lowers the output voltage to the level proper for the new gain. Note that before the switching, the capacitor whose bottom plate is switched from the common-mode output to the output node was fully discharged. Figure7 shows the simulated resistance of the pseudo-resistor. One of the terminals is connected to the common mode voltage of 0.9 V and the voltage of the other terminal is swept from 0 V to 1.8 V. A concern when using pseudo-resistors is the variation of the resistance. Therefore, we repeated simulations at three process corners (TT, FF, SS) and three temperatures (T = 25 ◦C, 27 ◦C, 85 ◦C). From Figure7, we observe that in the off-state the resistance is about 250 GΩ regardless of the corner condition or the temperature, while it is affected by the conditions in the on-state or the sub-threshold range. We attribute this to the limitation of the PDK. Having admitted the limitation, we can still confirm that the resistance stays larger than 10 GΩ for 0.3 V < V < 1.6 V. Note that in the region where we become concerned about low resistance of the pseudo-resistor, the simulation results correctly predict corner-condition-and-temperature dependency. As mentioned above, when the voltage is between 0.6 V and 1.4 V, the resistance is about 250 GΩ. From the noise power discussion in the previous section, we observed that this value of resistance along −12 2 with C1 = 10 pF could be used to limit the noise power to below N1 = 3.2 × 10 V , which Electronics 2021, 10, x FOR PEER REVIEW 8 of 15 Electronics 2021, 10, x FOR PEER REVIEW 8 of 15

the voltage is between 0.6 V and 1.4 V, the resistance is about 250 GΩ. From the noise the voltage is between 0.6 V and 1.4 V, the resistance is about 250 GΩ. From the noise power discussion in the previous section, we observed that this value of resistance along Electronics 2021, 10, 1624 power discussion in the previous section, we observed that this value of resistance along8 of 15 with C1 = 10 pF could be used to limit the noise power to below N1 = 3.2 × 10−12 V2, which with C1 = 10 pF could be used to limit the noise power to below N1 = 3.2 × 10−12 V2, which is 10% of the total noise budget. However, we also note that 250 GΩ is not large enough is 10% of the total noise budget. However, we also note that 250 GΩ is not large enough isto 10% be used of the with total C1 noise = 1 pF budget. to satisfy However, the same we noise also noterequirement. that 250 G Ω is not large enough to to be used with C1 = 1 pF to satisfy the same noise requirement. be usedThe with preamplifierC = 1 pF gain to satisfy is programmable the same noise from requirement. 0 dB to 21 dB with 3 dB steps. To keep The preamplifier1 gain is programmable from 0 dB to 21 dB with 3 dB steps. To keep the inputThe preampliﬁer impedance constant gain is programmable for all gain settings, from 0C dB1 was to 21fixed dB at with 10 pF 3 dB and steps. C2 was To made keep the input impedance constant for all gain settings, C1 was fixed at 10 pF and C2 was made theprogrammable input impedance by selecting constant the for desired all gain capacitor settings, fromC was capacitor ﬁxed at arrays. 10 pF and C was made programmable by selecting the desired capacitor from1 capacitor arrays. 2 programmable by selecting the desired capacitor from capacitor arrays.

(a) (b) (a) (b) Figure 6. (a) Architecture of the proposed microphone preamplifier and (b) schematic diagram of the capacitor array for Figure 6. (a) Architecture of the proposed microphone preamplifier and (b) schematic diagram of the capacitor array for FigureC2. 6. (a) Architecture of the proposed microphone preampliﬁer and (b) schematic diagram of the capacitor array for C2. C2.

FigureFigure 7.7. Resistance ofof thethe transmission gategate switchswitch inin thethe offoff statestate simulatedsimulated atat threethree processprocess cornerscorners Figure 7. Resistance of the transmission gate switch in the off state simulated at three process corners (TT,(TT, SS, SS, FF) FF) and and three three temperatures temperatures (LT (LT = =− −25 ◦°CC,, RT = 27 °C◦C,, HT HT = = 85 85 °C◦C).). (TT, SS, FF) and three temperatures (LT = −25 °C, RT = 27 °C, HT = 85 °C). ItIt is is important important to to select select a proper a proper OTA OTA architecture architecture to achieve to achieve the desired the desired performance. perfor- It is important to select a proper OTA architecture to achieve the desired perfor- Formance. example, For example, a telescopic a telescopic architecture architecture can be selected can be whenselected a high when gain a high OTA gain is required. OTA is mance. For example, a telescopic architecture can be selected when a high gain OTA is Ifrequired. the supply If the voltage supply is voltage low, an is OTA low, with an OTA current with source current level source shifting level shifting technique technique [16] or required. If the supply voltage is low, an OTA with current source level shifting technique an[16] OTA or an with OTA an with active an load active with load cross-coupled with cross-coupled bulk [17 bulk] can [17] be selected.can be selected. In our work,In our [16] or an OTA with an active load with cross-coupled bulk [17] can be selected. In our wework, adopted we adopted a two-stage a two pseudo-stage pseudo class-AB class OTA-AB to OTA realize to realize a power a power efﬁcient efficient low noise low OTA.noise work, we adopted a two-stage pseudo class-AB OTA to realize a power efficient low noise FigureOTA. 8Figure shows 8 theshows schematic the schematic diagram diagram of the OTA of the used OTA in this used work. in this The work. OCML The of OCML the ﬁrst of OTA. Figure 8 shows the schematic diagram of the OTA used in this work. The OCML of stagethe first is stabilized stage is stabilized by the resistor by theR1 .resistor A large R resistance1. A large of resistanceR1 = 1 M Ωofis R used1 = 1 M toΩ prevent is used the to the first stage is stabilized by the resistor R1. A large resistance of R1 = 1 MΩ is used to open-loopprevent the gain open reduction.-loop gain The reduction. OCML of The the OTAOCML is stabilizedof the OTA by is a common-modestabilized by a common feedback- prevent the open-loop gain reduction. The OCML of the OTA is stabilized by a common- (CMFB) circuit employing a simple differential pair. The bias current IB was copied from the reference current that was generated by a conventional constant-gm circuit. Figure9 shows the AC simulation result of the OTA with the 10 kΩ load resistance. From the simulation, ◦ we observe that the loop gain and the phase margin are 73.4 dB and 61 , respectively. Electronics 2021, 10, x FOR PEER REVIEW 9 of 15 Electronics 2021, 10, x FOR PEER REVIEW 9 of 15

mode feedback (CMFB) circuit employing a simple differential pair. The bias current IB Electronics 2021, 10, 1624 9 of 15 was modecopied feedback from the (CMFB) reference circuit current employing that was a generatedsimple differential by a conventional pair. The biasconstant current-gm I B was copied from the reference current that was generated by a conventional constant-gm circuit. Figure 9 shows the AC simulation result of the OTA with the 10 kΩ load resistance. circuit. Figure 9 shows the AC simulation result of the OTA with the 10 kΩ load resistance. From the simulation, we observe that the loop gain and the phase margin are 73.4 dB and TheFrom size the of simulation, the devices we in observe the OTA that isthe listed loop gain in Table and 2the. Tophase reduce margin the are flicker 73.4 dB noise, and we 61°, respectively. The size of the devices in the OTA is listed in Table 2. To reduce the used61°, large respectively input transistors. The size of (W the1/ Ldevices1 = 1664 in µthem/3 OTA um) is andlisted to in minimize Table 2. To the reduce thermal the noise, flicker noise, we used large input transistors (W1/L1 = 1664 μm/3 um) and to minimize the gmflicker2/gm1 noise,was made we used small. large Note input that transistors the large (WM1/1Land1 = 1664M2 μlowerm/3 um) the and bandwidth to minimize of thethe OTA thermal noise, gm2/gm1 was made small. Note that the large M1 and M2 lower the bandwidth duethermal to its largenoise, parasiticgm2/gm1 was capacitances made small. Note at the that output the large nodes M1 ofand the M2 first lower stage. the bandwidth However, the of the OTA due to its large parasitic capacitances at the output nodes of the first stage. largeof the trans-conductance OTA due to its large of the parasitic OTA required capacitances for a at good the output SNR already nodes of leads the tofirst a unity-gainstage. However, the large trans-conductance of the OTA required for a good SNR already leads bandwidthHowever, muchthe large larger trans than-conductance the 20-kHz of the bandwidth OTA required of a microphone for a good SNR amplifier. already Therefore,leads to a unity-gain bandwidth much larger than the 20-kHz bandwidth of a microphone am- theto large a unity parasitic-gain bandwidth capacitance much does larger not than become the 20 a- problemkHz bandwidth in our design.of a microphone amplifier. Therefore, the large parasitic capacitance does not become a problem in our design. plifier.The Therefore, simulated the A-weighted large parasitic input-referred capacitance noisedoes not of thebecome OTA a inproblem the signal in our bandwidth design. of The Thesimulated simulated A-weighted A-weighted input input−12-referred-referred2 noise noise of ofthe the OTA OTA in inthe the signal signal bandwidth bandwidth 20 Hz < f < 20 kHz was 1.3 × 10−12 2 V , where the contribution by the thermal noise and of 20 Hz < f < 20 kHz was 1.3 × 10 V−12, w2here the contribution by the thermal noise and theof flicker 20 Hz noise< f < 20 were kHz 40%was 1.3 and × 60%,10 V respectively., where the contribution All transistors by the operate thermal in thenoise saturation and the flickerthe flicker noise noise were were 40% 40% and and 60%, 60%, respectively. respectively. All All transistors transistors operate operate in in the the saturation saturation region except for M1, which operates in the weak inversion region because of its large W/L regionregion except except for Mfor1, Mwhich1, which operates operates in the in the weak weak inversion inversion region region because because of of its its large large W W/L/ L ratio to obtain a large gm1. ratioratio to obtain to obtain a large a large gm1. gm1.

Figure 8. Schematic diagram of the OTA. FigureFigure 8. Schematic 8. Schematic diagram diagram of the of OTA the OTA..

80 80 60 60 40 40 20 20 Magnitude (dB) Magnitude

Magnitude (dB) Magnitude 0 0

0 0 -50 -50 -100 -100 -150 Phase (Deg.) Phase -150 Phase (Deg.) Phase -200 -200 1 10 100 1k 10k 100k 1M 10M 100M 1 10 100 1k Frequency10k 100k (Hz) 1M 10M 100M Frequency (Hz)

Figure 9. AC simulation results of designed OTA. FigureFigure 9. AC 9. AC simulation simulation results results of designed of designed OTA OTA.. Table 2. Size of the devices for the OTA. TableTable 2. 2.SizeSize of ofthe the devices devices for forthe theOTA OTA.. Device Size Device Size Device Size Device Size Device Size Device Size DeviceM 0 414Size μ m/1 μm DeviceM 4 8Size μm /6 μm DeviceRC1 Size11 k Ω M0 MM01 4141664 μ414m/ 1μµ mμm/1m/3 μmµm M4 M5 M4 8300 μm μ/6m μ/1.5m8 µμm/6m µRmCC1 C1 RC111 4k ΩpF 11 kΩ M1 MM12 1664800 μ1664m μm/3µ μm/m/320 μmµ m MM5 6 =M7M 3005 75 μm μ/m1.5/1.5300 μm μµm m/1.5 CµCmR1 C2 CC1 4 6pF k Ω 4 pF M µ µ M M µ µ R M2 M23 800 μm16800 /μ20m m/20μm/6 μ m mM6 =MR71 6 =75 7μm/11.5 M 75μΩm m/1.5 RmCC2 C2 C26 10kΩ pF 6 kΩ M3 16 µm/6 µm R1 1 MΩ CC2 10 pF M3 16 μm/6 μm R1 1 MΩ CC2 10 pF

The AC noise simulations of the pre-amplifier indicates that the total output noise −11 2 is 2.2 × 10 V (A-weighted) when the preamplifier gain is 0 dB. Of the total noise, the thermal noise and flicker noise contribution are 1.2 × 10−11 V2 and 0.96 × 10−12 V2, respectively. This corresponds to an A-weighted SNR of 101.6 dB. The noise from the pseudo-resistor is less than 1% of the total noise. Figure 10 shows the output spectrum Electronics 2021, 10, x FOR PEER REVIEW 10 of 15

The AC noise simulations of the pre-amplifier indicates that the total output noise is Electronics 2021, 10, 1624 2.2 × 10−11 V2 (A-weighted) when the preamplifier gain is 0 dB. Of the total noise, the ther-10 of 15 mal noise and flicker noise contribution are 1.2 × 10−11 V2 and 0.96 × 10−12 V2, respectively. This corresponds to an A-weighted SNR of 101.6 dB. The noise from the pseudo-resistor isobtained less than from 1% of the the transient total noise. noise Figure simulation 10 shows of the output proposed spectrum preamplifier obtained with from the the gain of transient0 dB with noise a 4.3 simulation kHz, 800 of mV thepk,diff proposedbalanced preamplifier input signal. with Fromthe gain the of result, 0 dB with we obtain a 4.3 the kHz,SNR 800 and mV SNDRpk,diff balanced of 101.4 dBinput (A-weighted) signal. From and the 94.7result, dB we (A-weighted), obtain the SNR respectively. and SNDR of 101.4 FiguredB (A-weighted) 11 shows and the results94.7 dB of(A the-weighted), transient respectively. simulations of the preamplifier to observe the start-upFigure 11 behavior. shows the The results supply of the voltage transient is ramped simulations up from of the 0 Vpreamplifier to 1.8 V with to aobserve rising time theof 1startµs at-upt =behavior. 10 s. When The the supply switches voltage stay is offramped and behave up from as 0 pseudo-resistors, V to 1.8 V with a the rising settling timeof the of OTA1 μs inputat t = 10 nodes s. When is very the slow,switches and stay the requiredoff and behave settling as timepseudo was-resistors, tens of seconds.the settlingHowever, of the if the OTA switch input is nodes turned is on,very the slow, input and node the required voltage ofsettling the OTA time is was stabilized tens of very seconds.quickly withHowever, settling if the time switch of tens is ofturned microseconds. on, the input Figure node 12 voltage shows of the the frequency OTA is stabi- response lizedof the very preamplifier quickly with for settling all gain time settings of tens obtained of microseconds from ac simulations.. Figure 12 shows From the the fre- results, quency response of the preamplifier for all gain settings obtained from ac simulations. we observe that the lower cut-off frequency is lower than 1 Hz for all gain settings. In From the results, we observe that the lower cut-off frequency is lower than 1 Hz for all addition, we can observe flat frequency response over the audio bandwidth between 20 Hz gain settings. In addition, we can observe flat frequency response over the audio band- and 20 kHz. In fact, the lower and upper 3 dB frequency of the frequency response is much width between 20 Hz and 20 kHz. In fact, the lower and upper 3 dB frequency of the fre- lower than 20 Hz and higher than 20 kHz, respectively. The high upper 3 dB frequency quency response is much lower than 20 Hz and higher than 20 kHz, respectively. The high is the result of a very large trans-conductance of the OTA, which is needed for a high upper 3 dB frequency is the result of a very large trans-conductance of the OTA, which is SNR performance. When the upper 3 dB frequency is higher than necessary, a concern is needed for a high SNR performance. When the upper 3 dB frequency is higher than necessary,that the a noiseconcern in is the that extra the bandwidthnoise in the is extra aliased bandwidth down to is the aliased signal down band to when the signal sampled bandby a down-streamwhen sampled ADCby a down and the-stream SNR ADC is degraded. and the SNR However, is degraded. in this However, work, we in assumed this work,an oversampling we assumed ADCan oversampling with a large ADC oversampling with a large ratio, oversampling which is ratio, usually which used is forusu- audio allyapplications. used for audio In this applications. case, the aliasing In this cancase, be the avoided aliasing and can the be noiseavoided in theandextra the noise bandwidth in thecan extra be safely bandwidth removed can bybe asafely low-pass removed filtering by a decimationlow-pass filtering filter. decimation The very low filter. lower The 3 dB veryfrequency low lower is the 3 dB result frequency of a very is the large resultRAC of. a As very explained large RAC in. As Section explained 2.3, ain large SectionRAC is 2.3,actually a large beneficial RAC is actually because beneficial it reduces because the total it reduces noise inthe the total signal noise band. in the Because signal band. the large Becauseresistance the could large beresistance obtained could easily be usingobtained pseudo-resistors, easily using pseudo we did-resistors, not try we to increasedid not the trylower to increase 3 dB frequency. the lower 3 dB frequency.

-20

-40

-60

-80

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-140

-160 100 1k 10k 100k Electronics 2021, 10, x FOR PEER REVIEW Frequency (Hz) 11 of 15

FigureFigure 10. 10. PowerPower spectrum spectrum from from a transient a transient noise noise simulation simulation of the of proposed the proposed preamplifier. preampliﬁer.

2.0

1.5

1.0

VDD (V) VDD 0.5

0.0

1.5

1.0

0.5 SW off

OTA Input (V) OTA Input SW on 0.0

10 20 30 40 TIme (s)

FigureFigure 11. 11. TransientTransient simulation simulation results results of start of start-up-up operation. operation.

0 Power Spectrum (dB) Power Spectrum -5

-10

-15 10m 100m 1 10 100 1k 10k 100k 1M Frequency (Hz)

Figure 12. Simulation results of frequency response of the proposed preamplifier for all gain settings.

4. Measurement Results and Discussion The proposed preamplifier was fabricated using a 28 nm CMOS technology. Figure 13 shows the chip microphotograph of the fabricated circuit. The white rectangle in Figure 13 indicates the preamplifier and the active area occupied by the preamplifier is 0.19 mm2.

Figure 13. Microphotograph of the fabricated preamplifier.

Figure 14 shows the frequency response with the balanced input signal with 1.8 V supply for all gain settings measured with an Agilent 81160A function generator and an Agilent MSO9104A oscilloscope. The measured data matches the simulation results of

Electronics 2021, 10, x FOR PEER REVIEW 11 of 15 Electronics 2021, 10, x FOR PEER REVIEW 11 of 15

2.0 2.0 1.5 1.5 1.0 1.0 VDD (V) VDD VDD (V) VDD 0.50.5

0.00.0

1.51.5

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0.5 0.5 SW off SW off

OTA Input (V) OTA Input SW on

OTA Input (V) OTA Input 0.0 SW on 0.0 10 20 30 40 10 20 TIme (s) 30 40 TIme (s)

Electronics 2021, 10, 1624 Figure 11. Transient simulation results of start-up operation. 11 of 15 Figure 11. Transient simulation results of start-up operation.

25 20

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Power Spectrum (dB) Power Spectrum -10 -5

-15 -10 10m 100m 1 10 100 1k 10k 100k 1M Frequency (Hz) -15 10m 100m 1 10 100 1k 10k 100k 1M Figure 12. Simulation resultsFrequency of frequency (Hz) response of the proposed preamplifier for all gain settings. Figure 12. Simulation results of frequency response of the proposed preamplifier for all gain settings. Figure 12. Simulation results of frequency response of the proposed preamplifier for all gain set- tings4.4. MeasurementMeasurement. Results Results and and Discussion Discussion TheThe proposed proposed preamplifier preamplifier was fabricatedwas fabricated using ausing 28 nm a CMOS 28 nm technology. CMOS technology. Figure 13 Figure 4.shows 13Measurement shows the chipthe chip microphotograph Results microphotograph and of Discussion the fabricated of the fabricated circuit. The circuit. white The rectangle white in rectangle Figure 13 in Figure 2 indicates13 indicates the preamplifier the preamplifier and the and active the areaactive occupied area occupied by the preamplifier by the preamplifier is 0.19 mm is. 0.19 mm2. The proposed preamplifier was fabricated using a 28 nm CMOS technology. Figure 13 shows the chip microphotograph of the fabricated circuit. The white rectangle in Figure 13 indicates the preamplifier and the active area occupied by the preamplifier is 0.19 mm2.

FigureFigure 13. 13.Microphotograph Microphotograph of the of fabricatedthe fabricated preampliﬁer. preamplifier.

FigureFigure 14 14 shows shows the the frequency frequency response response with thewith balanced the balanced input signal input with signal 1.8 with V 1.8 V supplysupply for for all all gain gain settings settings measured measured with with an Agilent an Agilent 81160A 81160A function function generator generator and an and an Agilent MSO9104A oscilloscope. The measured data matches the simulation results of FigureAgilent 13. MSO9104AMicrophotograph oscilloscope. of the fabricated The measured preamplifier. data matches the simulation results of Figure 12 well, and very flat frequency responses were obtained in the audio band. The small reduction of gain in the low frequency range is from the limit of the measurement system,Figure and the14 slightshows peaking the frequency at around 1 response MHz is from with the interactionthe balanced of the input large input signal with 1.8 V supplycapacitance for all of thegain measurement settings measured system and with the output an Agilent impedance 81160A of the preamplifier.function generator and an AgilentFigure MSO9104A 15 shows the oscilloscope. output power The spectrum measured of the preamplifier data matches measured the simulation with the results of gain of 0 dB and 800 mVpk, 1.5 kHz sinusoidal input supplied by an Audio Precision AP-2700. The single-ended output of AP-2700 was converted to a differential signal by a balun consisting of a center-tapped transformer before being applied to the preamplifier. The supply voltage was 1.8 V. From the results, we can observe that the corner frequency of flicker noise is about 200 Hz due to the OTA’s large input transistors. The third order distortion is the dominant distortion component whose power is about 100 dB lower than the signal power. The powers of other harmonic components are lower than the signal power by more than 120 dB and is buried in the noise. Electronics 2021, 10, x FOR PEER REVIEW 12 of 15

Figure 12 well, and very flat frequency responses were obtained in the audio band. The small reduction of gain in the low frequency range is from the limit of the measurement system, and the slight peaking at around 1 MHz is from the interaction of the large input capacitance of the measurement system and the output impedance of the preamplifier.

Electronics 2021, 10, x FOR PEER REVIEW 12 of 15

Figure 12 well, and very flat frequency responses were obtained in the audio band. The small reduction of gain in the low frequency range is from the limit of the measurement

Electronics 2021, 10, 1624 system, and the slight peaking at around 1 MHz is from the interaction12 of 15of the large input capacitance of the measurement system and the output impedance of the preamplifier.

Figure 14. Measured frequency response of the preamplifier with the balanced input signal.

Figure 15 shows the output power spectrum of the preamplifier measured with the gain of 0 dB and 800 mVpk, 1.5 kHz sinusoidal input supplied by an Audio Precision AP- 2700. The single-ended output of AP-2700 was converted to a differential signal by a balun consisting of a center-tapped transformer before being applied to the preamplifier. The supply voltage was 1.8 V. From the results, we can observe that the corner frequency of flicker noise is about 200 Hz due to the OTA’s large input transistors. The third order distortion is the dominant distortion component whose power is about 100 dB lower than the signal power. The powers of other harmonic components are lower than the signal power by more than 120 dB and is buried in the noise. FigureFigure 14. 14.Measured Measured frequency frequency response response of the preampliﬁer of the preamplifier with the balanced with input the balanced signal. input signal.

FigureFigure 15. 15.Output Output spectrum spectrum of preampliﬁer of preamplifier for G = for 0 dB G with = 0 dB 800 with mVpk 800, 1.5 mV kHzpk balanced, 1.5 kHz sinu- balanced sinusoidal soidalinput. input.

Figure 16 shows the measured A-weighted SNR and A-weighted SNDR versus input level whenFigure (a) the16 shows balanced the signal measured was applied A-weighted and (b) the single-endedSNR and A-weighted signal was applied. SNDR versus input Thelevel maximum when (a) A-weighted the balanced SNR and signal A-weighted was applied SNDR withand the(b) balanced the single-ended signal were signal was ap- 107plied. dBA The and maximum 95.5 dBA, respectively. A-weighted The SNR measured and A-weighted DR of the preampliﬁer SNDR with is 107 the dB. balanced signal Maximumwere 107 SNRsdBA wereand 95.5 obtained dBA, at respectively. the input signal The level me ofasured 0 dBFS (=1.8DR of V pk,diffthe preamplifier), which is 107 dB. produces the maximum output swing of 1.8 Vpk,diff. With a single-ended signal applied, theMaximum peak A-weighted SNRs SNDRwere wasobtained reduced at to the 85.6 dBAinput mainly signal due level to even-order of 0 dBFS harmonics. (=1.8 Vpk,diff), which However,produces the the SNRs maximum with a single-ended output swing signal isof almost 1.8 V identicalpk,diff. With to those a single-ended with balanced signal applied, input signal.

Figure 15. Output spectrum of preamplifier for G = 0 dB with 800 mVpk, 1.5 kHz balanced sinusoidal input.

Figure 16 shows the measured A-weighted SNR and A-weighted SNDR versus input level when (a) the balanced signal was applied and (b) the single-ended signal was applied. The maximum A-weighted SNR and A-weighted SNDR with the balanced signal were 107 dBA and 95.5 dBA, respectively. The measured DR of the preamplifier is 107 dB. Maximum SNRs were obtained at the input signal level of 0 dBFS (=1.8 Vpk,diff), which produces the maximum output swing of 1.8 Vpk,diff. With a single-ended signal applied,

Electronics 2021, 10, x FOR PEER REVIEW 13 of 15

the peak A-weighted SNDR was reduced to 85.6 dBA mainly due to even-order harmonics. However, the SNRs with a single-ended signal is almost identical to those with bal- Electronics 2021, 10, 1624 13 of 15 anced input signal.

120 120 SNR SNR 100 SNDR 100 SNDR

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20 20

0 0

-120 -100 -80 -60 -40 -20 0 -120 -100 -80 -60 -40 -20 0 INPUT (dBFS) INPUT (dBFS) (a) (b)

FigureFigure 16. 16.Measured Measured SNR SNR and and SNDR SNDR of of preampliﬁer preamplifier versus versus input input level level (A-weighted). (A-weighted). ( a(a)) When When the the balanced balanced signal signal was was appliedapplied and and ( b(b)) when when the the single-ended single-ended signal signal was was applied applied with with preampliﬁer preamplifier gain gain of of 0 0 dB. dB.

TheThe measuredmeasured powerpower consumptionconsumption withwith thethe supplysupply voltagevoltage ofof 1.81.8 VV waswas 270270 µμW.W. TableTable3 3summarizes summarizes measurement measurement results results of of the the preamplifier. preamplifier. In In the the table, table, we we present present A-weightedA-weighted andand unweightedunweighted SNR,SNR, SNDR,SNDR, andand DRDR forfor balanced balanced and and single-ended single-ended input input signalssignals withwith thethe gaingain ofof 0 0 dB dB and and 21 21 dB. dB. Comparisons Comparisons with with previously previously published published results results areare providedprovided inin TableTable4 .4. The The power-efficiency power-efficiency is is compared compared by by employing employing the the figure figure of of meritmerit (FoM)(FoM) factor,factor, whichwhich is defineddefined as FoM = DR DR + + 10log 10log1010(Bw(Hz)(Bw(Hz)/Power(W))./Power(W)). Since Since the thegain gain of [5] of is [5 ]fixed is fixed at 20 at dB, 20 the dB, SNR, the SNR,SNDR, SNDR, DR, and DR, FoM and of FoM [5] was of [5 adjusted] was adjusted by adding by addingthe 20 dB the gain 20 dB for gain fair for comparisons. fair comparisons. From Table From 4, Table we 4can, we observe can observe that our that design our design repre- representssents comparable comparable performance performance with the with state the of state the ofart the designs. art designs. Ref. [5] Ref. reports [5] reports the highest the highestFoM among FoM amongthe comparisons. the comparisons. However, However, the resistive the resistive architecture architecture of [5] oflimits [5] limits the input the inputimpedance impedance to 10 k toΩ, 10 and kΩ it, andemployed it employed external external ac-coupling ac-coupling capacitor capacitor.. Our work Our, as work, well as as well[8], both as [8 ],report both capacitive report capacitive on-chip on-chip ac-coupling ac-coupling preamplifiers. preamplifiers. A pseudo A- pseudo-resistorresistor was em- wasployed employed in our work in our to work realize to an realize on-chip an on-chipac-coupling, ac-coupling, while switched while switched capacitor capacitor networks networkswere adopted were as adopted biasing as resistors biasing in resistors [8]. in [8].

TableTable 3. 3.Summary Summary of of the the measured measured performance. performance.

InputInput Signal Signal GainGain SNDRSNDRpkpk DR SNDRSNDRpkpk ** DR ** 0 dB0 dB 95.695.6 dB dB 103.4 103.4 dBdB 95.5 95.5 dBA 107 dBAdBA BalancedBalanced 21 dB21 dB 77.677.6 dB dB 82.9 dBdB 80.3 80.3 dBA 86 dBAdBA 0 dB0 dB 95.595.5 dB dB 102.1 102.1 dBdB 85.6 85.6 dBA 104.6 dBAdBA Single-endedSingle-ended 21 dB21 dB 77.277.2 dB dB 82.5 dBdB 79 79 dBA dBA 86 dBAdBA *: A-weighted. *: A-weighted. Table 4. Performance comparison. Table 4. Performance comparison. Parameter This Work [8][5] PARAMETER THIS WORK [8] [5] ProcessProcess 28 nm28 nm 40 nm40 nm 65 nm65 nm Architecture Capacitive Capacitive Resistive Ac-couplingArchitecture On-chipCapacitiveOn-chip Capacitive ExternalResistive Supply VoltageAc-coupling (V) 1.8On-chip 1.5On-chip 1.2External GainSupply (dB) Voltage (V) 0 to 211.8 0 to 19.51.5 20 1.2 ,+ Peak SNDRGain (dB) (dB) 95.50 to 21 1010 to 19.5 108.6 dB20 * Peak DR (dB) 107 106 109.3 dB *,+

Electronics 2021, 10, 1624 14 of 15

Table 4. Cont.

Parameter This Work [8][5] FoM (dB) 185.7 183.8 189.6 + Power Consumption 270 330 185 (µW) Active Area (mm2) 1.19 0.19 0.12 *: Unweighted. +: Adjusted to the gain of 0 dB

5. Conclusions In this work, a design of on-chip ac-coupling microphone preamplifier is presented. Since the architecture of the preamplifier greatly affects its performance, we compared the previously reported preamplifiers in terms of input impedance, noise performance, and the feasibility of on-chip ac-coupling. We chose the inverting architecture with capacitive feedback. An on-chip ac-coupling and a fast start-up time were achieved at the same time by adopting CMOS-transmission-gate switches as pseudo resistors. In the normal operation of the preamplifier, the switches are turned off for producing a very large resistance, whereas they are turned on for fast settling during the start-up. The proposed microphone preamplifier was designed and fabricated using a 28 nm CMOS process. To accommodate the various microphones and line-in signals, the preamplifier has a variable gain from 0 dB to 21 dB in steps of 3 dB. To minimize the power consumption, a two-stage pseudo class-AB OTA was employed. Measurement results showed that the preamplifier had a peak SNDR of 95.5 dBA and DR of 107 dBA with a power consumption of 270 µW.

Author Contributions: Conceptualization, S.I. and S.-G.P.; methodology, S.I. and S.-G.P.; validation, S.I. and S.-G.P.; formal analysis, S.I. and S.-G.P.; investigation, S.I. and S.-G.P.; writing—original draft preparation, S.I.; writing—review and editing, S.-G.P. All authors have read and agreed to the published version of the manuscript. Funding: This research was funded by National R&D Program through the National Research Foundation of Korea (NRF) funded by Ministry of Science and ICT (No. 2020M3H2A1076786). Acknowledgments: The CAD tools were provided by IC Design Canter (IDEC), Korea. Conﬂicts of Interest: The authors declare no conﬂict of interest.

References 1. Kuo, S.M.; Morgan, D.R. Active noise control: A tutorial review. Proc. IEEE 1999, 87, 943–973. [CrossRef] 2. Elliott, S.J.; Curtis, A.R.D.; Bullmore, A.J.; Nelson, P.A. The active minimization of harmonic enclosed sound fields, part III: Experimental verification. J. Sound Vibrat. 1987, 117, 35–58. [CrossRef] 3. Sukumaran, A.; Karanjkar, K.; Jhanwar, S.; Krishnapura, N.; Pavan, S. A 1.2V 285uA analog front end chip for a digital hearing aid in 0.13um CMOS. In Proceedings of the IEEE Asian Solid-State Circuits Conference (A-SSCC), Singapore, 11–13 November 2013; pp. 397–400. 4. Kim, S.; Lee, S.J.; Cho, N.; Song, S.-J.; Yoo, H.-J. A fully integrated digital hearing aid chip with human factors considerations. IEEE J. Solid State Circuits 2008, 43, 266–274. [CrossRef] 5. Song, S.; Lee, C.; Jang, M.; Chae, Y. A 185 µW −105.1 dB THD 88.6 dB SNDR Negative-R Stabilized Audio Preamplifier. In Proceedings of the IEEE 45th European Solid State Circuits Conference (ESSCIRC), Cracow, Poland, 23–26 September 2019; pp. 261–264. 6. Kim, S.; Cho, N.; Song, S.; Yoo, H. A 0.9 V 96 uW fully operational digital hearing aid chip. IEEE J. Solid State Circuits 2007, 42, 2432–2440. [CrossRef] 7. Im, S.; Park, S.-G. A 154-uW 80-dB SNDR analog-to-digital front-end for digital hearing aids. Analog. Integr. Circuits Signal Process. 2016, 89, 383–393. [CrossRef] 8. Barbieri, A.; Nicollini, G. 100+dB A-weighted SNR microphone preamplifier with on-chip decoupling capacitors. IEEE J. Solid State Circuits 2012, 47, 2737–2750. [CrossRef] 9. Van Rhijn, A. Integrated circuits for high performance electret microphones. In Proceedings of the 114th AES Convention, Amsterdam, The Netherlands, 22–25 March 2003. 10. Amplifiers for 3 Wire Analog Electret Microphones; LMV1032-06/LMV1032-15/LMV1032-25 Data Sheet; Texas Instrument: Dallas, TX, USA, 2013. Electronics 2021, 10, 1624 15 of 15

11. Acoustic Components & Accessoties; Hosiden. Available online: https://hbl.co.uk/wp-content/uploads/2016/01/Acoustic_ ComponentAccessorie.pdf (accessed on 7 July 2021). 12. Acoustic Interface Design Guide; Knowles. Available online: https://www.mouser.com/datasheet/2/218/07-KA-895_ designguide_final_v1-1120.pdf (accessed on 7 July 2021). 13. Harrison, R.R.; Charles, C. A low-power low-noise CMOS amplifier for neural recording applications. IEEE J. Solid State Circuits 2003, 38, 958–965. [CrossRef] 14. Um, J.-Y.; Sim, J.-Y.; Park, H.-J. A Gate-leakage insensitive 0.7-V 233-nW ECG amplifier using non-feedback PMOS pseudo-resistors in 0.13-um N-well CMOS. J. Semicond. Technol. Sci. 2010, 10, 309–315. [CrossRef] 15. Delbruck, T.; Mead, C.A. Adaptive photoreceptor with wide dynamic range. Proc. IEEE Int. Symp. Circuits Syst. 1994, 4, 339–342. 16. Renteria-Pinon, M.; Ramirez-Angulo, J.; Dias-Sanchez, A. Simple scheme for the implementation of low voltage fully differential amplifiers without output common-mode feedback network. J. Low Power Electron. Appl. 2020, 4, 34. [CrossRef] 17. Ballo, A.; Grasso, A.D.; Pennisi, S. Active load with cross-coupled bulk for high-gain high-CMRR nanometer CMOS differential stages. Wiley Int. J. Circuit Theory Appl. 2019, 47, 1700–1704. [CrossRef]