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Mentor Graphics® Mentor Graphics ® Interface Guide R1-2002 UNIX® Environments Actel Corporation, Sunnyvale, CA 94086 © 2002 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5579001-7 Release: June 2002 No part of this document may be copied or reproduced in any form or by any means without prior written consent of Actel. Actel makes no warranties with respect to this documentation and disclaims any implied warranties of merchantability or fitness for a particular purpose. Infor- mation in this document is subject to change without notice. Actel assumes no responsibility for any errors that may appear in this document. This document contains confidential proprietary information that is not to be disclosed to any unauthorized person without prior written consent of Actel Corporation. Trademarks Actel and the Actel logotype are registered trademarks of Actel Corporation. Adobe and Acrobat Reader are registered trademarks of Adobe Systems, Inc. Cadence is a registered trademark of Cadence Design Systems, Inc. Mentor Graphics is registered trademark of Mentor Graphics, Inc. Synopsys is a registered trademark of Synopsys, Inc. Verilog is a registered trademark of Open Verilog International. Viewlogic, ViewSim, and ViewDraw are registered trademarks and MOTIVE and SpeedWave are trademarks of Viewlogic Systems, Inc. Windows is a registered trademark and Windows NT is a trademark of Microsoft Corporation in the U.S. and other countries. All other products or brand names mentioned are trademarks or registered trademarks of their respective holders. ii Table of Contents Introduction . ix Document Organization . ix Document Assumptions . ix Document Conventions . x Actel Manuals . x Online Help. xiii 1 Setup . 1 Software Requirements . 1 User Setup . 1 Design Manager Encapsulation Flow . 6 2 Actel-Mentor Graphics Design Flow . 9 Schematic-Based Design Flow Illustrated . 9 Schematic-Based Design Flow Overview . 10 3 Actel-Design Architect Design Considerations . 13 Schematic Naming Conventions . 13 Multiple-Page Design . 15 Adding Input and Output Macros. 15 Adding ACTgen Macros . 17 Adding Synopsys Blocks . 18 Creating an EDIF Netlist . 22 Creating an HDL Netlist . 22 Importing an EDIF Netlist . 23 4 Simulation Using QuickSim II. 25 Functional Simulation . 25 Timing Simulation with SDF Back Annotation . 25 Board-Level Simulation . 26 5 Static-Timing Analysis Using QuickPath . 29 Timing Analysis with SDF . 29 iii Table of Contents A Product Support . 31 Actel U.S. Toll-Free Line . 31 Customer Service . 31 Customer Applications Center . 32 Guru Automated Technical Support . 32 Web Site . 32 FTP Site. 32 Contacting the Customer Applications Center . 33 Worldwide Sales Offices . 34 Index . 35 iv Introduction This Mentor Graphics Interface Guide contains detailed information about using Mentor Graphics software to create designs for Actel devices. Refer to the Designer User’s Guide for additional information about using the Designer software and the Mentor Graphics documentation for information about using Mentor Graphics tools. Document Organization The Mentor Graphics Interface Guide contains the following chapters: Chapter 1 - Setup contains information about setting up Mentor Graphics tools to create Actel Designs. Chapter 2 - Actel-Mentor Graphics Design Flow describes the design flow for creating Actel Designs using Mentor Graphics CAE tools. Chapter 3 - Actel-Design Architect Design Considerations contains information for creating designs with Design Architect. Chapter 4 - Simulation Using QuickSim II contains information about simulating Actel designs with QuickSim II. Chapter 5 - Static-Timing Analysis Using QuickPath contains information about static timing analysis with QuickPath. Appendix A - Product Support provides information about contacting Actel for customer and technical support. Document Assumptions This document assumes the following: 1. You have installed the Designer Series software. 2. You have installed the Mentor Graphics software. 3. You are familiar with UNIX operating system environments. 4. You are familiar with Actel FPGA architecture and Actel design software. ix Introduction Document Conventions This document uses the following conventions: Information input by the user follows this format: keyboard input The contents of a file follows this format: file contents Messages displayed on the screen appear as follows: Screen Message This document uses the following variables: • Actel FPGA family libraries are shown as <act_fam>. Substitute the desired Actel FPGA family ACT1, ACT2 (for ACT2 and 1200XL devices), ACT3, 3200DX, 40MX, 42MX, 54SX, 54SX-A, eX, and Express as needed. For example: edn2vhdl fam:<act_fam> <design_name> • Compiled VHDL libraries are shown as <vhd_fam>. Substitute <vhd_fam> for the desired VHDL family ACT1, ACT2 (for ACT 2 and 1200XL devices), ACT3, A3200DX, A40MX, A42MX, A54SX, A54SX-A, eX, and Express as needed. The VHDL language requires that the library names begin with an alpha character. • Your Comments Actel Corporation strives to produce the highest quality online help and printed documentation. We want to help you learn about our products, so you can get your work done quickly. We welcome your feedback about this guide and our online help. Please send your comments to [email protected]. x Introduction Actel Manuals Designer and Libero include printed and online manuals. The online manuals are in PDF format and available from Libero and Designer’s Start Menus and on the CD-ROM. From the Start menu choose: • Programs > Libero 2.2 > Libero 2.2 Documentation. • Programs > Designer Series > R1-2002 Documentation Also, the online manuals are in PDF format on the CD-ROM in the “/manuals” directory. These manuals are also installed onto your system when you install the Designer software. To view the online manuals, you must install Adobe® Acrobat Reader® from the CD-ROM. The Designer Series includes the following manuals, which provide additional information on designing Actel FPGAs: Getting Started User’s Guide. This manual contains information for using the Designer Series Development System software to create designs for, and program, Actel devices. Designer User’s Guide. This manual provides an introduction to the Designer series software as well as an explanation of its tools and features. PinEdit User’s Guide. This guide provides a detailed description of the PinEdit tool in Designer. It includes cross-platform explanations of all the PinEdit features. ChipEdit User’s Guide. This guide provides a detailed description of the ChipEdit tool in Designer. It includes a detailed explanation of the ChipEdit functionality. Timer User’s Guide. This guide provides a detailed description of the Timer tool in Designer. It includes a detailed explanation of the Timer functionality. SmartPower User’s Guide. This guide provides a detailed description of using the SmartPower tool to perform power analysis. Netlist Viewer User’s Guide. This guide provides a detailed description of the Netlist Viewer. Information on using the Netlist Viewer with Timer and ChipEdit to debug your netlist is provided. xi Introduction A Guide to ACTgen Macros. This Guide provides descriptions of macros that can be generated using the Actel ACTgen Macro Builder software. Actel HDL Coding Style Guide. This guide provides preferred coding styles for the Actel architecture and information about optimizing your HDL code for Actel devices. Silicon Expert User’s Guide. This guide contains information to assist designers in the use of Actel’s Silicon Expert tool. Cadence ® Interface Guide. This guide contains information to assist designers in the design of Actel devices using Cadence CAE software and the Designer Series software. Mentor Graphics ® Interface Guide. This guide contains information to assist designers in the design of Actel devices using Mentor Graphics CAE software and the Designer Series software. Synopsys®Synthesis Methodology Guide. This guide contains preferred HDL coding styles and information to assist designers in the design of Actel devices using Synopsys CAE software and the Designer Series software. Innoveda® eProduct Designer Interface Guide (Windows). This guide contains information to assist designers in the design of Actel devices using eProduct Designer CAE software and the Designer Series software. VHDL Vital Simulation Guide. This guide contains information to assist designers in simulating Actel designs using a Vital compliant VHDL simulator. Verilog Simulation Guide. This guide contains information to assist designers in simulating Actel designs using a Verilog simulator. Activator and APS Programming System Installation and User’s Guide. This guide contains information about how to program and debug Actel devices, including information about using the Silicon Explorer diagnostic tool for system verification. Silicon Sculptor User’s Guide. This guide contains information about how to program Actel devices using the Silicon Sculptor software and device programmer. xii Introduction Flash Pro User’s Guide. This guide contains information about how to program Actel ProASIC and ProASIC PLUS devices using the Flash Pro software and device programmer. Silicon Explorer II. This guide contains information about connecting the Silicon Explorer diagnostic tool and using it to perform system verification. Macro Library Guide. This guide provides descriptions of Actel library elements for Actel device families. Symbols, truth tables, and module count are included for all
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