Curriculum Vitae
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Communications of the Acm
COMMUNICATIONS CACM.ACM.ORG OF THEACM 11/2014 VOL.57 NO.11 Scene Understanding by Labeling Pixels Evolution of the Product Manager The Data on Diversity On Facebook, Most Ties Are Weak Keeping Online Reviews Honest Association for Computing Machinery tvx-full-page.pdf-newest.pdf 1 11/10/2013 12:03 3-5 JUNE, 2015 BRUSSELS, BELGIUM Course and Workshop C proposals by M 15 November 2014 Y CM Paper Submissions by MY 12 January 2015 CY CMY K Work in Progress, Demos, DC, & Industrial Submissions by 2 March 2015 Welcoming Submissions on Content Production Systems & Infrastructures Devices & Interaction Techniques Experience Design & Evaluation Media Studies Data Science & Recommendations Business Models & Marketing Innovative Concepts & Media Art TVX2015.COM [email protected] ACM Books M MORGAN& CLAYPOOL &C PUBLISHERS Publish your next book in the ACM Digital Library ACM Books is a new series of advanced level books for the computer science community, published by ACM in collaboration with Morgan & Claypool Publishers. I’m pleased that ACM Books is directed by a volunteer organization headed by a dynamic, informed, energetic, visionary Editor-in-Chief (Tamer Özsu), working closely with a forward-looking publisher (Morgan and Claypool). —Richard Snodgrass, University of Arizona books.acm.org ACM Books ◆ will include books from across the entire spectrum of computer science subject matter and will appeal to computing practitioners, researchers, educators, and students. ◆ will publish graduate level texts; research monographs/overviews of established and emerging fields; practitioner-level professional books; and books devoted to the history and social impact of computing. ◆ will be quickly and attractively published as ebooks and print volumes at affordable prices, and widely distributed in both print and digital formats through booksellers and to libraries and individual ACM members via the ACM Digital Library platform. -
Architectures for Adaptive Low-Power Embedded Multimedia Systems
Architectures for Adaptive Low-Power Embedded Multimedia Systems zur Erlangung des akademischen Grades eines Doktors der Ingenieurwissenschaften der Fakultät für Informatik Karlsruhe Institute of Technology (KIT) (The cooperation of the Universität Fridericiana zu Karlsruhe (TH) and the national research center of the Helmholtz-Gemeinschaft) genehmigte Dissertation von Muhammad Shafique Tag der mündlichen Prüfung: 31.01.2011 Referent: Prof. Dr.-Ing. Jörg Henkel, Karlsruhe Institute of Technology (KIT), Fakultät für Informatik, Lehrstuhl für Eingebettete Systeme (CES) Korreferent: Prof. Dr. Samarjit Chakraborty, Technische Universität München (TUM), Fakultät für Elektrotechnik und Informationtechnik, Lehrstuhl für Realzeit- Computersysteme (RCS) Muhammad Shafique Adlerstr. 3a 76133 Karlsruhe Hiermit erkläre ich an Eides statt, dass ich die von mir vorgelegte Arbeit selbständig verfasst habe, dass ich die verwendeten Quellen, Internet-Quellen und Hilfsmittel vollständig angegeben habe und dass ich die Stellen der Arbeit – einschließlich Tabellen, Karten und Abbildungen – die anderen Werken oder dem Internet im Wortlaut oder dem Sinn nach entnommen sind, auf jeden Fall unter Angabe der Quelle als Entlehnung kenntlich gemacht habe. ____________________________________ Muhammad Shafique Acknowledgements I would like to present my cordial gratitude to my advisor Prof. Dr. Jörg Henkel for his erudite and invaluable supervision with sustained inspirations and incessant motivation. He guided me to explore the challenging research problems while giving me the complete flexibility, which provided the rationale to unleash my ingenuity and creativity along with an in-depth exploration of various research issues. His encouragement and meticulous feedback wrapped in constructive criticism helped me to keep the impetus and to remain streamlined on the road of research that resulted in the triumphant completion of this work. -
Here I Led Subcommittee Reports Related to Data-Intensive Science and Post-Moore Computing) and in CRA’S Board of Directors Since 2015
Vivek Sarkar Curriculum Vitae Contents 1 Summary 2 2 Education 3 3 Professional Experience 3 3.1 2017-present: College of Computing, Georgia Institute of Technology . 3 3.2 2007-present: Department of Computer Science, Rice University . 5 3.3 1987-2007: International Business Machines Corporation . 7 4 Professional Awards 11 5 Research Awards 12 6 Industry Gifts 15 7 Graduate Student and Other Mentoring 17 8 Professional Service 19 8.1 Conference Committees . 20 8.2 Advisory/Award/Review/Steering Committees . 25 9 Keynote Talks, Invited Talks, Panels (Selected) 27 10 Teaching 33 11 Publications 37 11.1 Refereed Conference and Journal Publications . 37 11.2 Refereed Workshop Publications . 51 11.3 Books, Book Chapters, and Edited Volumes . 58 12 Patents 58 13 Software Artifacts (Selected) 59 14 Personal Information 60 Page 1 of 60 01/06/2020 1 Summary Over thirty years of sustained contributions to programming models, compilers and runtime systems for high performance computing, which include: 1) Leading the development of ASTI during 1991{1996, IBM's first product compiler component for optimizing locality, parallelism, and the (then) new FORTRAN 90 high-productivity array language (ASTI has continued to ship as part of IBM's XL Fortran product compilers since 1996, and was also used as the foundation for IBM's High Performance Fortran compiler product); 2) Leading the research and development of the open source Jikes Research Virtual Machine at IBM during 1998{2001, a first-of-a-kind Java Virtual Machine (JVM) and dynamic compiler implemented -
PROFESSIONAL ACTIVITIES – Nam Ling
PROFESSIONAL ACTIVITIES – Nam Ling (1) MAJOR PROFESSIONAL LEADERSHIP POSITIONS: 1. General Co-Chair, 12th International Conference on Ubi-Media Computing (Umedia), Bali, Indonesia, August 6-9, 2019. 2. General Co-Chair, 4th International Symposium on Security and Privacy in Social Networks and Big Data (SocialSec), Santa Clara, California, U.S.A, December 10-11, 2018. 3. General Co-Chair, 11th International Conference on Ubi-Media Computing (Umedia), Nanjing, China, August 22 – 25, 2018. 4. Honorary Co-Chair, 10th International Conference on Ubi-Media Computing and Workshops (Umedia), Pattaya, Thailand, August 1 - 4, 2017. 5. General Co-Chair, 9th International Conference on Ubi-Media Computing (Umedia), Moscow, Russia, August 15 - 17, 2016. 6. General Chair, 2015 IEEE Workshop on Signal Processing Systems (SiPS), Hangzhou, China, October 14 - 16, 2015. 7. General Co-Chair, 8th International Conference on Ubi-Media Computing (Umedia), Colombo, Sri Lanka, August 24 – 25, 2015. 8. General Co-Chair, 7th International Conference on Ubi-Media Computing (Umedia), Ulaanbaatar, Mongolia, July 12 – 14, 2014. 9. General Co-Chair, 2nd International Workshop on Video Coding and Video Processing (VCVP), Shenzhen, China, January 21 – 23, 2014. 10. Technical Program Co-Chair, 2013 IEEE Visual Communications and Image Processing Conference (VCIP), Kuching, Sarawak, Malaysia, November 17 - 20, 2013. 11. General Chair, 2013 IEEE International Conference on Multimedia and Expo (ICME), San Jose, California, USA, July 15 – 19, 2013. (ICME is the flagship conference on multimedia research for the IEEE and is sponsored by four of the largest IEEE societies – Computer, Communications, Signal Processing, and Circuits and Systems.) 12. Technical Program Co-Chair, 2010 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC), Singapore, December 14 – 17, 2010. -
Curriculum Vitae
Massachusetts Institute of Technology School of Engineering Faculty Personnel Record Date: April 1, 2020 Full Name: Charles E. Leiserson Department: Electrical Engineering and Computer Science 1. Date of Birth November 10, 1953 2. Citizenship U.S.A. 3. Education School Degree Date Yale University B. S. (cum laude) May 1975 Carnegie-Mellon University Ph.D. Dec. 1981 4. Title of Thesis for Most Advanced Degree Area-Efficient VLSI Computation 5. Principal Fields of Interest Analysis of algorithms Caching Compilers and runtime systems Computer chess Computer-aided design Computer network architecture Digital hardware and computing machinery Distance education and interaction Fast artificial intelligence Leadership skills for engineering and science faculty Multicore computing Parallel algorithms, architectures, and languages Parallel and distributed computing Performance engineering Scalable computing systems Software performance engineering Supercomputing Theoretical computer science MIT School of Engineering Faculty Personnel Record — Charles E. Leiserson 2 6. Non-MIT Experience Position Date Founder, Chairman of the Board, and Chief Technology Officer, Cilk Arts, 2006 – 2009 Burlington, Massachusetts Director of System Architecture, Akamai Technologies, Cambridge, 1999 – 2001 Massachusetts Shaw Visiting Professor, National University of Singapore, Republic of 1995 – 1996 Singapore Network Architect for Connection Machine Model CM-5 Supercomputer, 1989 – 1990 Thinking Machines Programmer, Computervision Corporation, Bedford, Massachusetts 1975 -
Lillian C. Pentecost Lillian [email protected] (732) 533-9504
Lillian C. Pentecost lillian [email protected] (732) 533-9504 EDUCATION Harvard University Cambridge, MA Ph.D. in Computer Science Projected May 2022 Advisors: David Brooks and Gu-Yeon Wei Harvard University Cambridge, MA S.M. (masters in passing) in Computer Science May 2019 Coursework includes: Advanced Machine Learning, Advanced Computer Architecture, Data Visualization, Seminar in Teaching the History of Science and Technology, Algorithms at the End of the Wire, Critical Pedagogy Seminar Colgate University Hamilton, NY Bachelor of Arts May 2016 Double Major: Computer Science and Physics with High Honors GPAs: Cumulative: 3.95/4.00, Physics: 4.03/4.00, Computer Science: 4.05/4.00 RESEARCH EXPERIENCE Harvard University Cambridge, MA Ph.D. Candidate August 2016 - Present Investigating and enabling the design and optimization of memory systems, including inte- gration of emerging and embedded non-volatile memory technologies and specialized hard- ware for machine learning applications, with an emphasis on understanding resilience and evaluating system and application-level implications of technology design choices. NVIDIA Research Westford, MA Ph.D. Research Intern Summer 2020 Conducted design space exploration of memory architecture and floorplanning choices with intensive analysis of efficient workload mappings for highly-distributed on-chip memory by building upon existing, open-source evaluation frameworks. (Virtual internship conducted from Boston, MA, collaborating with NVIDIA Architecture Research Group.) Microsoft Research Redmond, WA Ph.D. Research Intern Summer 2018 Profiled and analyzed deep neural network performance on a variety of hardware platforms with an emphasis on transformer-based models for translation, in addition to surveying and evaluating the state of available profiling tools across several popular ML frameworks, as part of a collaborative project between Microsoft Research and the Silicon, AI, and Performance group under Azure. -
Newsletter-202009.Pdf
1 September 2020, Vol. 50, No. 9 Online archive: http://www.sigda.org/publications/newsletter 1. SIGDA News From: Xiang Chen <[email protected]> 2. SIGDA Local Chapter News From: Yanzhi Wang <[email protected]> 3. "What is" Column Contributing author: Cong (Callie) Hao <[email protected]> From: Xun Jiao <[email protected]> 4. Paper Submission Deadlines From: Xin Zhao <[email protected]> 5. Upcoming Conferences and Symposia From: Xin Zhao <[email protected]> 6. SIGDA Partner Journal From: Matthew Morrison <[email protected]> From: Deming Chen <[email protected]> 7. Call for Nomination -- ACM TCPS EiC From: Krithi Ramamritham <[email protected]> 8. Technical Activities From: Ying Wang <[email protected]> 9. Notice to Authors Comments from the Editors Dear ACM/SIGDA members, We are excited to present to you the September e-newsletter. We encourage you to invite your students and colleagues to be a part of the SIGDA newsletter. The newsletter covers a wide range of information from the upcoming conferences and hot research topics to technical news and activities from our community. From this month, we add a new column titled "SIGDA Partner Journal" where we will introduce the dynamics of SIGDA related journals. For this month, we are introducing the new editorial board of ACM TODAES and announcing a new partnership between SIGDA and ACM TRETS. Get involved and contact us if you want to contribute an article or announcement. The newsletter is evolving, let us know what you think. Happy reading! Debjit Sinha, Keni Qiu, Editors-in-Chief, SIGDA E-News To renew your ACM SIGDA membership, please visit http://www.acm.org/renew or call between the hours of 8:30am to 4:30pm EST at +1-212-626-0500 (Global), or 1-800-342-6626 (US and Canada). -
Thomas E. Anderson
Thomas E. Anderson November 2015 Personal Born in Orlando, Florida, August 28, 1961. Work Address: Home Address: 646 Allen Center 1201 18th Ave. E. Department of Computer Science and Engineering Seattle, WA 98112 University of Washington (206) 568{0230 Seattle, WA 98112 (206) 543-9348 [email protected] Research Operating systems, cloud computing, computer networks, computer security, local and Interests wide area distributed systems, high performance computer and router architectures, and education software, with a focus on the construction of robust, secure, and efficient computer systems. Education Ph.D. in Computer Science, 1991, University of Washington. Dissertation Title: Operating System Support for High Performance Multiprocessing, supervised by Profs. E.D. Lazowska and H.M. Levy. M.S. in Computer Science, 1989, University of Washington. A.B. cum laude in Philosophy, 1983, Harvard University. Professional Department of Computer Science and Engineering, University of Washington. Experience Warren Francis and Wilma Kolm Bradley Chair of Computer Science and Engineering, 2009 { present. Visiting Professor, Eidgenossische Technische Hoschschule Zurich (ETHZ), 2009. Department of Computer Science and Engineering, University of Washington. Professor, 2001 { 2009. Department of Computer Science and Engineering, University of Washington. Associate Professor, 1997 { 2001. Founder and Interim CEO/CTO, Asta Networks, 2000 - 2001 (on leave from UW). Computer Science Division, University of California, Berkeley. Associate Professor, 1996 { 1997. Computer Science Division, University of California, Berkeley. Assistant Professor, 1991 { 1996. Digital Equipment Corporation Systems Research Center. Research Intern, Fall, 1990. Thomas E. Anderson - 2 - November 2015 Awards USENIX Lifetime Achievement Award, 2014. USENIX Software Tools User Group Award (for PlanetLab), 2014. IEEE Koji Kobayashi Computers and Communications Award, 2012. -
AI Chips: What They Are and Why They Matter
APRIL 2020 AI Chips: What They Are and Why They Matter An AI Chips Reference AUTHORS Saif M. Khan Alexander Mann Table of Contents Introduction and Summary 3 The Laws of Chip Innovation 7 Transistor Shrinkage: Moore’s Law 7 Efficiency and Speed Improvements 8 Increasing Transistor Density Unlocks Improved Designs for Efficiency and Speed 9 Transistor Design is Reaching Fundamental Size Limits 10 The Slowing of Moore’s Law and the Decline of General-Purpose Chips 10 The Economies of Scale of General-Purpose Chips 10 Costs are Increasing Faster than the Semiconductor Market 11 The Semiconductor Industry’s Growth Rate is Unlikely to Increase 14 Chip Improvements as Moore’s Law Slows 15 Transistor Improvements Continue, but are Slowing 16 Improved Transistor Density Enables Specialization 18 The AI Chip Zoo 19 AI Chip Types 20 AI Chip Benchmarks 22 The Value of State-of-the-Art AI Chips 23 The Efficiency of State-of-the-Art AI Chips Translates into Cost-Effectiveness 23 Compute-Intensive AI Algorithms are Bottlenecked by Chip Costs and Speed 26 U.S. and Chinese AI Chips and Implications for National Competitiveness 27 Appendix A: Basics of Semiconductors and Chips 31 Appendix B: How AI Chips Work 33 Parallel Computing 33 Low-Precision Computing 34 Memory Optimization 35 Domain-Specific Languages 36 Appendix C: AI Chip Benchmarking Studies 37 Appendix D: Chip Economics Model 39 Chip Transistor Density, Design Costs, and Energy Costs 40 Foundry, Assembly, Test and Packaging Costs 41 Acknowledgments 44 Center for Security and Emerging Technology | 2 Introduction and Summary Artificial intelligence will play an important role in national and international security in the years to come. -
AWARDS SESSION New Orleans Convention Center New Orleans, Louisiana Tuesday, 18 November 2014
Association for Computing Machinery AWARDS SESSION New Orleans Convention Center New Orleans, Louisiana Tuesday, 18 November 2014 SC14 Awards Session will honor the following individuals for their contributions to the computing profession: Charles E. Leiserson 2014 ACM/IEEE Computer Society Ken Kennedy Award Satoshi Matsuoka 2014 IEEE Computer Society Sidney Fernbach Award Gordon Bell 2014 IEEE Computer Society Seymour Cray Computer Engineering Award The Kennedy Award is presented by ACM President Alexander L. Wolf and Computer Society President Dejan S. Milojičić. The IEEE Computer Society Seymour Cray and Sidney Fernbach Awards are presented by 2014 IEEE Computer Society President Dejan S. Milojičić. The 2014 ACM/IEEE Computer Society Ken Kennedy Award ACM/IEEE Computer Society Ken Kennedy Award The Ken Kennedy Award was established in memory of Ken Kennedy, the founder of Rice University’s nationally ranked computer science program and one of the world’s foremost experts on high-performance computing. The award consists of a certificate and a $5,000 honorarium and is awarded jointly by the ACM and the IEEE Computer Society for outstanding contributions to programmability or productivity in high-performance computing together with significant community service or mentoring contributions. http://awards.acm.org http://computer.org/awards PREVIOUS RECIPIENTS — ACM/IEEE COMPUTER SOCIETY KEN KENNEDY AWARD 2013 - Jack Dongarra 2012 - Mary Lou Soffa 2011 - Susan L. Graham 2010 - David Kuck 2009 - Francine Berman 2014 ACM/IEEE COMPUTER SOCIETY KEN KENNEDY AWARD SUBCOMMITTEE Mary Hall, University of Utah, Chair David Rosenblum, National University of Randy Allen, National Instruments Singapore Keith Cooper, Rice University Valentina Salapura, IBM Susan Graham, University of California, Berkeley* David Padua, University of Illinois at Urbana- Champaign *Previous recipient Charles E. -
Tushar Krishna
Tushar Krishna 266 Ferst Drive • School of Electrical and Computer Engineering • Atlanta, GA 30332, USA PHONE (+1) 206 601 6213 • E-MAIL [email protected] • WEB http://tusharkrishna.ece.gatech.edu ……………………...…………………….…………………….…………………….…………………….…………………….………………………………...………… RESEARCH INTERESTS Computer Architecture: multicore, parallel, heterogeneous, spatial, AI/ML accelerators Interconnection Networks: Networks-on-Chip, HPC switches, data-centers, FPGA networks ……………………...…………………….…………………….…………………….…………………….…………………….………………………………...………… EDUCATION Feb 2014 Massachusetts Institute of Technology Ph.D. in Electrical Engineering and Computer Science • Advisor: Li-Shiuan Peh • Committee: Srinivas Devadas and Joel Emer • Thesis: “Enabling Dedicated Single-Cycle Connections Over A Shared Network-on-Chip” Sep 2009 Princeton University M.S.E. in Electrical Engineering • Advisor: Li-Shiuan Peh • Thesis: “Networks-on-Chip with Hybrid Interconnects” Aug 2007 Indian Institute of Technology (IIT), Delhi B.Tech. (Honors) in Electrical Engineering ……………………...…………………….…………………….…………………….…………………….…………………….………………………………...………… PROFESSIONAL APPOINTMENTS Sept’19 -- Georgia Institute of Technology, Atlanta, GA, USA present ON Semiconductor Professor (Endowed Junior Professorship) School of Electrical and Computer Engineering Aug ’15 – Georgia Institute of Technology, Atlanta, GA, USA present Assistant Professor School of Electrical and Computer Engineering. School of Computer Science (Adjunct). Jan ’15 – Jul ‘15 Massachusetts Institute of Technology, SMART Center, -
Two Students Named Recipients of 2014 ACM/IEEE-CS George Michael Memorial HPC Fellowships
FOR IMMEDIATE RELEASE Contacts: Virginia Gold Margo McCall 212-626-0505 714-816-2182 [email protected] [email protected] ACM AND IEEE COMPUTER SOCIETY RECOGNIZE CHARLES E. LEISERSON FOR ADVANCES IN PARALLEL COMPUTING SYSTEMS MIT Professor Developed Cilk Multithreaded Programming Technology NEW YORK, September 12, 2014 -- Charles E. Leiserson of Massachusetts Institute of Technology (MIT) will receive the 2014 ACM-IEEE Computer Society Ken Kennedy Award for his influence on parallel computing systems and their adoption into mainstream use through scholarly research and development. He was also cited for his mentoring of computer science leaders and students. Leiserson introduced the notion of cache-oblivious algorithms, which can exploit the memory hierarchy near optimally despite having no tuning parameters for cache size or cache-line length. He also developed the Cilk multithreaded programming technology, and led the development of several Cilk-based parallel chess-playing programs which won numerous prizes in international competition. The award will be presented at the SC14 supercomputing conference on Tuesday, November 18 in New Orleans. The coauthor of “Introduction to Algorithms,” one of computer science’s most cited publications, Leiserson is also the creator of MIT undergraduate courses on algorithms and on discrete mathematics for computer science. He headed the computer science program for the pioneering Singapore-MIT Alliance distance- education program and developed MIT’s undergraduate class on software performance engineering, which teaches parallel programming as one of several techniques for writing fast code. Leiserson’s annual workshop on Leadership Skills for Engineering and Science Faculty has educated hundreds of faculty at MIT and around the world in the human issues involved in leading technical teams in academia.