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The RESEARCH LABORATORY of ELECTRONICS at the MASSACHUSETTS INSTITUTE OF TECHNOLOGY CAMBRIDGE, MASSACHUSETTS 02139
TX-O Computer History
John A. McKenzie
RLE Technical Report No. 627
June 1999 MASSACHUSETTS INSTITUTE OF TECHNOLOGY
RESEARCH LABORATORY OF ELECTRONICS
CAMBRIDGE, MASSACHUSETTS 02139
TX-O COMPUTER HISTORY
John A. McKenzie
October 1, 1974 TX-O COMPUTER HISTORY
OUTLINE
ABSTRA CT PART I (at LINCOLN ABORATORY) INTRODUCTION 1 DESCRIPTION 2 LOGIC 4 CIRCUITRY 5 MARGINAL CHECKING 6 TRANSISTORS MEMORY (S Memory) SOFTWARE (Initial) 9 TX-2 10 TRANSISTORIZED MEMORY (T Memory) 11 POWER CONTROL 12 IN-OUT RACK 13 CONSOLE 13 PART II (at CAMBRIDGE) INTRODUCTION 14 MOVE to CAMBRIDGE 15 EXTENDED INPUT/OUTPUT FACILITY, Addition of 16 FIRST YEAR at CAMBRIDGE 18 MODE of OPERATION 19 MACHINE EXPANSION PHASE 20 T-MEMORY EXPANSION 21 ORDER CODE ENLARGEMENT 22 DIGITAL MAGNETIC TAPE SYSTEM 24 SOFTWARE DEVELOPMENT 25 APPLICATIONS 29 TIMESHARING (PDP-1) 34 CONCLUSION 34 A CKNOWLEDGEMENT 35 BIBLIOGRAPHY TX-O COMPUTER HISTORY
A BSTRA CT The TX-O Computer (meaning the Zeroth Transistorized Computer) was designed and constructed, in 1956, by the Lincoln Laboratory of the Massachusetts Institute of Tech- nology, with two purposes in mind. One objective was to test and evaluate the use of transistors as the logical elements of a high-speed, 5 MHz, general-purpose, stored-program, parallel, digital computer. The second purpose was to provide means for testing a large capacity (65,536 word) magnetic-core memory. The TX-O was so sucessful, including the memory checkout, that construction was begun on the TX-2. During the spring of 1958, the large memory was transferred to the TX-2 and the TX-O was outfitted with a 4096 word, transistor-driven core memory. At that time the computer was moved to the Massachusetts Institute of Technology Campus in Cambridge, on a long term loan basis, to the Electrical Engineering Department. Here it was Jointly supported by the Research Laboratory of Electronics and the Electronic Systems Laboratory, and made available as a do-it-yourself facility where both research- ers and students could work on-line, having direct access to the machine. The desirable features of this, at that time, unusual manner of operation were soon evident and this mode of usage was enhanced by the development of good utility programs0 Further attraction was the very excellent input/output capability allowing for ease of communication with external equipment. The transistorized computer proved to be so reliable that time, normally allocated to scheduled maintenance, was utilized to modify the machine. The core memory was doubled to 8192 words and the order code expanded. This included the addition of an index register. The modifications to the computer continued until 1963, at which time the efforts and funds of the group were directed towards the implementation of a time-sharing system on the PDP-i Computer, which had been donated to the Electrical Engineering Department by the Digital Equipment Corporation. Several of the research groups, on the basis of demonstrated results on the TX-O, were able to negotiate funds to acquire their own computers, and the usage began to taper off. The running-time clock now logs over 49,000 hours. Early in 1976 the TX-O will be moved to the Computer Museum of the Digital Equipment Corporation in Marlborough, Mass, PART I (at LINCOLN LABORATORY)
INTRODUCTION The TX-O Computer (meaning the Zeroth Transistorized Computer) is a 5 MHz, parallel, 18 binary digits, general- purpose, stored-program, digital machine with a cycle time of six (6) microseconds and capable of performing better than 80,000 additions per second. It was designed and constructed at the Lincoln Laboratory of the Massachusetts Institute of Technology by Group 63 of Division 6. The Group Leader was William Papian, with Wesly Clark responsible for the logical design and Kenneth Olsen heading the circuit design and construction aspects. The latter phase of the project was completed by Benjamin Gurley. The memory design and fabrication were the responsibility of Richard Best and Jack Mitchell. The TX-O was conceived with two purposes in mind. The first was to test and evaluate the use of transistor circuitry as the logical elements in a high-speed computer. The second objective was to provide means to test a 65,536 word, 18 binary digits plus parity, vacuum tube, switch- driven, magnetic-core memory. The machine was the third in a succession of transistor- ized experimental digital systems, the first of which was a 100 transistor, double-rank shift register, The second was a small, high-speed, error-detecting multiplier. After some thought about the possible minimal machine, a design was completed in which the word length would be 18 bits, just a half of the final projected form. This computer was referred to as the TX-0 and the projected machine as the TX-2. There was no TX-1i The TX-O became operational in April 1956
1 DESCRIPTION In the original configuration, the TX-O used 16 bits for addressing and two (2) bits were decoded for the four (4) instructions. The addressable instructions were Store Accumulator (sto x), Add Memory to the Accumulator add x), Transfer on Negative Accumulator (trn x), The fourth instruction, the Operate Command, had the feature of provid- ing the facility to microprogram via time-pulses, thus allowing for the possibility of more than one function or register transfer, including input/output transfers, within the two (fetch and execute) cycles. Since all of the Memory Address bits were decoded in this instruction, it had many possibilities and because of this powerful feature, the TX-O proved to be useful, even with the simple order code, as an extremely versatile measuring device. Previous to the time that the TX-O was moved to Cambridge, it was used by Charles Molner, of the Communications Biophysics Laboratory under Professor Walter Rosenblith, to aid in the analysis of brain-wave data gathered from the auditory cortex of a cat'ss brain. The original TX-O included a Memory Buffer Register (MBR, 18 bits plus parity), and an Accumulator (AC, 18 bits), arranged as a ring adder. The one's complement arithmetic and logical operations are done between the MBR and AC. The Memory Address Register (MAR, 16 bits) and the Program Counter (PC 16 bits) along with the Instruction Register (IR, 2 bits) and the Live Register (LR, 18 bits) completes the list of active registers. The LR, at that time, was considered as just another storage register, using flip- flops rather than magnetic cores, and was especially useful, in conjunction with the microprogramming, for temporary storage. Provided as a method of manual intervention, in both the test and normal modes, is sixteen (16) words of Toggle Switch Storage (TSS, 18 bits) and the single word registers, Toggle Buffer Register (TBR, 18 bits) and Toggle Switch Accumulator (TAC, 18 bits). The machine has three (3) operating modes, Normal, Test and Read-In. The TX-O is a synchronous machine with the time-pulses generated by ten (10) adjustable delays, forming a chain, with the last time-pulse connected back to retrig- ger the timing chain. Initially the peripheral equipment consisted of a 250 lines/minute Ferranti Photo-Electric Paper Tape Reader that was modified to solid state circuitry, and a modified Flexowriter used to type-in, type-out and to punch-out paper tape.
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__ _ ill __111 __·1_ 1 111141 11---- In 1957, a 10 inch, electro-static deflection, cathode- ray tube, having 512 by 512 addressable locations, in a 7 by 7 inch raster, point by point display system was installed. In 1958, a Light-Pen, a solid state version of an idea being developed for the Sage System, was added to the TX-Oo
3 LOGIC All of the high speed logic is performed with transis- tors, there are no diodes used as logic gates. The TX-O uses RC coupled, negative logic, a "ONE being -3 volts and a "ZERO" being ground level. The AND and OR functions are obtained by mixing and gating levels. The levels are generated by flip-flops which are set or cleared by a gated time pulse.
Timing pulses are negative with an amplitude of from 2.5 to 3.0 volts and a width of 100 nanoseconds. These are generated by vacuum tube circuits and stepped down by pulse transformers to supply the necessary drive currents. The pulse lines are kept as short as possible with the strobe pulses generated directly at the register where they are used.
The flip-flop outputs are fanned out, by means of open wiring, within the Central Processing Unit Rack or via coaxial cable or twisted-pairs, when conveyed any greater distance. All of the logical interconnections, other than the few of those made in coaxial cable, are terminated in taper-pin connections. The flexiblity of this method is very desirable in an experimental machine and along with the modular concept adopted for construction, allowed for the possiblity of the extensive changes which were later under- taken.
Except for the flip-flop module, the transistors are packaged one, two or three in a plastic, plug-in bottle, with the transistor leads brought out to the base. The importance of this type of construction will be evident later, when the ideas of transistor life history are discussed.
4 CIRCUITRY The logical elements of the TX-O use surface-barrier transistors and are formed from saturated inverter and saturated emitter-follower combinations. A two transistor cascode configuration, with fast rise and fall times, is used as a power amplifier. This is similiar to the TTL circuit used today in medium speed integrated circuits. The TX-O flip-flop module, an Eccles-Jordan flip-flop circuit, is capable of 5 MHz operation, has a built-in logical delay and uses 10 transistors including the cascode buffered outputs which give it good driving ability. The built-in delay in flip-flops allows the information clocked into a flip-flop to be a function of that flip-flop's outputs. A dozen different types of plug-in-units are employed. Power supply voltages are +10, -3 and -10 volts. The inverter units have positive bias, calculated so that there is a safety margin in both the cut-off and the saturated conditions. The careful, conservative circuit design, allowed for a wide variation in the transistor parameters and operating conditions and effort was made to minimize the effects of them.
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_1_1_ ·11_1_ _1 _ ___IIIIYIII·___1111_ ^.- -_I -·lm - .--- 1 --·11I.(.-_-- II L-.^-·--- I I - MARGINAL CHECKING The transistors in the computer are checked, while running a diagnostic type program in the Normal mode, by the use of the Marginal Check Panel. This selection panel provides a means to select any one of thirty (30) different lines, or sections, in the computer. In most cases, marginal checking of these lines allows for a +10 or -10 volt excursion on the +10 volt bias to the base of the inverters, including the inverters in the flip-flops, without causing the unit to malfunction. In practice, from a preventative maintenance point of view, after the machine had been in operation for several hundred hours, and except when modifications were made to it, the greatest value of the marginal checking was to discover deterioration in the amplitude of the time pulses generated by the 100 vacuum tubes, Of course the system was invaluable as an aid in inducing the infrequent type of failure and assists in finding machine faults before they become serious enough to decrease reliability.
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_ ·_ _ I _ _ _ 1 1 I· Il--_I U --·-^Y^ ^CIL- ---_I- ___L--I- -LI II I -..---- TRANS ISTORS The type L-5122 transistors used in the TX-0 were developed by the Philco Research Division under a subcon- tract, to determine a set of specifications that would guarantee the switching properties of the surface-barrier transistor (SBT) and to develop the necessary test facili- ties to measure their essential parameters. These transis- tors were later commercially available as the 2N240. Each transistor was carefully tested before being accept- ed for the TX-0 and a record of the measured parameters was maintained. In 1958, after 6000 hours of operation, some 800 transis- tors were removed and retested. The most serious change was found to be a slight decrease in current gain. In 1959, after 10,000 hours of operation, these same transistors were again tested. The changes in the last 4000 hours were smaller than those of the first 6000 hours. A Lincoln Laboratory Technical Report was published, with detailed presentation of the test data, for each of the tests. The summary of the second report stated, that after 10,000 hours of operation, the surface-barrier transistor is shown to be a reliable computer transistor if used, within limitations of power, in circuits with adequate margins. This was the last time that the extensive testing was done. At the time that this is written in 1974 , there is close to 49,000 hours of operation on these original transistors, with fewer than a dozen failures. The transistor selection and evaluation was directed at Lincoln Laboratory by Donald J. Eckl and Robert J. Burke.
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_ s_ _I_ Ir _·(^· · ·II _ II___ _ _I_ _LLI_---. -1111 1- I ·I MEMORY (S Memory) The TX-O first used a high-speed, random access, mag- netic-core memory with a storage capacity of 65,536 words, 19 bits long, including a parity bit. The words were read in parallel with a cycle time of five (5) microseconds. The 80 mils outside diameter, 50 mils inside diameter, ferrite cores, switched with an 820 milliampere current pulse and were manufactured at Lincoln Laboratory. The memory system contained 425 dual triodes and 625 transistors. The cores were fabricated into 64 by 64 subassemblies, each of which was a complete memory plane, and could be tested at this stage of construction. Sixteen (16) 64 by 64 subassemblies were then assembled into an array to form a 256 by 256 plane. Following the initial checkout period, the memory word lengh was doubled to 38 bits.
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_ II _ __ _1_1_1______11_1 11______Illrm^_------C·LI --I ___1_1 I __ SOFTWARE (initial) The availability of the high-speed, large capacity core memory opened the possibility for new techniques and philos- ophies in planning and programming computer applications. One technique was to use the bulk of memory as a secondary storage medium instead of using a drum or magnetic tape A conversion program using this idea was written by Wesley Clark. This was a fast translation program, that allowed the use of symbolic language in address tags, address sections of instructions and constants. Another valuable technique was the utility program writ- ten by Jack T. Gilmore, Jr. to coexist in core memory along with the user's program. This approach allowed the user to communicate with the computer via the on-line typewriter. Numbered among the features were the ability to examine a register, modify the contents of a register or a storage location in memory, search for all occurances of a specific word or address, the ability to list all or any part of a program, and the punchout routine that provided the user with the means to obtain an up to date binary tape of his program as it exists in core. It is interesting to note the lengthy conversational approach that was used. For instance, when a printout was requested, the program responded with the following message, "DO YOU WANT A VERTICAL COLUMN LAYOUT". The required answer was always equally verbose. However there was a BE BRIEF feature that reduced each question to one or two words. At that time, it was felt that only in certain critical situations, would one be able to justify the inefficient use of computer time, by working on-line. Of course that was thinking in terms of computers of that era, only large machines that rented for approximately three hundred dollars an hour. The TX-O was a forerunner in helping to change much of that philosophy.
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