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Technical Details of the Elliott 152 and 153 Appendix 1 Technical Details of the Elliott 152 and 153 Introduction The Elliott 152 computer was part of the Admiralty’s MRS5 (medium range system 5) naval gunnery project, described in Chap. 2. The Elliott 153 computer, also known as the D/F (direction-finding) computer, was built for GCHQ and the Admiralty as described in Chap. 3. The information in this appendix is intended to supplement the overall descriptions of the machines as given in Chaps. 2 and 3. A1.1 The Elliott 152 Work on the MRS5 contract at Borehamwood began in October 1946 and was essen- tially finished in 1950. Novel target-tracking radar was at the heart of the project, the radar being synchronized to the computer’s clock. In his enthusiasm for perfecting the radar technology, John Coales seems to have spent little time on what we would now call an overall systems design. When Harry Carpenter joined the staff of the Computing Division at Borehamwood on 1 January 1949, he recalls that nobody had yet defined the way in which the control program, running on the 152 computer, would interface with guns and radar. Furthermore, nobody yet appeared to be working on the computational algorithms necessary for three-dimensional trajectory predic- tion. As for the guns that the MRS5 system was intended to control, not even the basic ballistics parameters seemed to be known with any accuracy at Borehamwood [1, 2]. A1.1.1 Communication and Data-Rate The physical separation, between radar in the Borehamwood car park and digital computer in the laboratory, necessitated an interconnecting cable of about 150 m in length. It is true to say that the electronic problems of interfacing radar and computer had not been considered at the time of positioning the aerial. There were S. Lavington, Moving Targets, History of Computing, 505 DOI 10.1007/978-1-84882-933-6, © Springer-Verlag London Limited 2011 506 Appendix 1 two coaxial cables, each about 0.25 in. in diameter, connecting computer and radar: one carried a signal derived from the computer’s clock, the other duplexed com- mands and data. On receipt of a command, the radar unit responded by sending back an integer. Parameters received from the radar unit were used by the 152’s software to calculate an updated position of the target aircraft. The computer sent 1,000 pulses per second to the radar (one pulse every millisecond). It was assumed that perhaps one pulse in three would not yield a meaningful return, so there was a need to average over four radar returns when computing trajectories. Therefore, the 152 was required to perform the necessary axis-conversions and to produce one update of {range, bearing and elevation} every 4 ms. Each of the {range, bearing and elevation} parameters was represented to 14-bit accuracy, as were the sine and cosine of the bearing. Fourteen bits gave a precision of better than 1 minute of arc. In addition to any control and/or addressing commands, the data-rates coming into and out of the 152 computer were thus: 14 × 5 × 1,000 = 70,000 bits/s inwards; 14 × 3 × 250 = 10,500 bits/s outwards. A1.1.2 Memory System It was clear that input/output activity would have to be overlapped with computa- tional activity and that the rate of obeying instructions would have to be extremely rapid. Potentially the fastest-access storage technology available in 1947, anywhere in the world, was the CRT electrostatic system being developed by Williams and Kilburn at Manchester University. To begin with, the system was based on William’s original anticipation-pulse method, as patented on 11 December 1946. By the autumn of 1947 this had been refined by Kilburn into two alternative schemes: the dot-dash and the focus-defocus methods. The digit period chosen by Manchester in June 1948 for the University’s small-scale experimental machine (the SSEM) was 8.5 ms. This was considered too slow for the 152 computer which, in 1947, was aiming for a 1-ms digit period (i.e. 1 MHz clock-rate). M V Needham joined Borehamwood in September or October 1947. Maurice remembers [3] that, somewhat later, John Coales came into the Lab one day and said that he had learned that F C Williams was working on electrostatic CRT stor- age and had discovered that one could obtain a pulse that anticipated the present position of the spot on the screen. Coales said that ‘this sounded just the sort of thing that the MRS5 project could make use of for its memory system’, so Borehamwood ‘had got to get on with it’. Maurice set up an experiment to investi- gate what this anticipatory effect might be. He produced a demonstration of the physical effect and indeed found an anticipation pulse. At this point, their experi- mental device ‘was not yet computer-oriented’. Coales then informed Maurice that F C Williams was due to give a talk at the Institution of Electrical Engineers (IEE) on 2 November 1948. Maurice was instructed to be present at the talk and ‘to ask an intelligent question!’ Appendix 1 507 Maurice did indeed ask more than a question. He briefly described Borehamwood’s experience of the anticipation-pulse method, showed a film of their stored patterns, and suggested that the anticipation-pulse method seemed to allow greater speeds of operation than other electrostatic methods. Maurice remembers that F C Williams was scornful of this claim at the time. However, when the results of the meeting were written up and appeared in print [4], Williams and Kilburn stated that ‘we now agree with Mr Needham’. The anticipation-pulse method of CRT storage was used for the Elliott 152 com- puter and, initially, in the Elliott 153 computer. A1.1.3 CPU Design In 1949 Harry Carpenter, who was placed in charge of the central processor, decided on a modular architecture for the 152. The computer was to have multiple functional units, each addressable and each connected to a bus [1]. Multiple simul- taneous transfers of data could occur between stores and the various parts of the arithmetic unit. In this respect, the 152’s architecture was markedly different from that of contemporary projects elsewhere. The 152’s working memory was parallel- access Williams Tubes, with 16 tubes storing 256 digits each [5]. In modern terms, this gave the computer 512 bytes of RAM (random-access memory). The general layout of highways and functional units for the 152 computer (see Fig. A1.1) was similar to that of the 153 computer, illustrated later in this appendix. DATA IN ACC M S1 S2 ALU MPY MX MX MX MX MX MX DATA M OUT X Fig. A1.1 The few original research reports for the Elliott 152 computer to have survived are not easy to interpret. This conceptual diagram shows, in modern terminology, how the 152’s architec- ture was based on low-level functional parallelism. Concurrent transfers between sub-units were permitted within a single instruction. In the diagram, S1 and S2 are RAM caches. MX indicates multiplexer units. MPY is a fast multiplier unit and ALU provides other functions such as ADD, SHIFT, etc. 508 Appendix 1 Having devised the fastest practicable memory-access time, the next challenge was to design a fast multiplier. With 16-bit words and a digit period of 3 ms, it was found possible, with a series/parallel ‘wiffle-tree’ design, to perform a complete multiplication every 60 ms. The basic control cycle of the machine was then based upon a ‘beat’ of 60 ms, corresponding to 16 digit periods plus a 4-digit gap. A serial addition could be performed within this 60-ms period. Harry Carpenter knew that the above memory and arithmetic unit characteristics, if used in the conventional single-instruction, single-data mode of computer opera- tion, would still not have given sufficient performance for real-time digital fire control. Therefore, provision was made for a number of instruction streams to be executed in parallel. Each of four programs was stored in a read-only memory so that the calculations for bearing, range and elevation could proceed simultaneously. Other sequences co-ordinated the overall trajectory-prediction activity and con- trolled input and output to/from the 152. Each of the fixed programs was held on a glass slide or card (both systems were tried), with binary ones and zeros being rep- resented by clear or opaque spots (or by punched holes or no holes in the card). The slides (or cards) were read by a CRT flying-spot scanner. No further details have come to light. The 152’s instruction length was 20 bits. Each slide (or card) held 16 instruc- tions. The instruction format would seem complex to modern eyes, since it gave the programmer the sort of low-level control normally associated with microprogram- ming. Having a series of fixed programs held in read-only memory (ROM) meant that the 152 was not, strictly speaking, a universal stored-program computer. The emphasis was on speed of access to predetermined standard program sequences, for which some form of fast ROM was the main requirement. Numbers were represented in the Elliott 152 as two’s complement fractions, but with the implied point being two positions from the most significant end – (see Chap. 2 for the full explanation). The 152’s multiplier, as first designed and as used later as the starting point for the Elliott 401’s multiplier, gave correct answers for positive numbers only [1]. There was no need for negative multiplications in the 152’s algorithms.
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