2B1Q, 142–143 4B3T Modified Monitored State

Derickson.book Page 911 Thursday, November 8, 2007 11:11 AM

Index

2B1Q, 142–143 optical sampling demonstrations, 427 4B3T modified monitored state (MMS43), optical waveform measurement techniques, 423 142–143 optical waveform sampling, 423–426 4B5B block substitution, 70–74 See also All-optical sampling implementations, 4B5B encoder efficiency, 89 experimental; Fiber FWM-based sampling 8B10B system, performance analysis of; Optical block substitution, 74–77 sampling principles; Sampling gate control words, 154, 162 implementations; Third-order nonlinearity- encoder efficiency, 89 based sampling; Timebase designs encoding rules, 862–872 All-optical sampling implementations, 10GBase control codes, 157 experimental 10GBase stress testing, 619–628 analog-to-digital conversion of acquired 10GBase-KR, 642, 651–654 samples, 480–482 10GBase-LR, 619 χ2-based sampling in bulk KTP, 482–484 10GBase-LRM, 634 χ2-based sampling using quasi-phase matching 64B66B encoder in PPLN, 484–486 code blocks, 160 χ3-based Kerr switch with parametric gain in control characters, 157 HNLF, 487–488 deserializer architecture, 158 χ3-based sampling system using XPM-induced frame structure, 161 frequency shift in HNLF, 486–487 scrambler, 162–163 coherent detection sampling (linear sampling), serializer architecture, 158 489–491 fiber FWM-based sampling in HNLF, 488–489 A gain-transparent ultrafast nonlinear interferometer, 489–490 Accelerated BER measurements, 192 optimization for 40 Gbit/s signals, 491–492 Active bias T, 122–123, 902–910 sampling pulse sources, 475–480 Add/drop multiplexers (ADMs), 590 selected implementations, 482–492 Adjustable offset amplifiers, 552 All-zero state, 821–823, 827 ADSL (Asymmetric DSL), 140, 144–145 Alternate mark inverted (AMI) encoding rule, Aggregate deterministic jitter, 403 97–99 Aggregate total jitter, 403–404 Amplification, 384 Aliasing, 258, 262, 298–299, 480, 640 clock phase noise, 40 All-optical sampling for high-speed waveform parametric amplification, 436, 488 analysis variable gain preamplifier, 245–246 electronic sampling, comparison with, 422–423 See also Preemphasis

911 Derickson.book Page 912 Thursday, November 8, 2007 11:11 AM

912 Index

Amplified spontaneous emission (ASE), 486, 581, Attenuators 607–613, 616–617 fixed step, 836–837 Amplifiers optical, 567–569, 636 buffer, 123, 880, 908–910 variable optical, 131–138 error, 66, 511–512, 516–521, 873–875 Autocorrelation, 423, 450, 825–826 optical, 362, 578, 581, 609–610, 617 Automatic mask testing, 364–365 power, 122–123 Avalanche photodetectors (APDs), 424, 457, 464, See also Erbium-doped fiber amplifiers 492, 564, 572, 623–624 (EDFAs); Semiconductor optical amplifiers Average optical power, 619–623 (SOAs); Transimpedance amplifiers (TIAs) Averaging AM-to-PM conversion, 115 in configuration of network analyzer hardware, Analog CDR circuits, 11 727 Analog phase detection, 512–513 magnitude spectra, 296 Analog receiver characteristics, estimating noise, 473 digitally, 585–588 reducing noise impact on eye diagrams, 345–346 Analog-to-digital conversion (ADC) of acquired See also Trace averaging samples, 480–482 Analog-to-digital converters (ADC), 92–95, 98, 245 B Analog-to-digital sampling, 92–94 Analysis methods (approaches) B8ZS encoding, 99 comparison for DDJ and DCD, 293–295 Backplane, 172, 175, 606 comparison for PJ, 296–299 communication, 642, 651–654 pattern-correlation-based for DDJ and DCD, test sytem, 702–703 291–293 See also Backplane modeling residual for PJ extraction, 296 Backplane modeling spectrum analysis for composite jitter, 300–302 daughtercards assembly, 703 spectrum analysis for PJ extraction, 295–296 eye diagrams, 708–709 spectrum analysis for RJ extraction, 283–289 impedance values, 706 spectrum-based for DDJ and DCD, 289–291 SPICE simulation, 705 tail-fit for RJ extraction, 286–289 topological model, 702 Analysis of waveforms, 350–353 waveforms, 703–704 APDs. See Avalanche photodetectors (APDs) Ball grid array (BGA), 696–697 Arbitrary waveform generators (AWGs), 547–549 Band-pass filters Architecture insertion loss, 768–770 FBDIMM, 795–797, 804–806 measurements summary, 770–771 forwarded clock systems, 816 receivers based on, 720 network analyzers, 716–719 return loss, 767–768 PCI Express, 789–795, 800–804 Band-pass response, 98, 112–114, 880–902 real-time oscilloscopes, 245–250 Bandwidth sampling oscilloscopes, 335 cost of, 332 SATA, 797–800, 807–810 effect on waveform results, 353–358 ARCNET, 87–88 front-end, 256–257 Asymmetric crosstalk, 144 full width at half maximum (FWHM), 613 Atomic clocks, 106 and ISI, 40 Attenuation, 26, 616, 633, 653 limitations, 40 ratios, 836–837 relationship equations, 303, 331–332 See also Deemphasis sample rates, 331–335 Derickson.book Page 913 Thursday, November 8, 2007 11:11 AM

Index 913

Bang-bang phase detectors, 513–514 loopback configurations, 174 Barkhausen criteria, 506 mean time between errors (MTBE), 171 Baseline wander, 13, 15, 108–113, 845–846 pattern generator (PG), 171–173 Bathtub curve, 325 receiver setup, 175–176 linear scale, 202–203 sampling rate, 266 logarithmic scale, 203 SERDES devices, 172–174 Q scale, 203–205 setup, 171–174 Behavioral modeling, 695–696 synchronization, 176–177 BER (bit error ratio), 170–171, 222–225 system bit error ratio, 193 confidence intervals for, 583 target bit error ratio, 177–178 level in RJ/DJ separation settings, 313 test pattern selection, 174–175 BER calculations in real communications systems testing in Ethernet, 597–602 BERT testing in Ethernet, 597–602 BERT scan measurements frame error ratio, estimating, 599–600 base bit error ratio, 222–225 frame-by-frame testing, advanced, 600–601 bathtub curve, 202–205 frame-by-frame testing, simple, 598–599 BERT eye masks, 237–238 sequencing, 602 bit error ratio eye diagram, 229–233 SONET/SDH, analyzing BER measurements contour plots, 231–232 in, 592–596 fast total jitter optimization, 219–222 SONET/SDH description, 589–592 full eye scan, 228–238 BER eye diagram gradient maps, 233–234 contour plots, 231–232 jitter histogram, 205–206 pseudo-color plots, 229–230 logarithmic scale, 203 three-dimensional plots, 232 low-frequency jitter, 225–226 BER measurements in Ethernet measurement procedure, 213–215 BERT testing, 597–602 median filter, 206 frame error ratio, estimating, 599–600 number of errors optimization, 218–219, 222 frame-by-frame testing, advanced, 600–601 periodic jitter level, 207–210 frame-by-frame testing, simple, 598–599 phase margin, 210 sequencing, 602 pseudo-color plots, 229–230 BER measurements in SONET/SDH Q factor method, 210–213 analysis of, 592–596 random jitter level, 207 SONET/SDH description, 589–592 sample delay scan, 200–226 BER tests and signaling for chip-to-chip link sample point optimization, 215–218 systems sample threshold scan, 226–228 FBDIMM architecture and testing, 804–806 scope-like eye diagram, 233–234 JNB testing for multiple-Gb/s standards, 810 spectral jitter decomposition, 238–241 PCI Express architecture and testing, 800–804 successive refinement algorithms, 237 SATA architecture and testing, 806–810 three-dimensional plots, 232 BER vs. OSNR, 609–618 total jitter, 210 Berlekamp-Massey algorithm, 823 Bessel filter design, 369–371 BERT (bit error ratio testing) Bessel null measurement method, 553–555 accelerated BER measurements, 192 Bessel-shaped receiver, 481 band-pass response, 112–113 Bessel-Thomson (BT) filter, 625, 638–639, BER statistics, 178–192 646–648, 843–844 bit error rate, 171 Bessel-Thomson reference receiver, 268 definitions, 170–171 Bias networks, 85, 112, 122–123, 886, 892, error detector (ED), 171–174 900–901 Derickson.book Page 914 Thursday, November 8, 2007 11:11 AM

914 Index

Bias Ts, 121–123, 845–846, 902–910 χ3-based sampling using XPM-induced frequency Bimodal digital data signal, 200–201 shift in HNLF, 486–487 Binary data properties, 13 Cables Binary line codes, 14–20 coaxial cable standards, 857 Binary-to-ternary conversion, 98 matching, 775–777 BIP (binary interleaved parity) codes, 592–596 phase matching of, 773–775 Bipolar return-to-zero (BPRZ) code, 20 See also Coaxial cables Birefringent phase matching, 428–430, 443 Calibration in jitter tolerance testing Bit error rate, 171 description, 553 Bit error ratio (BER). See BER (bit error ratio) J1/J0 measurement method, 555 Bit error ratio testing (BERTs). See BERT (bit measuring SJ with spectrum analyzer, 553–555 error ratio testing) Calibration options in frequency domain Bit labels, 264 measurements Bit periods, 31–33, 196 calibration process, 749 Bit stuffing, 97, 102, 104 one-port calibration, 747–748 Black box models, 695–696 response calibration, 747 Blackman-Harris window, 283 two-port calibration, 748 Block codes, 22–23 CAN (Controller Area Network), 88 BNC connectors, 858 Capacitance Bondwire, 659–660, 668 coaxial structures, 848–849 Bounded uncorrelated jitter (BUJ), 289, 320–321, fringing, 676 550 lossless transmission line, 659 Bounding box, 234–235 parasitic, 111–112, 564, 873, 880, 885, 890, BRI (Basic Rate Interface), 142, 144 899–901 Brownian noise, 281 power plane, 124 Buffer amplifier, 123, 880, 908–910 susceptance, 854–855 BUJ (bounded uncorrelated jitter), 289, 320–321, Capacitive discontinuity, 673, 692 550 Capacitive termination, 669–670 Bulk crystal length, optimum, 443–444 Capacitor coupling network, 107–108, 110–113 Bulk KTP, χ2-based sampling in, 482–484 Capturing waveform records, 262 Bulk nonlinear crystals, χ2-based gates in, Carrier sense multiple access collision detect 443–444 (CSMACD), 68, 150, 862n, 871n Butterworth filters, 256, 324, 843–844 Carrierless Amplitude Modulation (CAP), 148 CDR circuits. See Clock data recovery (CDR) circuits C Central Limit Theorem, 85, 282 Channel equalization, 249 χ2-based gates Channel test implications bulk nonlinear crystals, 443–444 FBDIMM interoperability, 796 quasi-phase matching, 445 PCI Express interoperability, 792–793 χ2-based sampling SATA interoperability, 799 in bulk KTP, 482–484 Characteristic impedance, 706, 759–760, 849–850 quasi-phase matching in PPLN, 484–486 Characteristic polynomial, 820–821 χ3-based gates Characterizing coaxial cables, 773–775 cross-phase modulation, 447–448 Chebyshev filter, 843–844 phase matching, 446–447 Chromatic dispersion, 433, 437–438, 451, 453, χ3-based Kerr switch with parametric gain in 466, 473–474 HNLF, 487–488 CID (consecutive identical digits), 517, 541 Derickson.book Page 915 Thursday, November 8, 2007 11:11 AM

Index 915

Circular QAM, 145–147 characteristic impedance, 849–850 CJTPAT (Compliant Jitter Test Pattern), 290, 322, dielectric loss, 854–855 541 loss reduction, 855–856 Clock data recovery (CDR), 9–15, 34, 128, non-TEM modes, 853–854, 859 136–137, 173–175, 829 propagation velocity, 850–851 Clock data recovery (CDR) circuits skin effect, 851–853 analog phase detection, 512–513 transmission loss, 851–855 definition, 512, 565 Coax-to-microstrip transition, 697–700 digital phase detection, 513–517 Coherent detection sampling (linear sampling), See also Clock recovery 440–441, 448, 489–491 Clock modulation circuits, 541–544 Common mode, 679, 681–682, 684 Clock phase noise, 40, 526 Common-mode measurements, 681 Clock recovery Common-mode noise, 25, 149, 702, 794, 839–840 circuits, types of in SATA, 798 Common-mode performance, 682 description, 407–408 Common-mode signaling, 678–681 in eye diagram construction, 264–265 Communication protocols, 67–68 in manually configured measurements, Compensation, passband, 249 312–313 Complementary CDF (CCDF), 298, 318 phase error measurement, 529–530 Complementary error function (erfc), 578 See also PLLs and clock recovery dynamic inverse (Inverfc()), 580 behavior; Recovered clock triggers’ effects Complex scattering parameters. See S-parameters on jitter analysis Complex spectrum, 296, 298–299 Clock recovery PLLs, 521 Compliant Jitter Test Pattern (CJTPAT), 290, 322, Clock recovery unit (CRU), 66, 131–134 541 Clock synthesis and phase locked loops, 510–512 Components of jitter, 388–393 Clocking, 12, 31, 150 Composite jitter, 299–302 Clocks Compression effect, in eye diagrams, 229, 231 deriving from data stream, 343–344 Conditional de-phase (CDP) code, 20 divided, 341 Conductor loss, 660 reference clock testing, 813 Confidence intervals (CI), 184–189, 582–584 See also Triggering Confidence levels, 178, 189–190 Closed-loop gain, 117–118, 409, 511, 874–876 Consecutive identical digits (CID), 517, 541 Coaxial cables, 666, 676 Contour plots, 231–232 connecting, 724 Converters, electrical-to-optical (E/O), 567 construction, 856–857 Convolution, 45–52 differential cable pairs, 857 Convolution method, 790 EMI, 659–660 Correlated jitter, 392, 400 matching, 775–777 Coupled interconnects, 676–679 phase matching of, 773–775 Crest factor, 548 RG standards, 857 Cross-phase modulation, 427, 486–489 semirigid, 772 Cross-phase modulation and χ3-based gates, Coaxial connectors 447–448 connector grades, 858 Cross-phase-modulation-based sampling gates, general-purpose connectors, 858 431–433, 451 high-performance connectors, 859 Crosstalk, 40, 144, 148, 666, 677, 678, 682 making connections, 859 CRpat, 541 Coaxial structures Crystal length, optimum, 443–444 capacitance and inductance, 848–849 Crystals, χ2-based gates in, 443–444 Derickson.book Page 916 Thursday, November 8, 2007 11:11 AM

916 Index

Cumulative density function (CDF), 37, 53, Dense Wavelength Division Multiplexing 186–190, 200, 202 (DWDM), 607, 613 complementary CDF (CCDF), 298, 318 Depth of penetration, 662, 851–852 Cycle-to-cycle jitter, 33–34 Deskewing probes, 306–309 Cyclic redundancy checksum (CRC), 95, 192, Deterministic bit errors, 178 598–602 Deterministic impulses, identifying, 285 Deterministic jitter (DJ), 41, 110, 137–139 aggregate DJ value, 403 D correlated, 389 peak-to-peak, 53–58 Dark levels, 374 RJ/DJ separation settings, 313 Data pattern properties, PRBS separation, 320, 405, 540 autocorrelation, 825–826 spectrum analysis of composite jitter, 302 decimation, 826–827 and total jitter, 283 frequency spectrum, 826 uncorrelated, 389–393 mark density (MD), 823–824 See also PJ or SJ (periodic or sinusoidal jitter); multiplexing, 827–828 RJ (random jitter); RJ/DJ models for jitter run length distribution, 824–825 measurement Data-correlated jitter DFB (distributed feedback) laser, 477 duty cycle distortion (DCD), 551–552 Dielectric constant, 672 intersymbol interference, 550–551 Dielectric insulation materials, 856 Data-dependent jitter (DDJ), 34, 36, 41, 280, Dielectric loss, 659–661, 663, 851, 854–855, 859 289–295, 390, 405 Dielectric loss tangent, 663 DC blocks, 845 Dielectric materials, 759–760 DCD (duty cycle distortion or jitter) Differential amplitude, 839 data-correlated jitter, 551–552 Differential cable pairs, 857 definition, 274, 405 Differential code, 19–20 description, 390–391 Differential group delay (DGD), 489 effects and causes, 289–295 Differential limiting amplifier, 544 relation to data pattern, 280 Differential Manchester code (DMC), 19–20 DDJ (data-dependent jitter), 34, 36, 41, 280, Differential noise, 839–840 289–295, 390, 405 Differential phase shift keying (DPSK), 492 DDR (double data rate), 7–8, 14 Differential probes, 305–307, 667–668 DDR-2 SDRAM, 7 Differential quadrature phase shift keying Decimation, 826–827 (DQPSK) format, 493–494 Decision circuit, 634, 639 Differential signalling, 23–26, 262, 668, 676–681, Decision feedback equalization (DFE), 268, 278, 737, 839, 857 817 Differential S-parameter quadrant, 682 Deemphasis, 26, 268, 276, 789–791, 801, 805, 841 Differential transmission line measurements See also Attenuation differential measurements, 780–782 Delay, 6–8 single-ended measurements, 779–780 Delay line oscillators, 509–510 Differential transmission lines, 778, 783 Delay modulation, 544–547 Differential wire pairs, 96–98, 142–145 Delay offsets, 175–177, 197–202, 205, 207, 212, Digital phase detection 215 bang-bang phase detectors, 513–514 Delay sweep, 212–213 Hogge phase detectors, 515–517 Demodulation, 20, 145, 523–524, 528 linear phase detectors, 514–515 Demultiplexer, 72, 78, 612 Digital receivers, optical, 564–565 Derickson.book Page 917 Thursday, November 8, 2007 11:11 AM

Index 917

Digital sampling oscilloscope (DSO), 573–576, Duty factor, 68–72, 75, 872–876 638–641 Dynamic range measurements, 684–689 Digital shift register, 634, 653 Digital signal processing (DSP), 249–250 Digital-loop carriers (DLCs), 90–91 E Digital-to-analog converter (DAC), 94, 543, 547, 549 ED (end delimiter), 598 Diodes, varactor, 509, 545 Edge resolution optimization, 216–217, 222 Dirac models Edge times, finding, 262–264, 351 dual Dirac equivalent jitter (Fibre Channel), 317 Elasticity, 12, 173–174 dual Dirac model, 317 Electrical characteristics of interconnects, 658 dual Dirac Q scale method (PCI Express and losses in interconnects, 659–664 FBDIMM), 318–319 lossless transmission line, 659 tail-fit for, 286–287 Electrical length Direct-coupled transceivers, 87–88 general transmission lines, 760–761 Discrete Fourier transform (DFT), 283, 300–301 precision 3.5 mm adapter, 766 Discrete Multitone (DMT) modulation, 148 Electrical noise, 334 Dispersion. See Chromatic dispersion; Electronic Electrical signalling dispersion compensators (EDCs); Group- differential signalling, 23–26 velocity dispersion (GVD); Intersymbol preemphasis, 26 interference (ISI); Polarization-mode single-ended signalling, 23 dispersion (PMD); Transmitter Waveform Electrical-to-optical (E/O) converter, 567, 622, Dispersion Penalty (TWDP) 636–637 Dispersion slope, 435–438, 450–453 Electromagnetic interference (EMI), 253, 659, Distributed feedback (DFB) laser, 477 682 Divided clocks, 341 Electromagnetic susceptibility (EMS), 682 DJ(δδ), 54–58 Electronic dispersion compensators (EDCs), DLL (delay locked loop), 8, 264 629–634, 637, 639 DPSK (differential phase shift keying), 492 ISI, 631–634 DQPSK (differential quadrature phase shift Embedded clock serial systems, 8–12 keying) format, 493–494 Embedded clock systems, 12, 18 Drift, 34, 106, 128, 225 Encoder (64B66B) Drift errors, 741 code blocks, 160 DSL Access Multiplexer (DSLAM), 144, 148 control characters, 157 DSL (digital subscriber loop), 140, 144–148 deserializer architecture, 158 Dual Dirac distribution, 46 efficiency, 89 Dual Dirac equivalent jitter (Fibre Channel), 317 frame structure, 161 Dual Dirac model, 52–58, 287, 296, 313, 317, serializer architecture, 158 402–403 Encoder runtime limits, 872–876 Dual Dirac Q scale method (PCI Express and Encoders and modulation code, 68 FBDIMM), 318–319 4B5B block substitution, 70–74 Dual inline memory modules, fully buffered. See 8B10B block substitution, 74–77 FBDIMM direct-coupled transceivers, 87–88 Dual-port network analyzers. See Two-port encoder efficiency, 88–89 network analyzers Manchester encoding, 69–70 Duroid, 663 scrambler encoders, 84–87 Duty cycle distortion or jitter (DCD). See DCD SONET telecommunication system, 77–83 (duty cycle distortion or jitter) End delimiter (ED), 598 Derickson.book Page 918 Thursday, November 8, 2007 11:11 AM

918 Index

Equalization Eye diagrams (patterns) channel, 249 averaging to reduce noise impact on, 345–346 coefficients, 634 description, 258, 278–279 filters, 268 equivalent-time instruments, 265–266 receiver, 26, 268, 278, 572 eye amplitude, 360, 361, 364, 387 transmitter, 276, 789–790 eye rendering, 259 transmitter-side, 268 histogram measurements, 271 Equivalent series inductance (ESL), 906 mask testing, 275–277 Equivalent series resistance (ESR), 906 mask violation tracking, 277 Equivalent-time instruments, 265–266 measurements, 269–275 Equivalent-time oscilloscopes, 332 rendering, 259 Equivalent-time rendering, 266–267 signal quality information, extracting, 359–362 Equivalent-time sampling using hardware splintering, 278 synchronization unit intervals, 258 random sampling, 468–469 Eye diagrams, construction of sequential sampling, 467–468 alternate triggering schemes, 341–344 Erbium-doped fiber amplifiers (EDFAs), 101, 444, clocks, deriving from data stream, 343–344 449, 464, 479, 486, 581, 607–610 clocks, divided, 341 Error amplifier, 66, 511–512, 516–521, 873–875 description, 260–269, 338–341 Error bars, 203 triggering directly on data, 341–343 Error correction and calibration methods Eye diagrams, measurements of calibration options, 745–749 description, 358–359 computing actual device responses, 743–745 eye mask testing, 362–371 measurement errors, 741–742 Golden PLLs, triggering for transmitter testing, Error detectors (ED), 171–176, 195, 537–538, 568, 380–382 569 optical modulation amplitude (OMA), 379–380 Error function, 42, 48, 53 signal quality information, extracting from eye inverse, 203–204 diagrams, 359–362 Ethernet, 149–163 See also Extinction ratios of laser transmitters 8B10B encoding, 74, 862 Eye height, 272–273 BER measurements in, 597–602 Eye line traces, 346 JK control word, 73 Eye mask, 237 Manchester encoding, 69–70 Eye mask testing XAUI, 151–156 automatic mask testing, 364–365 See also Gigabit Ethernet description, 362–363 Even mode, 677–679, 706 dimensions and coordinate systems, 363–364 Exclusive OR phase detectors, 511–514 failures, root causes of, 367 Extinction ratio margins, 365–366 Gigabit Ethernet, 622–624 on real-time instruments, 275–277 OMA, 621 reference receiver, 369–371 Extinction ratios of laser transmitters shapes, 367–369 dark levels, 374 Eye opening, 229–231, 234–237, 623 description, 371–374, 574n3 Eye rendering, 259, 262–264, 266, 267, 269, 277 efficiency and measurement, 371–374 Eye scan, 228–229 equation definition, 273 BERT eye masks, 237–238 histograms, 373 bit error ratio eye diagram, 229–233 measurement accuracy, 374–379 calculated values, 234–236 signal-to-noise ratios, 377 contour plots, 231–232 Derickson.book Page 919 Thursday, November 8, 2007 11:11 AM

Index 919

optimizations, 236–238 Fixed step attenuators pseudo-color plots, 229–230 attenuation ratios, 837 scope-like eye diagram, 233–234 resistor values, 837 successive refinement algorithms, 237 SNR, 836 three-dimensional plots, 232 Flicker noise, 282 Eye width, 273, 361 Forward error correction (FEC), 22–23, 192, 609 Forwarded clock architecture, 816 Four-port devices and S-parameters F description, 734 differential measurements with coupling, False lock, 177 735–738 Faraday cage, 123, 125 measurements without coupling, 734–735 FBDIMM, 318–319, 804–806 single-ended measurements with coupling, 735 Feedback loop, 312, 314, 507, 510, 520, 653 Four-wave-mixing-based sampling gates, 434–437 Feed-forward, 633, 640 FR4 (Flame Resistant 4 printed circuit board Ferrite bead, 887–889, 901 material), 267, 654, 663–664, 674, 693, 778 Fiber Frame check sequence (FCS), 588, 597–598 multimode, 87, 567–569, 606, 631, 634–637 Frame error ratio, estimating, 599–600 single-mode, 131–134, 474, 566–568 Frame overhead, 142 Fiber Distributed Data Interface (FDDI), 70, 72, 636 Frame synchronization, 78, 95, 103, 107, 131–132, Fiber FWM-based sampling in HNLF, 488–489 138 Fiber FWM-based sampling system, performance Frame-by-frame testing analysis of advanced, 600–601 description, 448 simple, 598–599 experimental setup, 449–450 Frequency domain analysis, 715–716 optical bandwidth, 453–455 Frequency domain characterization sampling sensitivity, 455–457 accuracy, 689 temporal resolution, 450–453 dynamic range measurements, 684–689 Fiber in the loop, 97 frequency domain network analysis (FDNA), Fiber laser, 479, 482–483 682–684, 687 Fiber optics, 69 S-parameters, 679–684 laser emitters, 87 time domain network analysis (TDNA), stress tests, 607 682–684 transceiver modules, 124–125, 136–139 Frequency domain measurements Fiber-to-the-home (FTTH), 148–149 band-pass filter, 767–771 Fibonacci implementation, 820–823 differential transmission line, 778–783 Fibre Channel, 642 error correction and calibration methods, Methodologies for Jitter and Signal Quality 740–749 Specification (MJSQ), 30, 140 example devices, 758–767, 783 SAN standard, 862–872 frequency domain analysis, 715–716 Fibre Channel Physical and Signaling Interface graphical representations, 749–758 (FCPH), 74, 156 linear circuit analysis, 715–716 Filters, 314–315, 625 network analyzer architectures, 716–719 Bessel-Thomson filter, 369–371, 843–844 network analyzer hardware, 716–719, 723–729 Butterworth filter, 843–844 phase matching of coaxial cables, 771–777 Chebyshev filter, 843–844 precision 3.5 mm adapter, 758–767 near Gaussian filters, 843 signal analysis, 715 transition time converters, 844 S-parameters, 729–738 First-in-first-out (FIFO), 12, 97, 156, 174, 539 time domain vs. frequency domain, 714 Derickson.book Page 920 Thursday, November 8, 2007 11:11 AM

920 Index

Frequency domain network analysis (FDNA), Gradient maps, 233–234 682–684, 687 Graphical analysis tools for jitter measurement Frequency domain vs. time domain, 714 bathtub curves, 325 Frequency drift, 106 jitter histogram, 321–322 Frequency response measurement system, 112–113 jitter spectrum, 324–325 Full width at half maximum (FWHM), 613 jitter trend, 322–324 Fully buffered dual inline memory modules. Group delay See FBDIMM format in graphical representations, 753–754 FWM-based sampling in HNLF, 488–489 in precision 3.5 mm adapter, 760 Group-velocity dispersion (GVD), 437–438 See also Chromatic dispersion G

Gain-transparent ultrafast nonlinear interferometer H (GT-UNI), 438–439, 447, 463–464, 489–490 HDB3 encoders, 99–100 Galois implementation, 820–822 Heterodyne receivers, 721–723 Gates, χ3-based, 446–447 Heterodyne techniques, 247–248, 494, 527–528 Gating, 315 High Speed Transceiver Logic (HSTL), 151 Gaussian filters, 843 Highly nonlinear fibers. See HNLF Gaussian random jitter (RJ), 42–43, 51–52 High-pass AC coupling network, 877–879 Gaussian RJ and rectangular PJ, 45–46 Histogram measurements, 271, 321–322, 353 Gaussian RJ and sinusoidal PJ, 48–51 Histograms, 35–37, 165, 205–206, 208–210, Gaussian RJ and triangular PJ, 46–48 227–228 Ghost reflections, 673–674 HNLF (highly nonlinear fibers) Gigabit Ethernet description, 437–438 64B66B encoder, 157–163 fiber FWM-based sampling in, 488–489 deserializer architecture, 159 XPM-induced frequency shift in, 486–487 IEEE 802.3ae stress testing, 608, 618–629 Hogge phase detectors, 515–517 IEEE 802.3aq stress testing, 634–639 Hold time margin, 4–6 Open Systems Interconnection (OSI) model, Holdover mode drift, 106 149–150 Homodyne, 491, 494 scrambler encoder, 77–78 Homodyne mixing, 439–440, 448 serializer architecture, 158 Host cards, 642–644, 650–651 test patterns, 541 Host compliance test board (HCTB), 644–645, XAUI bus extender for XGMII, 151–156 650–651 XGMII interface, 149–151 Hot pluggable fiber-optic transceiver module, 136 Gigabit Ethernet, IEEE 802.3ae Hysteresis, 264, 311, 558 degradations, 622–627 extinction ratio, 622–624 ISI filter, 625 I jitter, 626–627 sinusoidal interference, 626 IDSL, 144, 148 vertical eye closure penalty (VECP), 624–626 IEEE 802.3ae, 608 Golden DUT, 174, 569, 668, 729 extinction ratio (ER), 622–624 Golden PLLs ISI filter, 625 definition, 312 jitter, 626–627 jitter analysis, 410–412 OMA, 619–628 triggering for transmitter testing, 380–382 PHY devices, 619 Derickson.book Page 921 Thursday, November 8, 2007 11:11 AM

Index 921

receiver stress tester, 622, 627 International Telecommunication Union (ITU), 126 sinusoidal interference, 626 ITU-TSS NISDN standards, 141 vertical eye closure penalty (VECP), 624–626 Telecommunications Standardization Sector IEEE 802.3aq, 629, 632, 634–639 (ITU-TSS), 141–144 Impedance International Telecommunication Union characteristic, 63–64, 120, 659, 759, 849 Standardization Sector (ITU-T) coaxial structures, 849, 857 G.691 optical interfaces for single channel, 374 DUT, 672 G.707 and G.708 Synchronous Digital in general transmission lines, 759–760 Hierarchy (SDH), 101 matched terminals, 839, 857 G.810 synchronisation networks, 31 mismatch, 742, 759 G.825 jitter and wander, 126, 128 nonzero at device termination, 738 G.957 optical interfaces for equipment and peeling algorithms, 670, 673–676, 705 systems, 367 profile, 675, 691–694 O.150 PRBS sequences, 831 Inductive discontinuity, 673, 692 O.172 jitter and wander test equipment, 126, Inductive termination, 669–670 128–129, 135 Input comparator, 196 Interoperability and test implications Interconnects FBDIMM, 796–797 behavioral modeling, 695–696 PCI Express, 791–795 cleaning, 689 SATA, 799–800 conductor loss, 660 Interpacket gaps (IPGs), 151–154, 162 coupled interconnects, 676–679 Interpolation, 268–269 discontinuity, 671–673 Interpolation error, 255–256 dynamic range measurements, 684–689 Intersymbol interference (ISI), 13, 40–41, 608, electrical characteristics, 658–664 625, 636–638 frequency domain network analysis (FDNA), cause of, 576n5 682–684 data-dependent jitter (DDJ), 550–551 impedance peeling algorithms, 670, 673–676 description, 390–391, 405 impedance profile, 691–694 Interval analyzers, 530–531 loss modeling, 699 Inverse complementary error function (Inverfc()), loss parameters, 694–695 579–580 measurement accuracy, 689 Inverse error function, 53, 203 multiple reflections, 673–676 Inverse scattering algorithms, 670, 673–676 reflections, 697–699 I/O link architectures. See FBDIMM; PCI Express; S-parameter prediction, 696–701 SATA S-parameters, 679–684 IQ (In-phase and Quadrature) modulation, 541–544 SPICE modeling, 690–696 ISA (industry Standard Architecture), 144 system performance modeling, 689–709 ISDN (Integrated Services Digital Network), TDR/T measurements, 665–670 141–144 time domain network analysis (TDNA), ISDN-DSL, 144, 148 682–684 IsoBER test, 609, 618 Interference testing, 839 Interference tolerance test, 654 Interferometer, gain-transparent ultrafast nonlinear J (GT-UNI), 438–439, 447, 463–464, 489–490 J1/J0 measurement method, 555 Interleaved ADC samples, 246 Jitter, 29 Interleaved decimation, 827 bandwidth limitations, 40 Interleaving noise, 253 classification, 41 Derickson.book Page 922 Thursday, November 8, 2007 11:11 AM

922 Index

Jitter, continued optimized sampling for increasing convolution, 45–52 measurement speed, 396–399 cumulative density function (CDF), 37, 53 recovered clock triggers’ effects on jitter cycle-to-cycle jitter, 33–34 analysis, 407–414 definition, 29–30 residual jitter, 414–417 dual Dirac model, 52–58 uncorrelated jitter, 400–403 frequency spectrum, 35 very high data rates, 393–394 Gaussian random jitter (RJ), 42–43 Jitter measurement results, interpreting Gaussian RJ and rectangular PJ, 45–46 graphical analysis tools, 321–325 Gaussian RJ and sinusoidal PJ, 48–51 predicting behavior by reference model, Gaussian RJ and triangular PJ, 46–48 315–316 Gaussian RJ components, 51 RJ/DJ models, 316–321 histogram, 35–37, 205–206, 227–228 Jitter measurements IEEE 802.3ae standard, 626–627 bathtub curves, 325 intersymbol interference (ISI), 40 jitter histogram, 321–322 jitter mixtures, 45–51 jitter spectrum, 324–325, 526–531 jitter tree, 41, 280, 392 jitter trend, 322–324 LAN, 140 specifying in frequency or time, 531 list of causes, 114–115 Jitter separation, 393, 404–407 low-frequency, 225–226 Jitter spectrum oscillator phase noise, 40 description, 324–325 period jitter, 32–34 measurements, 526–531 periodic jitter, 43–44 PLL multipliers, 521–523 phase jitter, 31–32 Jitter testing for chip-to-chip link components phase noise, 30–31 BER and signaling tests for chip-to-chip link power supply noise, 115 systems, 800–810 probability density function (PDF), 35–37 introduction, 785–788 random jitter and nonperiodic jitter, 51–52 multiple-Gb/s computer chip-to-chip I/O link statistics, 35–37 architectures, 788–800 time waveform, 34–35 PLL testing, 813–815 total jitter (TJ), 34, 38–42 reference clock testing, 813 transfer, 126, 135–137 technology trends for high-speed links, 815–817 wander, 34 testing examples, 811–815 See also Composite jitter; DCD (duty cycle transmitter testing, 811–813 distortion or jitter); DDJ (data-dependent Jitter tolerance measurements jitter); Deterministic jitter (DJ); PJ or SJ alternative measurement methods, 559–560 (periodic or sinusoidal jitter); RJ (random automation of RX jitter tolerance test, 555–656 jitter); SONET jitter basic setup, 536–539 Jitter analysis Bessel null measurement method, 553–555 aggregate deterministic jitter, 403 characterization (finding jitter tolerance limits), aggregate total jitter, 403–404 557–558 components of jitter, 388–393 compliance test, 558–559 correlated jitter, 400 J1/J0 measurement method, 555 description, 387–388 Jitter tolerance testing improved sampling oscilloscopes, 399–400 introduction, 533 jitter separation, 388, 404–407 loopback test, 537–538 limitations of common sampling oscilloscopes, measurement method and test setup, 536–539, 394–396 555–560 Derickson.book Page 923 Thursday, November 8, 2007 11:11 AM

Index 923

PCI Express as system example, 535–536 Line coding, 12–13 receiver details, 534–535 bipolar return-to-zero (BPRZ) code, 20 Jitter transfer function (JTF), 517 block codes, 22–23 JK control code, 73–74 differential Manchester code (DMC), 20 JNB testing, 810 Manchester code (MC), 18–19 Johnson-Nyquist (thermal) noise, 281, 346, mark density (MD), 13 353–354 non-return-to-zero inverted (NRZI) code, JTF (jitter transfer function), 517 19–20 Justification bits, 97, 102, 104 non-return-to-zero (NRZ) code, 14–15 Justification symbols, 104 pulse amplitude modulation (PAM), 20–22 return-to-one (R1) code, 16–18 return-to-zero (RZ) code, 15–16 K run length distribution, 13 transition density (TD), 13 K (special characters), 74–77, 154–157, 871 Line overhead (LOH), 102–104, 591, 596 Kerr switch, χ3-based, 487–488 Linear feedback shift register (LFSR) KTP, 427, 444, 457–460, 464, 482–484 all-zero state, 821–823, 827 characteristic polynomial, 820–821 Fibonacci implementation, 820–823 L Galois implementation, 820–822 maximum-length sequence (m-sequence), 822 LAN nonprimitive polynomials, 823 8B10B encoding rules, 862–872 primitive polynomials, 821–823 jitter measurements, 140 primitive trinomials, 822–823 LRM standard, 634 Linear optical sampling, 439–441 Manchester encoding, 69 Linear phase detectors, 511, 514–515 LAN and SAN standards, 862–872 Linear phase low jitter filter, 623 Lane-to-lane skew, 151–156 Linear sampling (coherent detection sampling), Laser, directly modulated semiconductor 440–441, 448, 489–491 distributed feedback (DFB), 477 Linear scale BERT scan, 202–203 Laser bias, 112, 136, 873, 898–900 Linear time-invariant (LTI) model, 291 Laser emitters, 872–876 Linear time-invariant (LTI) theory, 793, 795 Laser transmitters, 87 Linearity, 630–631, 640 band-pass response, 880–902 Line-reflect-reflect-match (LRRM), 683 See also Extinction ratios of laser transmitters Link architecture Last mile issues FBDIMM, 795–796 asymmetric DSL, 144–145 PCI Express, 789–791 discrete multitone modulation, 148 SATA, 798 DSL and ADSL, 148 Link systems, chip-to-chip. See BER tests and DSL modulation codes, 144–148 signaling for chip-to-chip link systems fiber-to-the-home (FTTH), 148–149 Local area networks. See LAN introduction, 140 Local loop (subscriber loop), 91–92, 97–98 ISDN, 141–144 Loop bandwidth, 11 quadrature amplitude modulation (QAM), Loop filter, 11 145–148 Loopback configurations, BERT, 174 Lattice diagram, 673–675 Loss modeling, 699 Limitations of common sampling oscilloscopes, Losses in interconnects, 659–664 394–396 Lossless transmission line, 659 Derickson.book Page 924 Thursday, November 8, 2007 11:11 AM

924 Index

Lossy transmission line, 62–64, 889–890 Moving average filter, 205–206 Low-frequency jitter, 225–226 Multilevel line codes, 20–22 LRM Multimode fiber, 87, 567–569, 606, 631, 634–637 stress testing (IEEE 802.3aq), 634–639, Multiplexers/multiplexing, 538, 590 647–649 digital-loop carriers (DLC), 90 TWDP evaluation, 639–641 interleaved decimation, 827–828 and scrambler encoders, 84 and SERDES, 9, 172–174 M SONET, 77, 126 TDM, 92–96 MAC (Media Access Control), 70–71, 75, 125, virtual switched connections, 92–96 149–152, 600, 602 See also Dense Wavelength Division Manchester code (MC), 18–19 Multiplexing (DWDM); DSL Access Manchester encoding, 69–70, 89 Multiplexer (DSLAM) Margins in eye mask testing, 277–278, 365–366 Mark density (MD), 13, 198–199, 823–824 Marker density, 830 N Mask testing. See Eye mask testing Mask violation tracking, 277 N connector, 858 Matching cables, 775–777 Negative running disparity, 76 Maximum-length sequence (m-sequence), 822 NEP (noise equivalent power), 443 MBnB block codes, 22 Network analyzer architectures Mean time between errors (MTBE), 171, 177–178 dual-port network analyzers, 717–719 Mean time between failure (MTBF), 177 dual-port network analyzers, advanced, 719 Measurement receivers single-port network analyzers, 716–717 band-pass filter receivers, 720 Network analyzer hardware direct sampling receivers, 720–721 configuration, 725–727 heterodyne receivers, 721–723 measurement receivers, 720–723 setup, 723–724 measuring and viewing results, 729 Median filter, 205–206, 227 Noise, 647–650 Memory modules, fully buffered dual inline. averaging, 473 See FBDIMM electrical, 334 Metrology-grade connectors, 858 in eye diagrams, 345–346 Microstrip, 660, 673–677, 693–694, 697 flicker, 282 Mirror polynomials, 823 instrumentation noise, 346–349 Mixed-mode S-parameter matrix, 681, 682, 684 measuring added noise, 647–650 M/N loop, 510 in oscillators, 40, 253–255 Mode-locked fiber laser (MLFL), 482, 487–488 peak-to-peak measurement, 274 Mode-locked fiber ring laser (MLFRL), 482 phase noise, 30–31, 253, 506–510 Modulation codes, 68 pink, 281–282 4B5B block substitution, 70–74 power supply noise, 115, 120–123 8B10B block substitution, 74–77 power supply noise test systems, 902 8B10B encoder efficiency, 89 Q values (signal-to-noise ratio), 274 DSL, 144–148 quantifiable effect, 577 fiber-to-the-home, 148–149 quantization noise, 253 ISDN, 140–144 root mean square (RMS) measurement, 274 Manchester encoding, 69–70, 89 shot, 281–282 Monte Carlo method, 589 sources of, 346–349 Derickson.book Page 925 Thursday, November 8, 2007 11:11 AM

Index 925

thermal (Johnson-Nyquist), 281, 346, Optical attenuator, 131–138, 567–569, 636 353–354 Optical demultiplexer, 612, 617 vertical noise, 253–254 Optical digital receivers, 564–565 voltage noise into the time domain, 38 Optical fiber amplifier, 610 Noise equivalent bandwidth, 613–615 Optical fibers, highly nonlinear, 437–438 Noise equivalent power (NEP), 443 Optical modulation amplitude (OMA), 379–380, Noise floor, 686–687 619–628 Noise injection, 122–123, 902–910 Optical sampling. See All-optical sampling for NOLM (nonlinear optical loop mirror), 431–432 high-speed waveform analysis; All-optical Nonlinear crystals, χ2-based gates in, 443–444 sampling implementations, experimental; Nonlinear fibers. See HNLF Fiber FWM-based sampling system, Nonlinear interferometer, 438–439, 463–464, performance analysis of; Optical sampling 489–490 principles; Sampling gate implementations; Nonlinear interferometer, gain-transparent Third-order nonlinearity-based sampling; ultrafast, 439, 489–490 Timebase designs Nonlinear optical loop mirror (NOLM), 431–432 Optical sampling applications Nonlinearity, 640–641 phase-resolved sampling, 493–496 Nonprimitive polynomials, 823 state-of-polarization (SOP) sampling, 496–497 Non-return-to-zero inverted (NRZI) code, 19–20, Optical sampling gates 70–74 polarization-independent, 458–460 Non-return-to-zero (NRZ) signals pros and cons, 463 amplitude histogram, 465–466 Optical sampling principles challenging to capture, 423 description, 427–428 constant bit rate, 262 linear optical sampling, 439–441 eye diagrams (patterns), 258–259, 358, 474 optical phase matching, 428–431 ideal encoding, 565 polarization-independent sampling, 457–460 ideal receiver response, 370 second-order nonlinearity-based sampling, 428 non-return-to-zero (NRZ) code, 14–15 system performance comparison, 462–464 RZ signals, comparison with, 382–387 timing jitter, 460–462 N-way dividers, 838–839 Optical sensitivity measurements Nyquist criterion, 248–249, 258, 633, 640 checklist, 568–569 Nyquist frequency, 325 sensitivity defined, 565–572 Nyquist rate, 248 statistical fluctuations, 582–588 straight-line transformation for sensitivity plots, 572–582 O Optical signal-to-noise ratio (OSNR), 607, 609–618 Observed jitter transfer function (OJTF), 517–518 Optical spectrum analyzer (OSA), 612–615 Odd mode, 667, 677–679, 702, 706, 708 Optical Standards Tester (OST), 618 OJTF (observed jitter transfer function), 517–518 Optical time-division multiplexing (OTDM), 473, OMA (optical modulation amplitude), 379–380, 485 619–628 Optical waveform measurement techniques, 423 Open Systems Interconnection (OSI) reference Optical waveform sampling, 423–426 model, 67–68, 149–150, 618 Optical-to-electrical (O/E) converter, 639, Open-loop gain, 116, 506, 518–521, 874–876, 642–643 893–896 Orthogonal frequency-division multiplexing Optical amplification, 362, 578, 581, 609–610, (OFDM), 148 612, 617 Oscillator phase noise, 40, 253 Derickson.book Page 926 Thursday, November 8, 2007 11:11 AM

926 Index

Oscilloscopes, 621–622 Passive interconnects, 171, 658, 690–696 description, 243, 330 Path overhead (POH), 102, 105, 591, 596 digital sampling oscilloscope (DSO), 573–576, Path termination boxes, 590 638–641 Pattern generator (PG) equipment check, 303–304 jitter tolerance test signals, 539 equivalent-time oscilloscopes, 332 loopback test, 537 limitations of, 394–396 memory size, 828 measurements of phase noise and jitter PRBS, 78, 96 spectrum, 530 receiver tolerance testing, 793 qualities to check, 303 short data patterns, 823 real-time oscilloscopes See Real-time single-channel BERT, 171–173 oscilloscopes SONET/SDH frames, 113, 126, 138 sampling oscilloscopes, 243–244, 330, 335 Pattern trigger, 113–114, 337–341, 345–353, 552 time domain sampling, 665–666, 678, 679–680 internally generated, 395–397, 401 See also Eye diagrams (patterns) Pattern-correlation-based approaches for DDJ and Overhead (OH), 142, 214, 591 DCD, 291–293 Overhead bits, 65, 88, 92, 94–97, 423 PCI (Peripheral Component Interconnect) bus, 5 Overlaying slices, 265 PCI Express (Peripheral Component Interconnect Overshoot, 249, 275, 312, 353, 370–371, 520, 524, Express), 252, 318–319, 324, 535–536 652, 843–844 PCI Express architecture and testing link system and subsystems, 800 PLL testing, 804 P receiver testing, 802–803 reference clock testing, 803–804 Pair gain, 96 transmitter testing, 800–802 Parallel synchronous systems, 2, 5 PCI Express interoperability Parallel transmission, 65 channel test implications, 792–793 Parallel-to-serial converter, 9–10 receiver test implications, 793–794 Parametric amplification, 436, 488 reference clock test implications, 794–795 Parametric analysis of waveforms, 350–353 transmitter test implications, 791–792 Parametric gain, 487 Peeling algorithms, 670, 673–676, 705 Parametric measurements, 269, 271, 359–360 Periodic jitter. See PJ or SJ (periodic or sinusoidal Parasitic inductance, 123–124 jitter) Parseval’s theorem, 285 Peripheral Component Interconnect Express. Passband compensation, 249 See PCI Express Passive elements for testing Phase demodulator, 523–524, 528 attenuation ratios, 837 Phase detection, 11 bias Ts, 121, 845–846, 910 analog, 512–513 DC blocks, 845 digital, 513–517 near Gaussian filters, 843 Phase deviation, 119, 124, 127–129, 135, 137–138 n-way dividers, 838–839 verifying with Bessel null, 553 power dividers, 838 Phase distortion, 107–110 power splitters, 837 Phase error measurement in clock recovery, preemphasis, 840–841 529–530 resistor values, 837 Phase jitter, 31–32 sinusoidal interference test signals, 839–840 Phase jitter spectrum, 290 transition time converters, 844 Phase locked loops (PLL). See PLLs (phase locked variable delay lines, 842 loops) Derickson.book Page 927 Thursday, November 8, 2007 11:11 AM

Index 927

Phase margin, 210 control loop responses, 115–120 Phase matching and χ3-based gates, 446–447 dynamics, measuring, 523–525 Phase matching of coaxial cables Golden PLLs, 312, 382, 410 characterizing coaxial cables, 773–775 heavily damped response, 116 description, 771–773 order and type, 518–519 matching the cables, 775–777 reference clock, 11 Phase noise, 30–31 reference clock test parameters, 807 clock recovery phase error measurement, spread spectrum PLL, 12 529–530 testing, 804, 813–815 combined, 522 type 1 second-order, 519–520 delay line oscillators, 509–510 type 2 second-order, 520 jitter spectrum, 526 type 2 third-order, 520–521 measurements, 526–531 underdamped response, 116, 118 oscilloscopes, 530 PLL multipliers and jitter spectrum, 521–523 signal source analyzers, 528–529 PLLs and clock recovery dynamic behavior specifying jitter in frequency or time, 531 clock recovery PLLs, 521 spectrum analyzers, 527–528 jitter spectrum and PLL multipliers, 521–523 time interval analyzers, 530–531 jitter transfer, 517 tuned circuit oscillators, 506–509 phase locked loop order and type, 518–519 vs. jitter spectrum, 526 second-order PLLs, 519–521 Phase shift type 2 third-order PLLs, 520–521 general transmission lines, 760 PMD (polarization-mode dispersion), 91, 423, precision 3.5 mm adapter, 763–766 435, 437–438, 457, 466 Phase shift keying (DPSK and DQPSK), 492, Poisson distribution, 182–186, 282, 583n 493–494 Poisson equation, 182–185 Phase shift keying (PSK), 145–146 Polarization, state-of-polarization sampling, Phase spectrum, 298–299 496–497 Phase-matched cable sets, 857 Polarization beam splitter (PBS), 439, 458, 460, Phasor diagrams, 507 489 Photon, 610, 635 Polarization shift keying (PolSK), 494 PHY devices, IEEE 802.3ae, 619 Polarization-independent optical sampling gates, PHY layer (physical layer), 115, 149–150, 458–460 618–619 Polarization-independent sampling, 457–460 Physical Coding Sublayer (PCS), 71, 75, 149–152, Polarization-maintaining fiber (PMF), 434, 439, 157, 162–163 458–459, 489 Physical Medium Dependent (PMD), 70–71, 75 Polarization-mode dispersion (PMD), 423, 435, Pi filters, 124–125 437–438, 457, 466 PIN photodiodes, 564 Polarization-rotation-based sampling, 433–434 Pink noise, 281–282 Population inversion, 610 PJ or SJ (periodic or sinusoidal jitter), 32–34, Positive logic, 14 43–44, 137–139, 207–210, 295–299, 406, Positive running disparity, 76 547–548 Postcursor form of ISI effect, 638 Plain old telephone service (POTS), 90–96 Postprocessing captured data, BERT, 192 Plesiochronous digital hierarchy (PDH), 97, 101 Power amplifier, 122–123 Plesiosynchronous systems, 293 Power dividers, 838–841 PLLs (phase locked loops) Power meters, optical, 567 clock recovery, 521 Power planes, 121–125, 660 clock synthesis, 510–512 Power splitters, 837–838 Derickson.book Page 928 Thursday, November 8, 2007 11:11 AM

928 Index

Power supply Pseudo-color plots, 229–230 distribution, grounding, and shielding, 123–124 Pseudo-random binary sequences. See PRBS noise, 115 (pseudo-random binary sequences) noise immunity, 120–123 Pseudo-random word sequence (PRWS), 827–828 noise in test systems, 902–910 Public switched telephone network (PSTN), PPLN, quasi-phase matching in, 484–486 90–91, 140–141 PRBS (pseudo-random binary sequences) Pulse amplitude modulation (PAM), 20–22 all-zero state, 821–823, 827 Pulse shaping, 173–174 autocorrelation, 825–826 Pulse-to-pulse interference, 486 characteristic polynomial, 820–821 Pulse-wide distortion, 640–641 decimation, 826–827 Pulse-width shrinkage (PWS), 792 Fibonacci implementation, 820–823 frequency spectrum, 826 Galois implementation, 820–822 Q introduction, 819 linear feedback shift register (LFSR), 820–823 Q factor mark density (MD), 823–824 and BER, 362, 573 marker density, 830 method, 210–213 maximum-length sequence (m-sequence), 822 vs. error probability, 578–579 multiplexing, 827–828 Q level, 350 nonprimitive polynomials, 823 Q scale, 53–54, 203–205 pattern generator, 77–79, 86, 96 Q values (signal-to-noise ratio), 274, 377–378, pattern generator simulation table, 79–83 463, 465, 572, 768 patterns, 541, 566–567, 588 Quadrature amplitude modulation (QAM), 145–148 PRBS 2n, 828–829 8-QAM, 147 PRBS31, 622 16-QAM, 147 primitive polynomials, 821–823 64-QAM, 147 primitive trinomials, 822–823 128-QAM, 147 properties of PRBS sequences, 823–828 256-QAM, 147 run length distribution, 824–825 Quality factor in eye diagrams, 275 scrambler encoders, 84 Quantization noise, 253–255, 310, 347, 350, 535 standardized PRBS sequences, 831–832 Quasi-phase matching standards compliance testing, 831–832 χ2-based gates, 445 test patterns, 540, 828–830 PPLN, 484–486 transition density (TD), 823–824 zero substitution, 829 zero suppression, 829–830 R PRC (Primary Reference Clocks), 107 Preemphasis, 26, 652–653, 838, 841 R1 code, 16–18 PRI (Primary Rate Interface), 142 Radio Guide (RG) coax standards, 857 Primitive polynomials, 821–823 Rambus, 671 Primitive trinomials, 822–823 Random data, 819–820 Probes See also PRBS (pseudo-random binary deskewing, 306–309 sequences) types of, 305–306 Random errors, 741 Propagation velocity, 673, 850–851 Random jitter. See RJ (random jitter) Protocol stack, 67, 70, 156 Random number generator, 84–85 PRS (Primary Reference Source), 106 Random voltage modulation sources, 549 Derickson.book Page 929 Thursday, November 8, 2007 11:11 AM

Index 929

Real-time oscilloscopes Reflection response, 716 architecture, 245–250 Reflection tracking, 743 block diagram, 245 Reflections, 636, 664–676, 680, 689, 697–699, channel equalization, 249 703–704, 756–757 description, 14–15, 245 Regenerator, 127, 589–590 equivalent-time instruments, 265–266 Relative intensity noise (RIN), 636 front end, 246 Residual jitter, 414–417 front-end bandwidth, 256–257 Resolution bandwidth, 613 inaccuracy, sources of, 251–257 Response calibration, 747 interpolation error, 255–256 Return-to-zero (RZ) signals. See RZ (return-to- Nyquist criterion, 248–249, 258 zero) signals passband compensation, 249 Ringing, 350, 354, 370, 423, 425, 491, 843–844 record length, insufficient, 257 Rise time, 270, 663–664, 666–669, 692, 699, sample jitter, 252–253 706–708 slices, displaying and overlaying, 265 Rise time measurement, 351–352, 359 timing diagram, 247 RJ (random jitter), 41, 51–52, 281–289, 392, 406, trigger jitter, 251–252 548 vertical noise, 253–255 root mean square (RMS), 207, 227 See also Eye diagrams (patterns) RJ/DJ models for jitter measurement Receivers comparison of techniques, 318 analog, estimating characteristics digitally, diagram, 316 585–588 DJ separation, detailed, 320 band-pass filters, based on, 720 dual Dirac equivalent jitter, 317 Bessel-Thomson, 268 dual Dirac model, 317 direct sampling, 720–721 dual Dirac Q scale method, 318–319 heterodyne, 721–723 Run length distribution, 13, 824–825 jitter tolerance testing, 534–535 Running disparity, 75–77 optical digital, 564–565 RZ code, 15–16 reference, 369–371 RZ (return-to-zero) signals tolerance testing, 793 NRZ signals, comparison with, 382–387 See also Measurement receivers RZ-DQPSK transmitter and receiver, 495 Record length for oscilloscope equipment, 303 Recovered clock triggers’ effects on jitter analysis clock recovery basics, 407–408 S clock recovery loop bandwidth, 408–409 data transition density, effects of, 410–412 Sample delay offsets, 175–177, 197, 200, 237 instrumentation-grade clock recovery design, Sample delay scan 412–414 base bit error ratio, 222–225 jitter analysis with Golden PLLs, 410 bathtub curve, 202–205 loop bandwidth, ideal, 410 compared with sample threshold scan, 226–228 loop bandwidth’s effect on observed jitter, 408 edge resolution optimization, 216, 222 timebase delay’s effect on observed jitter, 412 fast total jitter optimization, 219–222 Rectangular QAM, 145–147 introduction, 200–202 Reference clock testing, 813 jitter histogram, 205–206 Reference plane calibration, 682 low-frequency jitter, 225–226 Reference planes, 717, 739 measurement procedure, 213–215 Reference receivers, 369–371 number of errors optimization, 218–219, 222 Reflection coefficient, 672 numerical results, 210 Derickson.book Page 930 Thursday, November 8, 2007 11:11 AM

930 Index

Sample delay scan, continued Sampling theorem, 248, 255, 257, 325, 633 periodic jitter level, 207–210 SAN standard, 862–872 phase margin, 210 SATA (Serial Advanced Technology Attachment), Q factor method, 210–213 657, 677, 678, 685 random jitter level, 207 SATA architecture and testing sample point optimization, 215–218 characterizing, 678 sampling toward the center, 216–217, 222 link system and subsystems, 807 single edge measurements, 218 receiver testing, 808–809 total jitter (TJ), 210 spread spectrum clock testing, 809–810 Sample jitter, 252–253 transmitter testing, 807–808 Sample point adjustment, BERT, 175–176 SATA interoperability Sample point optimization, 215 channel test implications, 799 edge resolution optimization, 216–217 receiver test implications, 800 sampling toward the center, 216–217 reference clock test implications, 800 single edge measurements, 218 transmitter test implications, 799 Sample rates and bandwidths, 331–335 Scalar network analyzers, 716 Sample threshold scan, 226–228 Scattering, 680 Sampling efficiency η Scattering parameters. See S-parameters FWM, 436, 454 Scope-like eye diagram, 233–234 limiting factors, 443–444 Scrambler encoder, 77–83 sampling gate implementations, 442 64B66B, 162 Sampling gate implementations and power consumption, 78 χ2-based gates in bulk nonlinear crystals, statistical characteristics, 84–87 443–444 Scrambler encoding, 68, 84–87 χ2-based gates using quasi-phase matching, 445 Scrambler seed, 77–78 χ3-based gates requiring phase matching, SDH (Synchronous Digital Hierarchy). 446–447 See SONET/SDH systems χ3-based gates using cross-phase modulation, Second harmonic generation (SHG), 428 447–448 Second-order PLLs, 519–521 description, 441–442 Section overhead (SOH), 102–104, 591, 596 linear sampling, 448 Self-homodyne detection, 494 optical bandwidth for, 443 Semiconductor gate implementations, 438–439 performance measures, critical, 442–443 Semiconductor optical amplifiers (SOAs), 427, waveguide structures, 445–446 438–439, 489 Sampling gates Sensitivity testing, receivers, 836–837 cross-phase-modulation-based, 431–433 Sensitivity testing in optical digital four-wave-mixing-based, 434–437 communications polarization-independent, 458–460 BER measurements in SONET/SDH, pros and cons, 463 589–596 Sampling (Nyquist) criterion, 248–249, 258, 633, optical digital receivers, 564–565 640 sensitivity defined, 565–572 Sampling oscilloscopes, 243–244, 330, 332 statistical fluctuations, 582–588 Sampling pulse sources (SPS), 440, 458–459 straight-line transformation for sensitivity implementations, 477–479 plots, 572–582 improvements, 480 See also BER calculations in real requirements, 476 communications systems; Optical Sampling sensitivity, FWM-based sampling sensitivity measurements system, 455–457 Sequential sampling oscilloscopes, 332 Derickson.book Page 931 Thursday, November 8, 2007 11:11 AM

Index 931

SERDES (serializer and deserializer), 9–11, SONET, 101–102 65–67, 70–71, 115–120, 172–174, 828 capacitive coupling networks, 107–110 Serial Advanced Technology Attachment. clock architecture, 106–107 See SATA design requirements, 107–112 Serial backplanes, 651–654 frames, 102–106 Serial clock functions, 66, 71 laser driver requirements, 111–112 Serial data network analysis (SDNA), 684–689 telecommunication system encoding, 77–83 Serializer and deserializer (SERDES), 9–11, SONET jitter, 124 65–67, 70–71, 115–120, 172–174, 828 jitter generation, 127–129 Serving area interfaces (SAIs), 97 jitter tolerance, 127 SHG (second harmonic generation), 428 jitter tolerance measurement, 137 Short-open-load-thru (SOLT) method, 682–685, jitter transfer, 126–127 689 jitter transfer measurement, 135–137 Shot noise, 281–282 measurement, 126, 129 Signal integrity, 677, 685, 843 test systems, 129–130 measurements, 266 SONET/SDH systems modeling, 668, 689, 695–701 analyzing BER measurements in, 592–596 TDR instruments, 682 description, 589–592 and XGMII, 151 PJ or SJ (periodic or sinusoidal jitter), 547 See also BERT scan measurements; Crosstalk section, line, and path, 590 Signal source analyzers (SSAs), 528–529 Source synchronous systems, 6–7 Signal-to-noise ratio (SNR). See Q values (signal- S-parameters to-noise ratio) band-pass filter measurements, 767–771 Single-ended measurements, 779–780 and coaxial cables, 773–777 Single-ended probes, 305–306 crosstalk, 682 Single-ended signalling, 23 differential, 780 Single-mode fiber (SMF), 131–134, 474, 566–568 equation, 744, 745 Single-port network analyzers, 716–717 flow diagrams, 739, 744 Sinusoidal jitter. See PJ or SJ (periodic or four-port devices, 680–681, 734–739 sinusoidal jitter) frequency domain characterization, 679–684 SJ. See PJ or SJ (periodic or sinusoidal jitter) general S-parameters, 730–732 Skew, 7, 9, 64–65, 151–156 imperfect terminations, 738–740 Skewed probes, 306–309 linear format, 750 Skin depth, 662, 851–852 optical sampling, 440–441 Skin effect, 661–663, 704, 849–855 polar coordinate system, 756–757 Slices, displaying and overlaying, 265 precision 3.5 mm adapter, 761–766 SMA, 673, 696 prediction, 690, 696–701 connector, 859 rectangular coordinate system, 753 Small form factor (SFF), 642–651 SATA, 799 Small form-factor pluggable (SFP+) scattering matrix, 680–681 high-speed host RX tests, 650–651 single semirigid coaxial cable, 773 high-speed module RX tests, 645–650 SPICE modeling, 696 high-speed tests, 645 TDNA and FDNA, 682–684 introduction, 642 two-port devices, 680, 732–733, 744–745 test boards, 643–645 Spectral jitter decomposition, 238 Smith chart format, 756–758 calculated values, 241 SNR (signal-to-noise ratio). See Q values (signal- graphical representation, 240–241 to-noise ratio) theory of operation, 238–240 Derickson.book Page 932 Thursday, November 8, 2007 11:11 AM

932 Index

Spectrum, jitter. See Jitter spectrum STS-192, 101, 107–109, 117, 129, 135 Spectrum analysis approaches STS-N frame, 103, 127–128 composite jitter, 300–302 Stuck bits, 173, 178 DDJ and DCD, 289–291 Stuffing bits, 97, 102, 104 PJ extraction, 295–296 Subrate jitter (SRJ), 390, 392 RJ extraction, 283–286, 287–289 Subscriber loop, 91–97, 140, 144, 148 Spectrum analyzers, 130–134, 138–139, 527–528, Sum modulo-2, 820, 825 553–555, 612 SWR (standing wave ratio), 754–755 SPICE modeling of passive interconnects Synchronization bit, 94–95, 102–108, 112, 130, behavioral modeling, 695–696 138 impedance profile, 691–694 Synchronous Digital Hierarchy (SDH). introduction, 690 See SONET/SDH systems losses, 694–695 Synchronous Optical Network (SONET). Splintering, 278 See SONET/SDH systems Split-symmetric, 629, 647–649 Synchronous payload envelope (SPE), 102–105 Spread spectrum clocking (SSC), 12, 31, 314–315, Synchronous systems, 2–5 509, 547 System architectures Spread spectrum PLL, 12 embedded clock serial systems, 8–12 Squelch circuit, 572 forwarded clock systems, 7–8 SRJ (subrate jitter), 390, 392 source synchronous systems, 6–7 SSAs (signal source analyzers), 528–529 spread spectrum clocking, 12 Standing wave ratio (SWR), 754–755, 836–837 synchronous systems, 2–5 State of polarization (SOP), 433–434, 459, 496–497 STM (synchronous transport module) T SONET/SDH jitter measurement specifications, 129 Tail-fit approach for RJ extraction, 286–289 SONET/SDH symbol rates, 101 Tapped delay line (transversal filter), 632–633, STM-16, 101, 374 636, 653 STM-64, 101, 107, 135 T-carrier (T1) transmission systems, 97–99, Storage area networks (SAN), 140 140–141 Stratum clocks, 106–107 Telcordia Technologies, 101, 126 Streak cameras, 423 Telegrapher’s equations, 659 Stressed eye testing, 605 Telephone system history and evolution BER vs. OSNR, 609–618 analog-to-digital transformation, 90–96 early testing methods, 607–609 digital carrier transmission systems, 96 electronic dispersion compensators (EDCs), E1 carrier transmission systems, 99–101 629–634 plesiochronous digital hierarchy (PDH), 97 Gigabit Ethernet, 618–629 SONET clock architecture, 106–107 high-speed serial backplanes, 651–654 SONET frames, 102–106 LRM stress testing (IEEE 802.3aq), 634–639 synchronous optical network, 101–102 SFP+ for linear modules, 642–651 T-carrier (T1) transmission systems, 97–99 Striplines, 660, 664, 694–695, 697–698, 700, 778 Temporal resolution Strobe (sampling pulse), 424 fiber FWM-based sampling system, 450–453 STS-1 frame, 102–106 sampling gate implementations, 442 STS-3 frame, 103, 105 Terminations, 696–697, 700 STS-14 frame, 103 impedance, 679 STS-48, 135 imperfect, and S-parameters, 738–740 Derickson.book Page 933 Thursday, November 8, 2007 11:11 AM

Index 933

Test patterns resolution rule of thumb, 667–668 bit error ratio testing, 174–175 rise time, 666–669 for jitter tolerance test signals, 540–541 signatures, 669–670 PRBS, 828–830 simulated and measured waveforms, 707 Testing. See BERT (bit error ratio testing); Eye test setup, 671 mask testing; Golden PLLs, triggering for Time domain transmission (TDT), 666, 682–684, transmitter testing; Jitter tolerance testing; 694, 696 PCI Express architecture and testing; SATA Time interval analyzers, 530–531 architecture and testing; Sensitivity testing Time interval error (TIE). See Jitter in optical digital communications Time skew, 64–65 Thermal (Johnson-Nyquist) noise, 253, 281, 346, Timebase designs 353–354 asynchronous sampling, 465–466 Third-order nonlinearity-based sampling description, 464–465 cross-phase-modulation-based sampling gates, equivalent-time sampling, 466–475 431–433 Time-division multiplexing (TDM), 92–97, 105, description, 431 474 four-wave-mixing-based sampling gates, TJ (total jitter), 283–284, 286–289, 300–302, 434–437 392–393, 406 highly nonlinear optical fibers, 437–438 TNC (Threaded Neill Concelman) connector, 859 polarization-rotation-based sampling, 433–434 Topological models, 689–697, 702, 708 semiconductor gate implementations, 438–439 Total jitter (TJ), 34, 210, 283–284, 286–289, Third-order PLLs, type 2, 520–521 300–302, 392–393, 406 Threshold offset, 195–201, 227–233, 236–239 Total jitter (TJ) subcomponents, 38–42 Through, reflect, line, and/or match (TRLM), 749 Trace averaging, 344–347, 395, 769 Thru-reflect-line (TRL), 683–685 Track-and-hold circuits (T/H), 246, 250, 252 TIAs (transimpedance amplifiers ), 87, 136, 564, Tracking error in frequency domain measurement, 572, 585–586, 639, 649–650, 874–875 743 TIE (timing error). See Jitter Transceiver modules, 124–125, 135–139 Time domain network analysis (TDNA) Transimpedance amplifiers (TIAs), 87, 136, 564, advantages, 684 572, 585–586, 639, 649–650, 874–875 calibration, 682–683, 685 Transition density (TD), 13, 199, 823–824 dynamic range, 687 Transition time converters, 843–844 measurement block diagram, 683 Transition times, 38–40, 235–236 SOLT method, 682, 689 Transmission coefficient, 675 s-parameters, 682, 684 Transmission lines, differential. See Differential and VNA, 683, 688 transmission line measurements Time domain reflectometry (TDR) Transmission loss accuracy comparison, 688 dielectric loss, 851, 854–855 characteristic impedance, 672 non-TEM modes, 853–855, 859 comparisons with VNA, 683 reducing, 855–856 differential impedance measurements, 677–678 skin effect, 851–853 dynamic range, 687–688 Transmitter extinction ratios. See Extinction ratios impedance peeling algorithm, 675–676 of laser transmitters interconnect analysis, 670 Transmitter optical subassembly (TOSA), 889 introduction, 665 Transmitter Waveform Dispersion Penalty lattice diagram, 673–675 (TWDP), 606 oscilloscope, 665–666, 671, 677–680, 682, received signals, 639–641 685, 689 transmitter quality, 641 Derickson.book Page 934 Thursday, November 8, 2007 11:11 AM

934 Index

Transport overhead, 102 dynamic range, 687–688 Trigger jitter, 251–252 FDNA, 682 Trigger setup, 313 frequency domain measurements, converting, Trigger-delay-sample process, 336 675 Triggering frequency sweep, 725 alternate schemes, 341–344 measurement errors, 741–742 directly on data, 341–343 ratioed measurements, 749 process, 330–331 setup, 723, 727 Triggers, pattern, internally generated, 396–397, TDR comparisons, 683, 687–688 401 Vertical eye closure penalty (VECP), 624–627 TRLM (through, reflect, line, and/or match), 749 Vertical noise, 253–255, 310 Tuned-circuit oscillators, 506–509 Vertical source scaling, 310 Twisted-pair wire, 90–91, 97, 140–141 VNA. See Vector network analyzer (VNA) See also Differential signalling Voltage noise, 38–40 Two-port calibration, 748 Voltage standing wave ratio (VSWR), 755 Two-port devices and S-parameters Voltage-controlled oscillator (VCO), 11–12, forward reflection term, 732–733 66–67, 407–410, 413–414, 509, 512, forward transmission term, 733 516–523, 528–529 reverse reflection term, 733 Voltage-to-timing conversion using linear slopes, reverse transmission term, 733 544 Two-port network analyzers, 717–719 Type 1 second-order PLLs, 519–520 Type 2 second-order PLLs, 520 W Type 2 third-order PLLs, 520–521 Type II (birefringent) phase matching, 428, WAN (wide area network), 150, 162–163, 619 443–445, 460–462, 482–484 WAN Interface Sublayer (WIS), 150, 162–163 Wander, 15, 34, 109–113, 529, 547, 845 Waveform acquisition process U description, 335–337 eye diagram, construction of, 338–344 U-interface, 142, 144 jitter and noise reduction through trace Ultrafast nonlinear interferometer, 489–490 averaging, 344–346 Uncorrelated jitter, 389, 392, 400–403, 540, 550 pattern waveform, construction of, 337–338 Underdamped PLL response, 116–118 Waveforms, parametric analysis of, 350–353 Unit interval (UI), 115 Waveguide structures for increased interaction UTC (Coordinated Universal Time), 106 length, 445–446

V X

Varactor diodes, 509, 545 X3T11/Project755D/Rev, 4.3, 74 Variable delay lines, 842 XAUI, 151–156 Variable optical attenuator, 131–138 block diagram, 153 Vector network analyzer (VNA), 716–717 bus extender for XGMII, 151–156 accuracy comparison, 688 XGMII Extender Sublayer (XGXS), 151 calibration, 727–728, 745–749 XFP module, 136–138, 559 computing actual device responses, 743–745 XFP multisource agreement, 136 Derickson.book Page 935 Thursday, November 8, 2007 11:11 AM

Index 935

XGMII XOR, 820–821, 825 bus length, and signal integrity, 151 XPM. See Cross-phase modulation bus output, 154 control code, 157 either edge clocking scheme, 150 Z introduction, 149 -to-XAUI code group mapping, 154 Zero counter, 77 -to-XAUI mapping, 154 Zero substitution, 829 XAUI bus extender, 151–156 Zero suppression, 829–830 XGMII Extender Sublayer (XGXS), 150–153, Zero-dispersion wavelength, 434–438, 446, 155–157 449–450, 454–455