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Validación Experimental Por Inyección Física De Fallos De La Garantía De Funcionamiento De Un Sistema Multiprocesador Tolerante a Fallos

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Validación Experimental Por Inyección Física De Fallos De La Garantía De Funcionamiento De Un Sistema Multiprocesador Tolerante a Fallos Validación Experimental por Inyección Física de Fallos de la Garantía de Funcionamiento de un Sistema Multiprocesador Tolerante a Fallos por Rafael Javier Martínez Durá Tesis doctoral Dirigida por Prof. D. Pedro Joaquín Gil Vicente Prof. D. Gregorio Martín Quetglás Departamento de Informática y Electrónica Facultad de Ciencias Físicas Universitat de Valéncia UMI Number: U607739 All rights reserved INFORMATION TO ALL USERS The quality of this reproduction is dependent upon the quality of the copy submitted. In the unlikely event that the author did not send a complete manuscript and there are missing pages, these will be noted. Also, if material had to be removed, a note will indicate the deletion. Disscrrlation Püblish<¡ng UMI U607739 Published by ProQuest LLC 2014. Copyright in the Dissertation held by the Author. Microform Edition © ProQuest LLC. All rights reserved. This work is protected against unauthorized copying underTitle 17, United States Code. ProQuest LLC 789 East Eisenhower Parkway P.O. Box 1346 Ann Arbor, MI 48106-1346 TOVOSfTAT DE VALbfCaA BIBLIOTECA CIÉ&ÍC1E3 -fe T r& icouo n ? r -- y ^ ? data ^ : A - " ...3 2 . 3 > o 3 > . T .b Í^LietSc , > * - . * ■ — ------------ . ' ■ — — 1 — «á iA Validación Experimental por Inyección Física de Fallos de la Garantía de Funcionamiento de un Sistema Multiprocesador Tolerante a Fallos por Rafael Javier Martínez Durá Dirigida por Prof. Pedro Joaquín Gil Vicente Prof. Gregorio Martín Quetglás TRIBUNAL CALIFICADOR Presidente Juan José Serrano Martín Cat. de Universidad U. Politécnica, de Valencia Vocales Antonio Pérez Ambite Cat. de Universidad U. Politécnica de Madrid José Miró Juliá Prof. Tit. de Universidad U. de las Islas Baleares Rafael Ors Carot Prof. Tit. de Universidad U. Politécnica de Valencia Vicente Amau Llombart Prof. Tit. de Universidad U. de Valencia Suplentes Germán Fabregat Llueca Prof. Tit. de Esc. Universitaria U. Jaime I de Castellón Joan Pelechano Fabregat Prof. Tit. de Universidad U. de Valencia '^■9/yyNiaViV''' UNIVERSITAT DE VALENCIA FACULTAD DE FISICA DEPARTAMENT D’INFORMATICA I ELECTRONICA C/. D«»ctor Moliner, 50 46100 - BURJASSOT (Valencia) D. Pedro Joaquín Gil Vicente, Profesor Titular del Departamento de Ingeniería de Sistemas, Computadores y Automática de la Universidad Politécnica de Valencia y D. Gregorio Martín Quetglás, Catedrático de Ciencias de la Computación de la Universitat de Valencia, HACEN CONSTAR: Que el licenciado en Informática D. Rafael Javier Martínez Durá ha realizado bajo nuestra dirección, en los laboratorios del Departamento de Informática y Electrónica, el trabajo titulado “Validación Experimental por Inyección Física de Fallos de la Garantía de Funcionamiento de un Sistema Multiprocesador Tolerante a Fallos”, que se presenta para optar al grado de Doctor en Ingeniería Informática. Y para que conste, firman el presente certificado en Valencia a 26 de junio de mil novecientos noventa y siete Fdo.: D. Pedro J. Gil Fdo.: D. Gregorio Martín AGRADECIMIENTOS A los directores de mi tesis quisiera agradecerles el apoyo que me han dado para llevar a buen término el trabajo de investigación. A Carlos Pérez, por su labor en el desarrollo del software del Proyecto, su ayuda en la depuración de los módulos y por su constante colaboración. A los compañeros del sótano, José Antonio y Juanjo, mi agradecimiento puesto que siempre han estado a mi lado en los momentos importantes y se han brindado a realizar cualquier tarea. A Javi le digo lo mismo. Al Profesor Guillermo Ayala, del Dpto. de Estadística, mi consideración, por sus comentarios sobre cómo digerir y realizar el análisis de los datos. Quisiera mencionar también al Grupo de Sistemas Tolerantes a Fallos de la Universidad Politécnica de Valencia, por la ayuda científica y medios materiales que han puesto a mi disposición. A todos los miembros del Proyecto FASST, puesto que la colaboración en el Proyecto supuso el comienzo de mi tarea de investigación. A la familia, por supuesto, y a todos los míos, quiero darles las gracias por el apoyo moral y por la constante preocupación desinteresada que han tenido hacia mi trabajo. Rafa. índice ÍNDICE........................................................................................................................................................... I LISTA DE FIGURAS ..............................................................................................................................VII LISTA DE TABLAS .................................................................................................................................. XI 1. INTRODUCCIÓN...................................................................................................................................1 1 Antecedentes y fundamentos de la presente memoria ....................................................................1 2 Objetivos perseguidos ...................................................................................................................... 3 3 Estructura de la memoria ..................................................................................................................4 2. CONCEPTOS Y NOMENCLATURA BÁSICA SOBRE TOLERANCIA A FALLOS 7 1 Introducción ....................................................................................................................................... 7 2 Definiciones básicas .................................................................................................................8 3 Causas de la disminución de la garantía de funcionamiento .........................................................9 3.1 Fallos ........................................................................................................................................ 9 3.2 Errores .....................................................................................................................................12 3.3 Averías ................................................................................................................................... 13 4 Medios para obtener una garantía de funcionamiento ..................................................................13 5 Atributos de la garantía de funcionamiento ...................................................................................15 6 Evolución del sistema en respuesta a la producción de un fallo ..................................................16 7 Tolerancia a fallos en los sistemas multiprocesador .....................................................................17 i 7.1 Detección de fallos ............................................................................................................... 18 7.2 Estrategias de recuperación ................................................................................................. 18 7.3 Reconfiguración en multiprocesadores ...............................................................................20 8 Ejemplos de Sistemas Tolerantes a Fallos ...................................................................................20 8.1 Tándem NonStop Cyclone ...................................................................................................21 8.2 Sistema Stratus XA/R Serie 300 ......................................................................................... 22 8.3 Sistema Sequoia Serie 400 ...................................................................................................23 8.4 Sistema FASST .....................................................................................................................23 9 Conclusiones ...................................................................................................................................26 3. DISEÑO DE LOS MÓDULOS DE PROCESO..........................................................................29 1 Introducción ....................................................................................................................................29 2 Descripción de los módulos de proceso ....................................................................................... 30 2.1 Mecanismos de tolerancia a fallos ...................................................................................... 30 2.2 Jerarquía de buses .................................................................................................................32 2.3 Otras características ..............................................................................................................36 3 Sistema de detección de errores de la arquitectura FASST ........................................................37 3.1 Fallos internos al procesador ...............................................................................................37 3.2 Detección del mal funcionamiento de alguno de los procesadores ................................. 37 3.3 Detección del mal funcionamiento de alguno de los comparadores ................................ 38 3.4 Detección de errores en los datos del bus del procesador ................................................. 39 3.5 Detección de errores en el flujo de ejecución de la aplicación actual ............................. 39 3.6 Detección de errores en el Host Bus ...................................................................................40 3.7 Detección de errores de Futurebus+ ...................................................................................40 4 Construcción del demostrador .....................................................................................................
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