Si2 Member Report 2010
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Final Program November 7 - 10, 2011 San Jose, Ca
2011 FINAL PROGRAM NOVEMBER 7 - DESIGN10, TOOLS ASIC 2011 ENGINEERING VERIFICATION STRUCTURE ESDA SAN JOSE,PLANS CA CHIP EFFICIENCY INNOVATION DESIGN SIGNAL MIXED MIXED OPPORTUNITY CAD LOGIC SYNTHESIS COMPLEXITY MANUFACTURING IEEE/ACM TEMPLATES APPLIED SCIENCE PATTERN FPGA EDA AUTOMATION INTERNATIONAL METHODOLOGIES TECHNOLOGY EXHIBITCONFERENCE ON ADVANCEMENT STANDARDS CONCEPTION COMPLIANCE PIONEERING MECHANICS COMPUTER-AIDED CIRCUITS NETWORKING WORKFLOWDESIGN ELECTRONIC DESIGN2011 www.ICCAD.com www.iccad.com 2011 ICCAD continues to be the premier conference devoted to technical innovations in design automation. ICCAD’s program of technical papers, tutorials, panels, and keynote highlight ICCAD continues to host one‑day topical workshops providing focused the most important current and future research challenges. A day of coverage of topics of emerging and current interest. This year, four workshops, workshops on hot topics caps a week of non‑stop technical excitement. And on lithography, variability modeling/characterization, constraints in formal as always, a large number of side meetings and social events provide plenty of verification and adaptive power management will take place on Thursday, opportunities for networking and meeting colleagues and friends. November 10. This year’s CANDE workshop will also be co‑located with ICCAD in San Jose, and held in parallel with ICCAD workshops on Thursday, November 10. This year’s ICCAD starts on Monday, November 7 and continues through Wednesday, November 9. You will find up‑to‑date details on the conference website, http://www.iccad.com. Finally, ICCAD 2011 is privileged to have a keynote address from Dr. Georg Sigl of Technische Univ. München. Prof. Sigl will provide unique insights into the design of secure hardware systems, and asks what role EDA will play in the The core of ICCAD has always been the contributed research paper program. -
Learning Openaccess Problem Areas Programmers Need to Understand Kevin Nesmith Chief Architect
Learning OpenAccess Problem Areas Programmers Need to Understand Kevin Nesmith Chief Architect June 25, 2014 Innova&on Through Collabora&ve R&D Overview • Why teach “Learning OpenAccess?” • Why OpenAccess? • Documentaon and training • ProBlems geng started • Uli?es • lib.defs (cds.lib) • Domains • Observers • Namespaces • Translators • Hierarchy • Some helpful tools – oaScript – oaDeBugging Suite • Who’s involved in this OpenAccess effort Innova&on Through Collabora&ve R&D 2 Why teach “Learning OpenAccess” at IEEE? Innova&on Through Collabora&ve R&D “ipsa sciena potestas est” • “Knowledge itself is power” (Sir Francis Bacon) • Knowing more about the inner workings of OpenAccess will make you more – Producve – Valuable • Improve your joB related proBlem solving skills • Reviewing what you already know keeps the informaon fresh in your Brain • Even if you only rememBer 1% from today, its more than what you knew yesterday Innova&on Through Collabora&ve R&D 4 Background of OpenAccess • mid 1990’s, SEMATECH created Chip Hierarchical Design System: Technical Data (CHDStd) • 1999 SEMATECH asked Si2 to take ownership of the CHDStd program to find a way to make is successful • This eventually lead to a new project called OpenAccess • To address concerns of CHDStd, a replacement for the CHDStd API was needed • Si2 put out a call for a technology contriBu?on • Cadence answered the call Innova&on Through Collabora&ve R&D 5 WHY OPENACCESS? Innova&on Through Collabora&ve R&D OpenAccess as a Concept • Eliminate translaon steps in the EDA flow • Prevent -
Electronic Design Automation Tools Part 2 by Christopher Henderson This Article Provides an Overview of the Electronic Design Automation (EDA) Design Tools
Issue 126 December 2019 Electronic Design Automation Tools Part 2 By Christopher Henderson This article provides an overview of the Electronic Design Automation (EDA) design tools. The EDA industry is an interesting ecosystem and bears discussing, so that the design engineer can Page 1 Electronic Design understand the environment. Automation Tools In last month’s feature article we discussed the three major EDA Part 2 tool suppliers: Cadence Design Systems, Synopsys, and Mentor Graphics, which is now owned by Siemens. Here in Part II we will Page 5 Technical Tidbit briefly discuss interoperability issues between the three major platforms. We’ll also discuss other suppliers developing tools in this area. Finally, we’ll discuss the use case and the strengths and Page 8 Ask the Experts weaknesses of the tool suites. Each of the three major EDA firms creates products that work well within their own portfolio, but what about across the three major Page 10 Spotlight providers? What if you want to create designs using tools from across two or more of the providers? This is a major challenge because it requires that one work with different formats for different files, which Page 13 Upcoming Courses requires translators, scripts and additional programs. What would be most useful is a good interoperability standard, and the good news is that there is one. It is called OpenAccess and is supported and promoted by the Silicon Integration Initiative. OpenAccess actually had its start as the result of a lawsuit against Cadence. Users sued Cadence, claiming that their internal format gave them a controlling monopoly in the design area, and a judge agreed with them. -
An Introduction to Openaccess Scripting
An Introduction to OpenAccess Scripting James D. Masters Intel Corp Design Automation Conference June 6, 2011 1 What is it? • Standalone direct interface to OpenAccess (OA) – No dependencies beyond OA and no licensing fees – Performance and memory usage is good for a scripting language • Matches C++ API with some melding to native language features – Existing C++ API documentation can be referenced – Auto conversions to/from native types (e.g. strings, integers, floats) • Includes convenience functions to reduce code and improve productivity – More natural interface; e.g. native array of (1.234, 9.876) instead of oaPoint(1234, 9876) 2 How does it work? Perl API Python API Ruby API Tcl API C# API Language-Specific Bindings Type Mapping Type Mapping Type Mapping Type Mapping Type Mapping Common Wrapper Architecture Interface Common SWIG Framework OA API C++ Programming Interface • Common interface through SWIG ensures cross-language consistency and reuse • All languages interface OA through the official OA API 3 Basic type mapping • Some basic OA types are mapped to native types in the target language Perl Python Ruby Tcl C# oaBoolean integer bool Boolean integer bool oa*Int integer int Fixnum integer int, uint, long,ulong oaFloat/Double Float float Float float float/double oaString string string String string string oaArray array array Array list IList<T> oaTime oaTime oaTime Time oaTime DateTime oaTimestamp integer int Fixnum integer uint oaComplex oaComplex complex OaComplex oaComplex oaComplex oaPoint oaPoint/array oaPoint/array OaPoint/Array -
Magma Design Automation, Inc. Securities Litigation 05-CV-02394
3:05-cv-02394-CRB Document 138 Filed 11/09/2007 Page 1 of 2 1 2 3 4 5 6 7 8 9 10 UNITED STATES DISTRICT COURT 11 NORTHERN DISTRICT OF CALIFORNIA 12 SAN FRANCISCO DIVISION 13 IN RE: MAGMA DESIGN AUTOMATION, ) Case No.: C-05-2394 CRB INC. SECURITIES LITIGATION ) 14 ) CLASS ACTION 15 DECLARATION OF BLAINE F. NYE, This Document Relates to: ) PH.D. 16 ) 17 ALL ACTIONS ) DATE: November 30, 2007 18 ) TIME: 10:00 a.m. CTRM: 8, 19th 19 ) JUDGE: Hon Charles R. Breyer 20 21 22 23 24 25 26 27 28 II DECLARATION OF BLAINE F. NYE, PH.D. Case No. C-05-2394 CRB DOCS\418640v 1 3:05-cv-02394-CRB Document 138 Filed 11/09/2007 Page 2 of 2 1 I, BLAINE F. NYE, declares: 2 1. I have been retained by Counsel for Lead Plaintiff to provide expert 3 opinions in this action. I submit this declaration, in support of Lead Plaintiffs Memorandum in 4 Opposition to Defendants' Motion for Summary Judgment. 5 2. Attached hereto as Exhibit A is a true and correct copy of the Report of Blaine F. Nye, Ph.D dated October I I, 2007. 3. Attached. hereto as Exhibit B is a true and correct copy of the Declaration and Rebuttal Report of Blaine F. Nye, Ph.D dated November 9, 2007. 1 declare under penalty of perjury under the laws of the United States of America that the 10 foregoing is true and correct. Executed this 9th. day of November, 2007 at Redwood City, 11 California. -
EDA Scripting Unleashed: Real-Life Examples Using Oascript and Oaxpop
EDA Scripting Unleashed: Real-Life Examples Using oaScript and oaxPop James D. Masters Intel Corp Si2CON October 6, 2015 1 Agenda • oaScript overview • oaxPop overview • Intel’s experience with oaScript and oaxPop – Framework bundle of required packages – Performance observations – Density Calculator application – Methodology Checker application • oaScript/oaxPop Roadmap • Summary 2 oaScript overview • Standalone direct interface to OpenAccess (OA) using Perl, Python, Ruby, or Tcl – Enables rapid development of powerful OA-based software – Performance and memory usage is mostly comparable to that of a C++ application (a few exceptions will be mentioned later) • Matches OA C++ API very closely – Existing C++ API documentation can be referenced – Auto conversion of types between C++ and scripting language • Includes convenience functions to reduce code and improve productivity • Initiated in 2009, and refined over the past 6 years in Si2’s oaScript working group (code base is stable) 3 oaScript interaction with OA API (via SWIG) Language-Specific Perl API Python API Ruby API Tcl API Bindings Type Mapping Type Mapping Type Mapping Type Mapping Common Wrapper Architecture Interface Common SWIG Framework C++ Programming OA API Interface • Uses the Simplified Wrapper and Interface Generator (SWIG) tool to expose C++ APIs to scripting languages – Common interface through SWIG ensures cross-language consistency and reuse – All languages interface OA through the official OA API 4 oaxPop overview • Provides high-speed polygon manipulation capabilities -
Pycells for an Open Semiconductor Industry
PROC. OF THE 8th EUR. CONF. ON PYTHON IN SCIENCE (EUROSCIPY 2015) 3 PyCells for an Open Semiconductor Industry Sepideh Alassi∗†, Bertram Winter‡ F Abstract—In the modern semiconductor industry, automatic generation of pa- 2 DEVELOPMENT rameterized and recurring layout structures plays an important role and should be present as a feature in Electronic Design Automation (EDA)-tools. Currently these layout generators are developed with a proprietary programming language OpenAccess [OpenAccess] has been established as standard and can be used with a specific EDA-tool. Therefore, the semiconductor com- for storing design data in the semiconductor industry and panies find the development of the layout generators that can be used in all builds the foundation for interoperability of EDA-tools. Ope- state of the art EDA-tools which support OpenAccess database appealing. The nAccess is a file based database and manages logical design goal of this project is to develop computationally efficient layout generators with Python (PyCells), for ams AG technologies, that possess all the features of data (schematics) as well as artwork data (layout) for manu- comprehensive layout generators. facturing. The reference implementation for accessing design data within the database is written in C++. The company Index Terms—PyCells, Semiconductor, OpenAccess Ciranova (now acquired by Synopsys) developed a Python wrapper [PythonAPI] for the OpenAccess C++ class library with the goal to access and modify design data through 1 INTRODUCTION Python. Additionally, they provide an integrated development The number of companies active in modern semiconductor environment [SynopsysPyCellStudio] that enables interactive business is increasing every day which raises the demand for development and debugging of Python code, while the effects cheaper EDA-tools. -
Platform Strategies in the Electronic Design Automation Industry
Platform Strategies in the Electronic Design Automation Industry by Arthur Low A thesis submitted to the Faculty of Graduate and Postdoctoral Affairs in partial fulfillment of the requirements for the degree of Master of Applied Science in Technology Innovation Management Carleton University Ottawa Ontario © 2013 Arthur Low The undersigned hereby recommend to The Faculty of Graduate and Postdoctoral Affairs Acceptance of the thesis Platform strategies in the electronic design automation industry by Arthur Low in partial fulfillment of the requirements for the degree of Master of Applied Science in Technology Innovation Management ________________________________________________________________ Antonio J. Bailetti, Director Institute of Technology Entrepreneurship and Commercialization ________________________________________________________________ Steven Muegge, Thesis Supervisor Carleton University September 2013 ii Abstract Platforms – architectures of related standards that allow modular substitution of complementary assets – feature prominently in technology-intensive industries. The motivations for firms to adopt a particular platform strategy and the ways in which platform strategies change over time are not fully understood. This thesis examines the platform strategies of three leading vendors in the Electronic Design Automation (EDA) industry from 1987 to 2002. It employs a two-part research design: (i) pattern-matching to operationalize and test a three-stage explanation previously developed by West (2003) to account for the evolution of platform strategies by firms in the computer industry, followed by (ii) explanation-building to account for differences between observations and the expected pattern. The pioneering EDA firm matches the expected pattern, but two other EDA firms bypass stage one to enter at stage two with open standards. All three firms later move to stage three simultaneously by adopting hybrid open source strategies. -
UNITED STATES SECURITIES and EXCHANGE COMMISSION Washington, DC 20549 FORM 10-K
UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 FORM 10-K (Mark One) È ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the year ended October 31, 2013 OR ‘ TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the transition period from to Commission File Number 0-19807 SYNOPSYS, INC. (Exact name of registrant as specified in its charter) Delaware 56-1546236 (State or other jurisdiction of (I.R.S. Employer incorporation or organization) Identification No.) 700 East Middlefield Road, Mountain View, California 94043 (Address of principal executive offices, including zip code) (650) 584-5000 (Registrant’s telephone number, including area code) Securities Registered Pursuant to Section 12(b) of the Act: Title of Each Class Name of Each Exchange on Which Registered Common Stock, $0.01 par value NASDAQ Global Select Market Securities Registered Pursuant to Section 12(g) of the Act: None Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes È No ‘ Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes ‘ No È Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. -
Supply Chain Innovation: Responding to Dynamic Challenges
Global Semiconductor Alliance SURVIVING UNDER CURRENT MARKET CONDITIONS RISK MANAGEMENT IN THE SEMICONDUCTOR SUPPLY CHAIN FAKING IT: WHY COUNTERFEITING IS THE SYMPTOM, NOT THE DISEASE ACCELERATING TECHNOLOGY EVOLUTION THROUGH PROCESS OUTSOURCING SEMICONDUCTOR EQUIPMENT SERVICE SUPPLY CHAIN—ANTICIPATING THE UPTURN Supply Chain Innovation: Responding to Dynamic Challenges Vol.16 No.3 Sept. 2009 Published by GSA $60 (U.S.) 1 A Powerful Platform for Amazing Performance Performance. To get it right, you need a foundry with an Open Innovation Platform™ and process technologies that provides the flexibility to expertly choreograph your success. To get it right, you need TSMC. Whether your designs are built on mainstream or highly advanced processes, TSMC ensures your products achieve maximum value and performance. Product Differentiation. Increased functionality and better system performance drive product value. So you need a foundry partner who keeps your products at their innovative best. TSMC’s robust platform provides the options you need to increase functionality, maximize system performance and ultimately differentiate your products. Faster Time-to-Market. Early market entry means more product revenue. TSMC’s DFM-driven design initiatives, libraries and IP programs, together with leading EDA suppliers and manufacturing data-driven PDKs, shorten your yield ramp. That gets you to market in a fraction of the time it takes your competition. Investment Optimization. Every design is an investment. Function integration and die size reduction help drive your margins. It’s simple, but not easy. We continuously improve our process technologies so you get your designs produced right the first time. Because that’s what it takes to choreograph a technical and business success. -
Examining the Constructs and Component Dimensions
EXAMINING THE CONSTRUCTS AND COMPONENT DIMENSIONS OF THE OPENACCESS PROJECT by Yijun Xu A thesis submitted to the Faculty of Graduate Studies and Research in partial fulfillment of the requirements for the degree of Master of Engineering in Telecommunications Technology Management Department of Systems and Computer Engineering, Carleton University Ottawa, Canada, K1S 5B6 August 2007 ©Copyright 2007 Yijun Xu Reproduced with permission of the copyright owner. Further reproduction prohibited without permission. Library and Bibliotheque et Archives Canada Archives Canada Published Heritage Direction du Branch Patrimoine de I'edition 395 Wellington Street 395, rue Wellington Ottawa ON K1A 0N4 Ottawa ON K1A 0N4 Canada Canada Your file Votre reference ISBN: 978-0-494-33679-3 Our file Notre reference ISBN: 978-0-494-33679-3 NOTICE: AVIS: The author has granted a non L'auteur a accorde une licence non exclusive exclusive license allowing Library permettant a la Bibliotheque et Archives and Archives Canada to reproduce,Canada de reproduire, publier, archiver, publish, archive, preserve, conserve,sauvegarder, conserver, transmettre au public communicate to the public by par telecommunication ou par I'lnternet, preter, telecommunication or on the Internet,distribuer et vendre des theses partout dans loan, distribute and sell theses le monde, a des fins commerciales ou autres, worldwide, for commercial or non sur support microforme, papier, electronique commercial purposes, in microform,et/ou autres formats. paper, electronic and/or any other formats. The author retains copyright L'auteur conserve la propriete du droit d'auteur ownership and moral rights in et des droits moraux qui protege cette these. this thesis. Neither the thesis Ni la these ni des extraits substantiels de nor substantial extracts from it celle-ci ne doivent etre imprimes ou autrement may be printed or otherwise reproduits sans son autorisation. -
Cadence Design Systems, Inc
CADENCE ANNUAL REPORT 2003 FROM BEGINNING TO END, MAKING IT POSSIBLE >> CORPORATE REGIONAL CADENCE DESIGN SYSTEMS, INC. HEADQUARTERS HEADQUARTERS >> CADENCE DESIGN SYSTEMS, INC. ASIA/PACIFIC EUROPE JAPAN 2655 Seely Avenue The Gateway, Tower II Bagshot Road 3-17-6 Shin-Yokohama, San Jose, California 95134 25 Canton Road Bracknell, Berkshire RG12 0PH Kouhoku-ku, Yokohama 408.943.1234 Suites 03–07, 23A United Kingdom Kanagawa 222-0033 www.cadence.com Tsimshatsui, Kowloon Phone: +44.1344.360333 Japan Hong Kong Fax: +44.1344.302837 Phone: +81.45.475.6330 Phone: +852.2377.7111 Fax: +81.45.475.6331 Fax: +852.2377.2802 2003 ANNUAL REPORT AND FORM 10 -K Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 4,800 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products, and services is available at www.cadence.com. STOCKHOLDER INFORMATION INDEPENDENT PUBLIC ACCOUNTANTS FORM 10-K INVESTOR RELATIONS KPMG LLP Restated Restated A copy of the Company’s Form 10-K, as filed with For further information on our Company, please SELECTED FINANCIAL DATA 2003 2002 2001 500 East Middlefield Road the Securities and Exchange Commission for the contact Cadence Investor Relations in writing at: Mountain View, CA 94043 year ended January 3, 2004, is available without (In thousands except per share amounts) Cadence Design Systems, Inc.