How to Calculate the Load Pole and ESR Zero When Using Hybrid Output Capacitors
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Application Report SLVAE26A–September 2018–Revised April 2019 How to Calculate the Load Pole and ESR Zero When Using Hybrid Output Capacitors Hao Zhang, Jason Wang ABSTRACT Multi-layer ceramic (MLCC), aluminum electrolytic, tantalum, and polymer are the capacitor types most widely used in DC/DC switching regulator circuits. In practical applications, a power designer can use a hybrid capacitor network, formed by combining different capacitor types, in an effort to achieve low ESR and high capacitance. This can be a very effective method of reducing output ripple and improving load transient performance. This application report provides a method to analyze how the hybrid capacitor network affects the loop. The Section 1 section introduces the key characteristics of each of the different types of capacitors. The Section 2 section discusses peak current mode power stage small signal modeling with a hybrid output capacitor network. Finally, the Section 3 section verifies the analysis with bench test results on TPS65400EVM. Contents 1 Introduction ................................................................................................................... 2 2 Current Mode Power Stage Small Signal Modeling..................................................................... 3 3 Bench Verification ........................................................................................................... 7 4 Summary .................................................................................................................... 12 5 References .................................................................................................................. 12 List of Figures 1 Simplified Current Mode Functional Block Diagram .................................................................... 3 2 Current Mode Buck Converter Circuit With Hybrid Output Capacitor Network ...................................... 4 3 Simplified Power Stage Bode Plot of Single Output Capacitor Configuration ....................................... 6 4 Simplified Power Stage Bode Plot of Hybrid Output Capacitor Network Configuration ............................ 7 5 Simplified Schematic of All MLCC Output Capacitor Configuration................................................... 8 6 Bode Plot of All MLCC Output Capacitor Configuration (VOUT = 3.3 V, IOUT = 1.5 A)................................ 8 7 Simplified Schematic of Hybrid Output Capacitor Configuration ...................................................... 9 8 Bode Plot of Hybrid Output Capacitor Configuration .................................................................. 10 9 Simplified Schematic of Single Polymer Output Capacitor Configuration .......................................... 10 10 Bode Plot of Single Polymer Output Capacitor Configuration (VOUT = 3.3 V, IOUT = 1.5 A) ....................... 11 11 Gain Frequency Response Comparison Among Hybrid, MLCC, and Polymer Output Capacitor Configuration ............................................................................................................... 11 List of Tables 1 Comparison of Different Types of Capacitors............................................................................ 2 2 Basic Configurations of TPS65400EVM .................................................................................. 7 3 Parameters of Capacitors Used in Output Capacitor Network......................................................... 9 Trademarks All trademarks are the property of their respective owners. SLVAE26A–September 2018–Revised April 2019 How to Calculate the Load Pole and ESR Zero When Using Hybrid Output 1 Submit Documentation Feedback Capacitors Copyright © 2018–2019, Texas Instruments Incorporated Introduction www.ti.com 1 Introduction Output capacitors are critical components for a switch-mode power supply. To select output capacitors for a DC/DC switching regulator application, the basic parameters you must pay attention to include capacitance, equivalent series resistance (ESR), rated voltage, and size. Table 1 compares the four types of capacitors. Table 1. Comparison of Different Types of Capacitors CAPACITANCE ESR RATED VOLTAGE SIZE Multi-layer Ceramic Low Low Medium Small Capacitor Aluminum Electrolytic High High Various Large Capacitor Tantalum Capacitor Medium Medium Medium Medium Polymer Capacitor High Medium Medium Medium Generally speaking, MLCC provides very low ESR, which is critical to compress the resistive output ripple. Aluminum electrolytic capacitors provide a large amount of capacitance, but have the highest ESR among the four capacitor types. Tantalum and polymer capacitors have medium-range capacitance values, ESR, and rated voltage. By using a hybrid capacitor network, designers can take advantage of the benefits of each capacitor type. In applications where small ripple, overshoot, and undershoot are required, hybrid output capacitor networks are very common. Loop stability is another important topic for DC/DC switching regulator circuit design. In DC/DC converter small signal modeling, the capacitance and ESR values of the output capacitor have a direct effect on the poles and zeros in the open loop transfer function. With the presence of a hybrid output capacitor network, new poles and zeros are introduced into the loop by the network itself. This application report discusses how hybrid output capacitors influence the loop, and then verifies the analysis using the TPS65400EVM. 2 How to Calculate the Load Pole and ESR Zero When Using Hybrid Output SLVAE26A–September 2018–Revised April 2019 Capacitors Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated www.ti.com Current Mode Power Stage Small Signal Modeling 2 Current Mode Power Stage Small Signal Modeling Figure 1 shows the simplified functional block diagram of a peak current mode DC/DC circuit. Current + Sense ± VIN Power stage dÖ vÖ Control out L Logic ESR Rload RFBT COUT vÖFB RFBB ± vÖ COMP Compensation EA + Network VREF Control stage Figure 1. Simplified Current Mode Functional Block Diagram To analyze and judge the loop stability by open loop transfer function and Bode plot, the loop is split into two components: Gopen )s( Gdv H)s( vd )s( where • Gdv(s) are the transfer function from control to the output ( to ), including the PWM modulator and power stage. Ö Ö • Hvd(s) is the transfer function from the output to control ( vout to d ), including the feedback path, compensation network. (1) Poles and zeros in power stage have a direct effect on the loop transfer function. To understand how the hybrid output capacitor network affects the loop, calculate the poles and zeros in the power stage. The calculation can vary in the different control mode, as they have different control to output transfer function Gdv(s). This application report shows how to do the calculation based on a current mode DC/DC converter circuit. Impedance of hybrid output capacitor network is discussed first. Based on that, the effect of the network on current mode DC/DC circuit is analyzed. SLVAE26A–September 2018–Revised April 2019 How to Calculate the Load Pole and ESR Zero When Using Hybrid Output 3 Submit Documentation Feedback Capacitors Copyright © 2018–2019, Texas Instruments Incorporated Current Mode Power Stage Small Signal Modeling www.ti.com 2.1 Impedance of Hybrid Output Capacitor Network Figure 1 shows that the output capacitor in the functional block diagram is simplified as a single capacitor. Impedance of a single capacitor with a specific ESR is: 1+ s ESR C Zcap )s( sC (2) When the output capacitor is substituted by an output capacitor network, the situation can be different. Figure 2 shows two capacitors with same or different capacitance and ESR that are put in parallel. + Current ± Sense VIN Hybrid Output Capacitor Netwrok Vout Control Logic L ESR1 ESR2 RFBT Rload Cout1 Cout2 RFBB GND ± Compensation EA + Network VREF Figure 2. Current Mode Buck Converter Circuit With Hybrid Output Capacitor Network Impedance of the hybrid capacitor network Zcap(s) can be expressed as: 1 1 Zcap )s( (R1 + ) //(R2 + ) sC1 sC 2 where • R1 is the ESR of C1 • R2 is the ESR of C2 (3) If you expand Equation 3, you have: 1( + sR C ) (1+ sR C ) Z )s( 1 1 2 2 cap ª º C1C 2 s(C1 + C 2 ) …1+ s (R1 + R 2 ) » C + C ¼ 1 2 (4) Equation 4 indicates when the capacitance and ESR are different. There is an initial pole, a parallel pole, and two ESR zeros in the impedance expression. A specific situation is where the two capacitors are same, C1 = C2 = C, R1 = R2 = R. Equation 4 can be further simplified as: 4 How to Calculate the Load Pole and ESR Zero When Using Hybrid Output SLVAE26A–September 2018–Revised April 2019 Capacitors Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated www.ti.com Current Mode Power Stage Small Signal Modeling 1+ sRC Zcap )s( C2s (5) In this situation, two of the same output capacitors can be equalized to one single capacitor with two times capacitance and half ESR. 2.2 Pole and Zero Calculation in Current Mode Power Stage The distribution of poles and zeros in the loop transfer function depends on both power stage characteristic and control mode. As discussed in the Current-Mode Modeling for Peak, Valley and Emulated Control Methods Application Report, the transfer function of peak current mode buck converter power stage is: s 1 + Ö w v out 1 ESR Ö R 1 s s v c i + 1( + 1() + ) w w R o K m 0 L where • Ro is the loading resistance VIN K m V • Km is the modulator voltage gain, which is