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Design Trade-Offs in Common-Mode Feedback Implementations for Highly Linear Three-Stage Operational Transconductance Amplifiers

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Design Trade-Offs in Common-Mode Feedback Implementations for Highly Linear Three-Stage Operational Transconductance Amplifiers electronics Article Design Trade-Offs in Common-Mode Feedback Implementations for Highly Linear Three-Stage Operational Transconductance Amplifiers Joseph Riad 1,* , Sergio Soto-Aguilar 1 , Johan J. Estrada-López 2,* , Oscar Moreira-Tamayo 1 and Edgar Sánchez-Sinencio 1 1 Electrical and Computer Engineering Department, Texas A&M University, College Station, TX 77843, USA; [email protected] (S.S.-A.); [email protected] (O.M.-T.); [email protected] (E.S.-S.) 2 Faculty of Mathematics, Autonomous University of Yucatán, Mérida 97110, Yucatán, Mexico * Correspondence: [email protected] (J.R.); [email protected] (J.J.E.-L.) Abstract: Fully differential amplifiers require the use of common-mode feedback (CMFB) circuits to properly set the amplifier’s operating point. Due to scaling trends in CMOS technology, modern amplifiers increasingly rely on cascading more than two stages to achieve sufficient gain. With multiple gain stages, different topologies for implementing CMFB are possible, whether using a single CMFB loop or multiple ones. However, the impact on performance of each CMFB approach has seldom been studied in the literature. The aim of this work is to guide the choice of the CMFB implementation topology evaluating performance in terms of stability, linearity, noise and common- mode rejection. We present a detailed theoretical analysis, comparing the relative performance of Citation: Riad, J.; Soto-Aguilar, S.; two CMFB configurations for 3-stage OTA topologies in an implementation-agnostic manner. Our Estrada-López, J.J.; Moreira-Tamayo, analysis is then corroborated through a case study with full simulation results comparing the two O.; Sánchez-Sinencio, E. Design topologies at the transistor level and confirming the theoretical intuition. An active-RC filter is used Trade-Offs in Common-Mode as an example of a high-linearity OTA application, highlighting a 6 dB improvement in P in the Feedback Implementations for Highly 1dB Linear Three-Stage Operational multi-loop implementation with respect to the single-loop case. Transconductance Amplifiers. Electronics 2021, 10, 991. https:// Keywords: common-mode feedback; common-mode rejection; linearity; three-stage OTA; stability; doi.org/10.3390/electronics10090991 noise; active filter Academic Editors: Paolo Colantonio and Alessandro Cidronali 1. Introduction Received: 15 March 2021 The Operational Transconductance Amplifier (OTA) is a fundamental building block Accepted: 19 April 2021 in analog circuit design. It is designed to provide large voltage gain and to drive only Published: 21 April 2021 capacitive loads, so it is characterized by a large output impedance [1]. The circuit symbol of the OTA is shown in Figure1. In many applications (such as active filters), the OTA has a Publisher’s Note: MDPI stays neutral negative feedback configuration applied to it, which improves the circuit’s bandwidth and with regard to jurisdictional claims in linearity, reduces noise and sensitivity to process variations [1]. However, those benefits published maps and institutional affil- rely on the OTA having high gain. The higher the OTA’s gain, the better the accuracy and iations. the rejection of unwanted noise. As supply voltages continue to scale down in newer process technologies, achieving a high gain with a simple two-stage OTA becomes more difficult and using the traditional cascode configuration severely limits signal excursion. One solution to this problem is Copyright: © 2021 by the authors. to use multiple gain stages in cascade [2,3]. Moreover, high-precision applications ne- Licensee MDPI, Basel, Switzerland. cessitate the use of a fully-differential multi-stage OTA for the rejection of even-order This article is an open access article harmonic distortion and common-mode noise, which provide the added benefit of improv- distributed under the terms and ing dynamic range. conditions of the Creative Commons While differential signaling leads to improved linearity, it adds complexity to the Attribution (CC BY) license (https:// circuit by requiring the use of a common-mode feedback (CMFB) loop to set the amplifier’s creativecommons.org/licenses/by/ DC operating point and reject common-mode disturbances. The design of CMFB loops, 4.0/). Electronics 2021, 10, 991. https://doi.org/10.3390/electronics10090991 https://www.mdpi.com/journal/electronics Electronics 2021, 10, 991 2 of 31 therefore, forms an integral part of many applications and a careful approach is needed to ensure they remain stable while being fast enough to reject common-mode disturbances that lie within the OTA’s operational bandwidth [1,4]. An extra complication to the CMFB design problem in multi-stage OTAs is that there are many different topological approaches to the implementation. For the three-stage amplifier case, there are at least two different approaches as shown in Figure1. gmCM − Three-Stage OTA CM Error Amplifier + vin− vout Vref + − CM − gm1 H (s) H (s) A (s) 2 3 Sensor EA + + + − vCM vin vout− − gmCM (a) Single loop gmCM2 − Three-Stage OTA CM Error Amplifier 2 + vin− vout Vref2 + − CM − gm1 H (s) H (s) A (s) 2 3 Sensor 2 EA2 + + + − vCM2 vin vout− CM g mCM1 Sensor 1 − − − gmCM2 + vCM1 AEA1(s)− Vref1 CM Error Amplifier 1 (b) Multiple loops Figure 1. Possible common-mode feedback (CMFB) implementations for a 3-stage amplifier. The blocks labeled H2(s) and H3(s) together constitute the inner amplifier, including its compensation network. As shown in Figure1a, one possible solution is to have a single CMFB loop sensing the output common-mode voltage and feeding back a common-mode current into the output of the first stage. In the CMFB loop, a common-mode (CM) sensor is used to sense the common-mode component of two voltages and then a CM error amplifier amplifies the difference between this common-mode component and the reference voltage that we desire Electronics 2021, 10, 991 3 of 31 to set the CM component to. Thus, the CM negative feedback loop sets the common-mode component of the voltages sensed by the CM sensor to the reference voltage input to the CM error amplifier. Another solution, shown in Figure1b, is to use two CMFB loops, one to set the output common-mode voltage by feeding back current into the output nodes and one to set the output common-mode voltage of the H2(s) stage and feeds back common-mode current into the output of the first stage. In the multi-stage amplifier literature, the topic of fully-differential OTA design is rarely broached, in particular when it comes to the design trade-offs of different CMFB approaches. If the intermediate gain stage is implemented in a fully-differential fashion, several options for the CMFB loop implementation are available, such as using a single loop that does not include all three stages [5] or using one loop per stage [6]. Such options are not available for high-linearity applications since in those cases, a pseudo-differential intermediate stage is used to improve signal swing and reduce distortion. The authors of [7] implemented a two-loop switched-capacitor solution but do not go into details concerning the trade-offs involved in the design of those CMFB loops. Some authors have even achieved the impressive feat of designing four-stage fully differential amplifiers with a single CMFB loop [4,8], but their approaches rely on the common-mode error amplifier pole being at a much higher frequency than the differential loop bandwidth, which may not be feasible in low-power amplifiers or high-frequency applications. Additionally, neither work considers the impact of the CMFB loop design on amplifier linearity. There is therefore a real need to approach these trade-offs in a systematic manner that offers intuition to designers on the relative merits of different CMFB topologies. This is the aim of this work. At first glance, it seems that using multiple loops unnecessarily increases complexity and power consumption, leading to the conclusion that the single-loop option is the better solution. However, in this work we propose to investigate whether this original intuition is justified. The performance of the two solutions will be qualitatively compared using different metrics of performance. Among our findings, it is shown that using a single loop can be challenging in terms of ensuring its stability and may end up being a worse option in terms of linearity, area and power consumption. Our analysis, both theoretical and with transistor-level simulations, proves the counter- intuitive result that using multiple loops is actually better for performance, especially in terms of linearity—arguably the most important metric that leads to the adoption of fully-differential circuits in the first place. This paper is organized as follows—in Section2, an extensive theoretical analysis of the two solutions is developed, based on the aspects of stability, linearity, noise performance and common-mode rejection (CMR). In Section3, a case study that implements both solutions at the transistor level is simulated to confirm the results of the analysis. Particular care is taken to ensure that both implementations consume the same amount of power and share the same circuit architecture (except the CMFB loops) to ensure a fair comparison. Also, an active-RC biquad low-pass filter is implemented, highlighting the linearity design trade-off in a common application of multi-stage amplifiers. Section4 provides a summary discussion of the merits of each implementation. Finally, some conclusions are given. 2. Theoretical Comparison In this section, the different performance aspects of the two designs are compared theo- retically, with transistor-level simulation results confirming the analysis in the next section. 2.1. Stability Since there are many different approaches to compensating the differential-mode loop of a three-stage amplifier, it is important to evaluate the stability of the different CMFB approaches in a manner that is agnostic to the underlying compensation scheme.
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