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System Specification and Modelling Physical Design and Verification System and Industrial Test 1 E Eugenio Villar Igor L Markov Erik Jan Marinissen T A

Cantabria U, ES U of Michigan, US IMEC, BE D Grant Martin Jens Lienig Peter Harrod

Tensilica, US TU Dresden, DE ARM, UK y n MPSoC and System Design Methods Virtualisation Technologies Design for Test and BIST a m r

Andy Pimentel Andre Brinkmann Krishnendu Chakrabarty e G

Amsterdam U, NL Paderborn U, DE Duke U, US ,

Wido Kruijtzer Mike Kreiten Sandeep Kumar Goel n e

Virage Logic, NL AMD, DE LSI CORP, US d s e

System Synthesis and Optimisation Analogue and Mixed-Signal Systems Test Generation, Simulation and r D

and Circuits Diagnosis Peter Marwedel , C

Dortmund U, DE Tom Kazmierski Nicola Nicolici C I

Samarjit Chakraborty Southampton U, UK McMaster U, Hamilton, CA

TU Munich, DE Christoph Grimm Bart Vermeulen 0

TU Vienna, AT NXP, NL 1

Simulation and Validation 0 2

Interconnect, EMC, ESD and On-Line Testing and Fault Tolerance

Ian Harris h

Packaging Modelling c

UC Irvine, US Dimitris Gizopoulos r Valeria Bertacco Wil Schilders Piraeus U, GR a M U of Michigan, US NXP, NL Davide Appello 2

Tom Dhaene STMicroelectronics, IT 1 Design of Low Power Systems - Ghent U, BE Test for Variability, Reliability and 8 Miguel Miranda Signal Processing for Multimedia Defects IMEC, BE Alberto Macii Christos-Savvas Bouganis Sandip Kundu Politecnico di Torino, IT Imperial College, UK Massachusetts U, US Power Estimation and Optimisation Sergio Saponara Rob Aitken Pisa U, IT ARM, US Joerg Henkel Wireless Communication and Analogue, Mixed-Signal, RF and Karlsruhe U, DE Networking Mixed-Technology Test Kaushik Roy Purdue U, US Cyprian Grassmann Hans Kerkhoff Emerging Technologies, Systems and Infineon, DE Twente U, NL Applications Guido Masera Abhijt Chatterjee Politecnico di Torino, IT Georgia Institute of Technology, US Pol Marchal Automotive Real-Time, Networked and IMEC, BE Dependable Systems Yuan Xie Luca Fanucci Penn State U, US Pisa U, IT Petru Eles Formal Methods and Verification Christian Sebeke Linkoping U, SE Bosch, DE Luis Almeida Jason Baumgartner Secure Embedded Implementations Aveiro U, PT IBM, US Compilers and Code Generation for Joao Marques-Silva Ingrid Verbauwhede Embedded Systems UC Dublin, IE KU Leuven, BE Network on Chip Jerome Quevremont Shuvra Bhattacharyya Thales, FR Maryland U, US Lin-Shiuan Peh Space and Aeronautics Avionics Rainer Leupers Princeton U, US Application Design RWTH Aachen U, DE Davide Bertozzi Model-Based Design for Embedded Ferrara U, IT Sylvain Prudhomme Systems Architectural and Microarchitectural Airbus, FR Design Agustín Fernandez Leon Albert Benveniste ESA, NL INRISA, FR Dionisios Pnevmatikatos Sensor Networks and Emerging Christoph Kirsch Forth-ICS, GR Applications Salzburg U, AT Christos Kozyrakis Embedded Software Architectures Stanford U, US Pietro Siciliano and Principles Architectural and High-Level National Research Council, IT Synthesis Aly Aamer Syed Ahmed Jerraya NXP, NL CEA-LETI, FR Paolo Ienne Application of Reconfigurable and Andre Hergenhan EPF Lausanne, CH Adaptive Systems Opensynergy, DE Philippe Coussy Bretagne-Sud U, FR Christoph Heer Embedded Software Applications - Architectures, Tools and , DE Michael Huebner Methodologies Juergen Becker Karlsruhe U, DE Wolfgang Ecker U Karlsruhe (TH), DE Multi-Core Platforms Infineon Technologies, DE Patrick Lysaght Werner Damm , US Marcello Coppola OFFIS, DE Logic and Technology Dependent STMicroelectronics, FR Synthesis for Deep-Submicron Frederic Petrot Circuits TIMA, FR Steven Nowick Analogue and Mixed-Signal System Columbia U, US Implementations Michel Berkelaar Paolo D’Abramo TU Delft, NL austriamicrosystems, IT Vito Giannini IMEC, BE

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