Advancements in Microprocessor Architecture for Ubiquitous AI—An Overview on History, Evolution, and Upcoming Challenges in AI Implementation

Total Page:16

File Type:pdf, Size:1020Kb

Advancements in Microprocessor Architecture for Ubiquitous AI—An Overview on History, Evolution, and Upcoming Challenges in AI Implementation micromachines Review Advancements in Microprocessor Architecture for Ubiquitous AI—An Overview on History, Evolution, and Upcoming Challenges in AI Implementation Fatima Hameed Khan, Muhammad Adeel Pasha * and Shahid Masud * Department of Electrical Engineering, Lahore University of Management Sciences (LUMS), Lahore, Punjab 54792, Pakistan; [email protected] * Correspondence: [email protected] (M.A.P.); [email protected] (S.M.) Abstract: Artificial intelligence (AI) has successfully made its way into contemporary industrial sectors such as automobiles, defense, industrial automation 4.0, healthcare technologies, agriculture, and many other domains because of its ability to act autonomously without continuous human interventions. However, this capability requires processing huge amounts of learning data to extract useful information in real time. The buzz around AI is not new, as this term has been widely known for the past half century. In the 1960s, scientists began to think about machines acting more like humans, which resulted in the development of the first natural language processing computers. It laid the foundation of AI, but there were only a handful of applications until the 1990s due to limitations in processing speed, memory, and computational power available. Since the 1990s, advancements in computer architecture and memory organization have enabled microprocessors to deliver much higher performance. Simultaneously, improvements in the understanding and mathematical representation of AI gave birth to its subset, referred to as machine learning (ML). ML Citation: Khan, F.H.; Pasha, M.A.; includes different algorithms for independent learning, and the most promising ones are based on Masud, S. Advancements in brain-inspired techniques classified as artificial neural networks (ANNs). ANNs have subsequently Microprocessor Architecture for evolved to have deeper and larger structures and are often characterized as deep neural networks Ubiquitous AI—An Overview on History, Evolution, and Upcoming (DNN) and convolution neural networks (CNN). In tandem with the emergence of multicore pro- Challenges in AI Implementation. cessors, ML techniques started to be embedded in a range of scenarios and applications. Recently, Micromachines 2021, 12, 665. application-specific instruction-set architecture for AI applications has also been supported in differ- https://doi.org/10.3390/mi12060665 ent microprocessors. Thus, continuous improvement in microprocessor capabilities has reached a stage where it is now possible to implement complex real-time intelligent applications like computer Academic Editor: Piero Malcovati vision, object identification, speech recognition, data security, spectrum sensing, etc. This paper presents an overview on the evolution of AI and how the increasing capabilities of microprocessors Received: 5 May 2021 have fueled the adoption of AI in a plethora of application domains. The paper also discusses the Accepted: 3 June 2021 upcoming trends in microprocessor architectures and how they will further propel the assimilation Published: 6 June 2021 of AI in our daily lives. Publisher’s Note: MDPI stays neutral Keywords: artificial intelligence; microprocessors; instruction set architecture; application-specific in- with regard to jurisdictional claims in tegrated circuits; real-time processing; machine learning; intelligent systems; automation; multicores published maps and institutional affil- iations. 1. Introduction Artificial intelligence (AI) is a thriving tool that has coupled human intelligence and Copyright: © 2021 by the authors. Licensee MDPI, Basel, Switzerland. machine efficiency to excel in various disciplines of life. The idea of building intelligent This article is an open access article machines is even older than the field of AI itself. In 1950, Alan Turing presented the distributed under the terms and possibility of implementing an intelligent machine and gave the parameters to judge conditions of the Creative Commons its intelligence, known as the Turing test [1]. The term “artificial intelligence” was first Attribution (CC BY) license (https:// mentioned in the Dartmouth Conference in 1956, which was attended by those who later creativecommons.org/licenses/by/ became the leading figures of this field. Early AI research included several programs 4.0/). and methodologies, such as General Problem Solver [2], Theorem Prover [3], natural Micromachines 2021, 12, 665. https://doi.org/10.3390/mi12060665 https://www.mdpi.com/journal/micromachines Micromachines 2021, 12, x 2 of 23 telligence, known as the Turing test [1]. The term “artificial intelligence” was first men- tioned in the Dartmouth Conference in 1956, which was attended by those who later be- Micromachines 2021, 12, 665 came the leading figures of this field. Early AI research included several programs2 of 22 and methodologies, such as General Problem Solver [2], Theorem Prover [3], natural language processor ELIZA [4] and the discovery of the perceptron [5]. Intrigued by the success of theselanguage projects, processor the Defense ELIZA [Advanced4] and the discoveryResearch ofProjects the perceptron Agency [(DARPA)5]. Intrigued also by invested the massivelysuccess of thesein this projects, field to theutilize Defense machine Advanced intelligence Research for Projectsvarious Agencynational (DARPA) security projects also [6].invested After massivelythis first wave, in this AI field encountered to utilize machine technological intelligence barriers for various that curtailed national the security vast ex- pectationsprojects [6]. of After AI. thisIn the first following wave, AI decades, encountered as the technological market for barriers personal that computers curtailed the (PCs) wasvast established, expectations the of AI.paradigm In the following of AI shifted decades, to a knowledge-based-system, as the market for personal computersalso known as Expert(PCs) was Systems established, [7]. It was the programmed paradigm of AIusing shifted symbolic to a knowledge-based-system, programming languages alsosuch as LISPknown or asProlog. Expert Expert Systems Systems [7]. It was were programmed used to implement using symbolic human programming expert knowledge languages in a machinesuch as LISP that or makes Prolog. decisions Expert Systems based on were stored used information to implement [8]. human Due expertto problems knowledge in accu- in a machine that makes decisions based on stored information [8]. Due to problems racy and efficiency, Expert Systems could not find widespread acceptability in the market. in accuracy and efficiency, Expert Systems could not find widespread acceptability in Finally, the increase in computing power and development of more sophisticated the market. mathematicalFinally, the modeling increase tools in computing gave birth power to a new and AI development paradigm that of morebecame sophisticated more success- fulmathematical than before. modeling The more tools advanced gave birth subset to a new of AI AI algorithms paradigm that in the became form more of machine successful learn- ingthan (ML) before. addressed The more the advanced complex subset problems of AI of algorithms AI and showed in the form a promising of machine way learning forward because(ML) addressed of its ability the complex to make problems autonomous of AI and decisions showed based a promising on previous way forward learning because and the scenariosof its ability at tohand make [9]. autonomous The algorithms decisions used based in ML on previouscan find learning applications and the in scenarios diverse use cases,at hand such [9]. as The the algorithms use of decision used trees in ML to can mo findnitor applications the depth of in anesthesia diverse use [10] cases, and suchsupport vectoras the machines use of decision (SVM) trees in financial to monitor research the depth [11]. of Artificial anesthesia neural [10] andnetworks support (ANN) vector have notmachines only outperformed (SVM) in financial other research ML algorithms [11]. Artificial but also neural surpassed networks human (ANN) intelligence have not in specificonly outperformed tasks, e.g., image other ML classification algorithms on but an also ImageNet surpassed dataset human [12]. intelligence It motivated in specific research- erstasks, to delve e.g., image deeper classification into the ANN on structure, an ImageNet which dataset resulted [12]. in It networks motivated with researchers more param- to eters,delve layers, deeper and into operations, the ANN structure, which came which to resulted be classified in networks as deep with neural more networks parameters, (DNN) [13].layers, DNNs and operations,can be further which divided came tointo be structured classified as network deep neural techniques networks for (DNN) various [13 appli-]. DNNs can be further divided into structured network techniques for various applications, cations, i.e., recurrent neural networks (RNN) and transformer networks that mainly fo- i.e., recurrent neural networks (RNN) and transformer networks that mainly focus on cus on natural language processing. In recent years, AI has revolutionized society by cov- natural language processing. In recent years, AI has revolutionized society by covering a eringwide a range wide of range applications, of applications, from the from simplest the simplest smartphones smartphones in our hands in our to hands security to security and andsurveillance surveillance [14] and[14] autonomousand autonomous vehicle vehicle controls co [ntrols15]. Currently, [15].
Recommended publications
  • Build a Swtpc 6800
    Southwest Technical Products Corporation 6800 Computer System The Southwest Technical Products 6800 computer system is based upon the Motorola MC6800 microprocessor unit (MPU) and its matching support devices. The 6800 system was chosen for our computer because this set of parts is currently in our opinion the "Benchmark Family" for microprocessor computer systems. It makes it possible for us to provide you with an outstanding computer system having a minimum of parts, but with outstanding versatility and ease of use. In addition to the outstanding hardware system, the Motorola 6800 has without question the most complete set of documentation yet made available for a microprocessor system. The 714 page Applications Manual, for example, contains material on programming techniques, system organization, input/output techniques, hardware characteristics, peripheral control techniques, and more. Also available is a Programmers Manual which details the various types of software available for the system and instructions for programming and using the unique interface system that is part of the 6800 system. The M6800 family of parts minimizes the number of, required components and support parts, provides extremely simple interfacing to external devices and has outstanding documentation. The MC6800 is an eight-bit parallel microprocessor with addressing capability of up to 45,536 words (BYTES) of data. The system is TTL compatible requiring only a single fine-volt power supply. All devices and memory in the 6800 computer family are connected to an 8-bit bi-directional data bus. In addition to this a 16-bit address bus is provided to specify memory location. This later bus is also used as a tool to specify the particular input/ output device to be selected when the 6800 family interface devices are used.
    [Show full text]
  • Exorciser USER's GUIDE
    M6809EXOR(D1) ®MOTOROLA M6809 EXORciser User's Guide MICROSYSTEMS M6809EXOR (Dl} SEPTEMBER 1979 M6809 EXORciser USER'S GUIDE The information in this document has been carefully checked and is believed to be entirely reliable. However, no res pons i bi 1ity is assumed for inaccuracies. Furthermore, Motorola reserves the right to make changes to any products herein to improve reliability, function, or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. EXORciser®, EXORdisk, and EXbug are trademarks of Motorola Inc. First Edition ©Copyright 1979 by Motorola Inc. TABLE OF CONTENTS Page CHAPTER 1 GENERAL INFORMATION 1.1 INTRODUCTION 1-1 1.2 FEATURES 1-1 1.3 SPECIFICATIONS 1-2 1.4 EQUIPMENT SUPPLIED 1-2 1.5 GENERAL DESCRIPTION 1-3 1.5.1 EXORciser Memory Parity 1-3 1.5.2 Dual Map Concepts 1-5 1.5.3 Second level Interrupt Feature 1-7 1.5.4 Dynamic System Bus 1-10 CHAPTER 2 INSTALLATION INSTRUCTIONS AND HARDWARE PREPARATION 2.1 INTRODUCTION 2-1 2.2 UNPACKING INSTRUCTIONS 2-1 2.3 INSPECTION 2-1 2.4 INSTALLATION INSTRUCTIONS 2-1 2.5 DATA TERMINAL SELECTION AND CONNECTIONS 2-2 2.5.1 RS-232C Interconnections 2-2 2.5.2 20mA Current loop Interconnections 2-2 2.6 PREPARATION OF SYSTEM MODULES 2-2 CHAPTER 3 OPERATING INSTRUCTIONS 3.1 INTRODUCTION 3-1 3.2 SWITCHES AND INDICATORS 3-1 3.2.1 Front Panel Switches and Indicators 3-1 3.2.2 Switches on the DEbug Module 3-2 3.3 INITIALIZATION 3-3 3.3.1
    [Show full text]
  • Lecture Note 1
    EE586 VLSI Design Partha Pande School of EECS Washington State University [email protected] Lecture 1 (Introduction) Why is designing digital ICs different today than it was before? Will it change in future? The First Computer The Babbage Difference Engine (1832) 25,000 parts cost: £17,470 ENIAC - The first electronic computer (1946) The Transistor Revolution First transistor Bell Labs, 1948 The First Integrated Circuits Bipolar logic 1960’s ECL 3-input Gate Motorola 1966 Intel 4004 Micro-Processor 1971 1000 transistors 1 MHz operation Intel Pentium (IV) microprocessor Moore’s Law In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months Moore’s Law 16 15 14 13 12 11 10 9 8 7 6 OF THE NUMBER OF 2 5 4 LOG 3 2 1 COMPONENTS PER INTEGRATED FUNCTION 0 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 Electronics, April 19, 1965. Evolution in Complexity Transistor Counts 1 Billion K Transistors 1,000,000 100,000 Pentium® III 10,000 Pentium® II Pentium® Pro 1,000 Pentium® i486 100 i386 80286 10 8086 Source: Intel 1 1975 1980 1985 1990 1995 2000 2005 2010 Projected Courtesy, Intel Moore’s law in Microprocessors 1000 2X growth in 1.96 years! 100 10 P6 Pentium® proc 1 486 386 0.1 286 Transistors (MT) Transistors 8086 Transistors8085 on Lead Microprocessors double every 2 years 0.01 8080 8008 4004 0.001 1970 1980 1990 2000 2010 Year Courtesy, Intel Die Size Growth 100 P6
    [Show full text]
  • IBM Z Systems Introduction May 2017
    IBM z Systems Introduction May 2017 IBM z13s and IBM z13 Frequently Asked Questions Worldwide ZSQ03076-USEN-15 Table of Contents z13s Hardware .......................................................................................................................................................................... 3 z13 Hardware ........................................................................................................................................................................... 11 Performance ............................................................................................................................................................................ 19 z13 Warranty ............................................................................................................................................................................ 23 Hardware Management Console (HMC) ..................................................................................................................... 24 Power requirements (including High Voltage DC Power option) ..................................................................... 28 Overhead Cabling and Power ..........................................................................................................................................30 z13 Water cooling option .................................................................................................................................................... 31 Secure Service Container .................................................................................................................................................
    [Show full text]
  • Intel 8080 Datasheet
    infel.. 8080A/8080A-1/8080A-2 8-BIT N-CHANNEL MICROPROCESSOR • TTL Drive Capability • Decimal, Binary, and Double Precision • 2,..,s (-1:1.3,..,s, -2:1.5 ,..,s) Instruction Arithmetic Cycle • Ability to Provide Priority Vectored • Powerful Problem Solving Instruction Interrupts Set • 512 Directly Addressed 110 Ports 6 General Purpose Registers and an Available In EXPRESS • Accumulator • - Standard Temperature Range 16-Blt Program Counter for Directly Available In 4Q-Lead Cerdlp and Plastic • Addressing up to 64K Bytes of Memory • Packages 16-Blt Stack Pointer and Stack (See Packaging Spec. Order #231369) • Manipulation Instructions for Rapid Switching of the Program Environment • The Intel 8080A is a complete 8-bit parallel central processing unit (CPU). It is fabricated on a single LSI chip using Intel's n-channel silicon gate MOS process. This offers the user a high performance solution to control and processing applications. The 8080A contains 6 8-bit general purpose working registers and an accumulator. The 6 general purpose registers may be addressed individually or in pairs providing both single and double precision operators. Arithmetic and logical instructions set or reset 4 testable flags. A fifth flag provides decimal arithmetic opera­ tion. The 8080A has an external stack feature wherein any portion of memory may be used as a last in/first out stack to store/retrieve the contents of the accumulator, flags, program counter, and all of the 6 general purpose registers. The 16-bit stack pointer controls the addressing of this external stack. This stack gives the 8080A the ability to easily handle multiple level priority interrupts by rapidly storing and restoring processor status.
    [Show full text]
  • Retrocomputing As Preservation and Remix
    Retrocomputing as Preservation and Remix Yuri Takhteyev Quinn DuPont University of Toronto University of Toronto [email protected] [email protected] Abstract This paper looks at the world of retrocomputing, a constellation of largely non-professional practices involving old computing technology. Retrocomputing includes many activities that can be seen as constituting “preservation.” At the same time, it is often transformative, producing assemblages that “remix” fragments from the past with newer elements or joining together historic components that were never combined before. While such “remix” may seem to undermine preservation, it allows for fragments of computing history to be reintegrated into a living, ongoing practice, contributing to preservation in a broader sense. The seemingly unorganized nature of retrocomputing assemblages also provides space for alternative “situated knowledges” and histories of computing, which can sometimes be quite sophisticated. Recognizing such alternative epistemologies paves the way for alternative approaches to preservation. Keywords: retrocomputing, software preservation, remix Recovering #popsource In late March of 2012 Jordan Mechner received a shipment from his father, a box full of old floppies. Among them was a 3.5 inch disk labelled: “Prince of Persia / Source Code (Apple) / ©1989 Jordan Mechner (Original).” Mechner’s announcement of this find on his blog the next day took the world of nerds by storm.1 Prince of Persia, a game that Mechner single-handedly developed in the late 1980s, revolutionized computer games when it came out due to its surprisingly realistic representation of human movement. After being ported to DOS and Apple’s Mac OS in the early 1990s the game sold 2 million copies (Pham, 2001).
    [Show full text]
  • Over View of Microprocessor 8085 and Its Application
    IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-ISSN: 2278-2834,p- ISSN: 2278-8735.Volume 10, Issue 6, Ver. II (Nov - Dec .2015), PP 09-14 www.iosrjournals.org Over view of Microprocessor 8085 and its application Kimasha Borah Assistant Professor, Centre for Computer Studies Centre for Computer Studies, Dibrugarh University, Dibrugarh, Assam, India Abstract: Microprocessor is a program controlled semiconductor device (IC), which fetches, decode and executes instructions. It is versatile in application and is flexible to some extent. Nowadays, modern microprocessors can perform extremely sophisticated operations in areas such as meteorology, aviation, nuclear physics and engineering, and take up much less space as well as delivering superior performance Here is a brief review of microprocessor and its various application Key words: Semi Conductor, Integrated Circuits, CPU, NMOS ,PMOS, VLSI I. Introduction: Microprocessor is derived from two words micro and processor. Micro means small, tiny and processor means which processes something. It is a single Very Large Scale of Integration (VLSI) chip that incorporates all functions of central processing unit (CPU) fabricated on a single Integrated Circuits (ICs) (1).Some other units like caches, pipelining, floating point processing arithmetic and superscaling units are additionally present in the microprocessor and that results in increasing speed of operation.8085,8086,8088 are some examples of microprocessors(2). The technology used for microprocessor is N type metal oxide semiconductor(NMOS)(3). Basic operations of microprocessor are fetching instructions from memory ,decoding and executing them ie it takes data or operand from input device, perform arithmetic and logical operations and store results in required location or send result to output devices(1).Word size identifies the microprocessor.E.g.
    [Show full text]
  • 45-Year CPU Evolution: One Law and Two Equations
    45-year CPU evolution: one law and two equations Daniel Etiemble LRI-CNRS University Paris Sud Orsay, France [email protected] Abstract— Moore’s law and two equations allow to explain the a) IC is the instruction count. main trends of CPU evolution since MOS technologies have been b) CPI is the clock cycles per instruction and IPC = 1/CPI is the used to implement microprocessors. Instruction count per clock cycle. c) Tc is the clock cycle time and F=1/Tc is the clock frequency. Keywords—Moore’s law, execution time, CM0S power dissipation. The Power dissipation of CMOS circuits is the second I. INTRODUCTION equation (2). CMOS power dissipation is decomposed into static and dynamic powers. For dynamic power, Vdd is the power A new era started when MOS technologies were used to supply, F is the clock frequency, ΣCi is the sum of gate and build microprocessors. After pMOS (Intel 4004 in 1971) and interconnection capacitances and α is the average percentage of nMOS (Intel 8080 in 1974), CMOS became quickly the leading switching capacitances: α is the activity factor of the overall technology, used by Intel since 1985 with 80386 CPU. circuit MOS technologies obey an empirical law, stated in 1965 and 2 Pd = Pdstatic + α x ΣCi x Vdd x F (2) known as Moore’s law: the number of transistors integrated on a chip doubles every N months. Fig. 1 presents the evolution for II. CONSEQUENCES OF MOORE LAW DRAM memories, processors (MPU) and three types of read- only memories [1]. The growth rate decreases with years, from A.
    [Show full text]
  • Appendix D an Alternative to RISC: the Intel 80X86
    D.1 Introduction D-2 D.2 80x86 Registers and Data Addressing Modes D-3 D.3 80x86 Integer Operations D-6 D.4 80x86 Floating-Point Operations D-10 D.5 80x86 Instruction Encoding D-12 D.6 Putting It All Together: Measurements of Instruction Set Usage D-14 D.7 Concluding Remarks D-20 D.8 Historical Perspective and References D-21 D An Alternative to RISC: The Intel 80x86 The x86 isn’t all that complex—it just doesn’t make a lot of sense. Mike Johnson Leader of 80x86 Design at AMD, Microprocessor Report (1994) © 2003 Elsevier Science (USA). All rights reserved. D-2 I Appendix D An Alternative to RISC: The Intel 80x86 D.1 Introduction MIPS was the vision of a single architect. The pieces of this architecture fit nicely together and the whole architecture can be described succinctly. Such is not the case of the 80x86: It is the product of several independent groups who evolved the architecture over 20 years, adding new features to the original instruction set as you might add clothing to a packed bag. Here are important 80x86 milestones: I 1978—The Intel 8086 architecture was announced as an assembly language– compatible extension of the then-successful Intel 8080, an 8-bit microproces- sor. The 8086 is a 16-bit architecture, with all internal registers 16 bits wide. Whereas the 8080 was a straightforward accumulator machine, the 8086 extended the architecture with additional registers. Because nearly every reg- ister has a dedicated use, the 8086 falls somewhere between an accumulator machine and a general-purpose register machine, and can fairly be called an extended accumulator machine.
    [Show full text]
  • The Birth, Evolution and Future of Microprocessor
    The Birth, Evolution and Future of Microprocessor Swetha Kogatam Computer Science Department San Jose State University San Jose, CA 95192 408-924-1000 [email protected] ABSTRACT timed sequence through the bus system to output devices such as The world's first microprocessor, the 4004, was co-developed by CRT Screens, networks, or printers. In some cases, the terms Busicom, a Japanese manufacturer of calculators, and Intel, a U.S. 'CPU' and 'microprocessor' are used interchangeably to denote the manufacturer of semiconductors. The basic architecture of 4004 same device. was developed in August 1969; a concrete plan for the 4004 The different ways in which microprocessors are categorized are: system was finalized in December 1969; and the first microprocessor was successfully developed in March 1971. a) CISC (Complex Instruction Set Computers) Microprocessors, which became the "technology to open up a new b) RISC (Reduced Instruction Set Computers) era," brought two outstanding impacts, "power of intelligence" and "power of computing". First, microprocessors opened up a new a) VLIW(Very Long Instruction Word Computers) "era of programming" through replacing with software, the b) Super scalar processors hardwired logic based on IC's of the former "era of logic". At the same time, microprocessors allowed young engineers access to "power of computing" for the creative development of personal 2. BIRTH OF THE MICROPROCESSOR computers and computer games, which in turn led to growth in the In 1970, Intel introduced the first dynamic RAM, which increased software industry, and paved the way to the development of high- IC memory by a factor of four.
    [Show full text]
  • Class-Action Lawsuit
    Case 3:20-cv-00863-SI Document 1 Filed 05/29/20 Page 1 of 279 Steve D. Larson, OSB No. 863540 Email: [email protected] Jennifer S. Wagner, OSB No. 024470 Email: [email protected] STOLL STOLL BERNE LOKTING & SHLACHTER P.C. 209 SW Oak Street, Suite 500 Portland, Oregon 97204 Telephone: (503) 227-1600 Attorneys for Plaintiffs [Additional Counsel Listed on Signature Page.] UNITED STATES DISTRICT COURT DISTRICT OF OREGON PORTLAND DIVISION BLUE PEAK HOSTING, LLC, PAMELA Case No. GREEN, TITI RICAFORT, MARGARITE SIMPSON, and MICHAEL NELSON, on behalf of CLASS ACTION ALLEGATION themselves and all others similarly situated, COMPLAINT Plaintiffs, DEMAND FOR JURY TRIAL v. INTEL CORPORATION, a Delaware corporation, Defendant. CLASS ACTION ALLEGATION COMPLAINT Case 3:20-cv-00863-SI Document 1 Filed 05/29/20 Page 2 of 279 Plaintiffs Blue Peak Hosting, LLC, Pamela Green, Titi Ricafort, Margarite Sampson, and Michael Nelson, individually and on behalf of the members of the Class defined below, allege the following against Defendant Intel Corporation (“Intel” or “the Company”), based upon personal knowledge with respect to themselves and on information and belief derived from, among other things, the investigation of counsel and review of public documents as to all other matters. INTRODUCTION 1. Despite Intel’s intentional concealment of specific design choices that it long knew rendered its central processing units (“CPUs” or “processors”) unsecure, it was only in January 2018 that it was first revealed to the public that Intel’s CPUs have significant security vulnerabilities that gave unauthorized program instructions access to protected data. 2. A CPU is the “brain” in every computer and mobile device and processes all of the essential applications, including the handling of confidential information such as passwords and encryption keys.
    [Show full text]
  • Performance of a Computer (Chapter 4) Vishwani D
    ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2013 Performance of a Computer (Chapter 4) Vishwani D. Agrawal & Victor P. Nelson epartment of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 1 What is Performance? Response time: the time between the start and completion of a task. Throughput: the total amount of work done in a given time. Some performance measures: MIPS (million instructions per second). MFLOPS (million floating point operations per second), also GFLOPS, TFLOPS (1012), etc. SPEC (System Performance Evaluation Corporation) benchmarks. LINPACK benchmarks, floating point computing, used for supercomputers. Synthetic benchmarks. ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 2 Small and Large Numbers Small Large 10-3 milli m 103 kilo k 10-6 micro μ 106 mega M 10-9 nano n 109 giga G 10-12 pico p 1012 tera T 10-15 femto f 1015 peta P 10-18 atto 1018 exa 10-21 zepto 1021 zetta 10-24 yocto 1024 yotta ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 3 Computer Memory Size Number bits bytes 210 1,024 K Kb KB 220 1,048,576 M Mb MB 230 1,073,741,824 G Gb GB 240 1,099,511,627,776 T Tb TB ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 4 Units for Measuring Performance Time in seconds (s), microseconds (μs), nanoseconds (ns), or picoseconds (ps). Clock cycle Period of the hardware clock Example: one clock cycle means 1 nanosecond for a 1GHz clock frequency (or 1GHz clock rate) CPU time = (CPU clock cycles)/(clock rate) Cycles per instruction (CPI): average number of clock cycles used to execute a computer instruction.
    [Show full text]