DOCSLIB.ORG

An95091 Application Note Understanding Effective Bits

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
An95091 Application Note Understanding Effective Bits AN95091 APPLICATION NOTE UNDERSTANDING EFFECTIVE BITS Tony Girard, Signatec, Design and Applications Engineer INTRODUCTION One criteria often used to evaluate an Analog to Digital Converter (ADC) or data acquisition system is the effective number of bits achieved. The effective number of bits provides a means to evaluate the overall performance of a system. However, like any other parameter, an understanding of the theory behind the effective bits, and different methods used to determine effective bits is necessary to properly compare components and systems. The intent of this application note is to provide the basic theory behind effective bits, describe different methods used to determine effective bits, and to explain the limitations in its usage. NUMBER OF BITS VERSES EFFECTIVE BITS The number of bits in a data acquisition system is normally specified as the number of bits of the digitizer. Any data acquisition system, or ADC, has inherent performance limitations. When evaluating an acquisition system the effective number of bits provided by the system can useful in determining if the system is right for the application. There are many sources of error in an acquisition system. Considering a system in terms of effective bits, all error sources are included. Evaluation of system performance is made without the need to consider the individual error sources, all of which may not be characterized by the manufacturer. THE PERFECT SYSTEM A perfect data acquisition system is one in which the captured analog signal is free from noise and distortion. The system is free from any frequency dependent performance characteristics, up to the maximum sampling rate and the bandwidth limit of the system. In this system the only limitation to system performance would be the quantization error inherent in all sampling systems. Quantization error occurs because an analog signal is sampled and its level represented by a finite number. The output of an ADC has 2n levels, where n is the number of converter bits. For example, an 8 bit ADC has 28, or 256 levels. The bit which represents the smallest voltage change is called the least significant bit (lsb). Each sample has a quantization error of up to ±0.5 of the lsb due to the difference between the true analog voltage level and the level represented by the ADC output. 1 The quantization error defines a base line noise level which limits the systems ability to resolve small signals in a perfect system. This is commonly referred to as Signal to Noise ratio (S/N) which is the ratio of the Root Mean Square (RMS) of the largest signal divided by the RMS value of the noise. The maximum signal level is 2n bits and the noise is 1 bit. The higher the resolution of a system, the larger the maximum signal level with respect to the 1 bit quantization noise. The result is that higher resolution systems have a lower base line noise level resulting in a greater dynamic range. S The SNR of an ideal system is found using the maximum RMS signal level N ideal (VRMS ) and the quantization error ( QE RMS ). The “mean square” of the quantization error is found by integrating over the quantization voltage error range as follows: + Vq /2 2 V 2 ==E q QE MS ∫ dE − V 12 Vq /2 q The RMS value of the quantization error is found by taking the square root of the mean square error: VV2 QE ==qq RMS 12 12 where Vq is the quanitization voltage and is equal to 1 bit. The ideal signal to noise ratio can then be found as follows: 2 n 1 V = QE = RMS 22 RMS 12 2 n S V 212nn23 ====≅∗RMS 22 n 2 1225. N ideal QE RMS 1 22 2 12 S In terms of decibels: ≅∗20log ( 2n 1255 . )dB 10 N ideal S ≅+ or (.602ndB 176 . ) N ideal where n is the number of bits. 2 THE REAL SYSTEM No system is ideal. Every converter has non-linearity, noise from reference voltages, and aperture jitter. Every system adds noise to the analog signal being sampled, creates signal distortion (harmonics), and has some amount of clock jitter. All these elements, and more, contribute to system performance degradation with respect to the ideal system. In effect, all error sources combine to limit the effective resolution of a system. Because different error sources are dependent upon various operating conditions, the effective number of bits is also dependent upon the operating conditions. The amplitude of the test signal can change the level of distortion. Signal amplitudes near full scale should normally be used. Typically the frequency of the sampling clock has little affect on the effective number of bits. The generally accepted method is to use the systems maximum sampling frequency for effective bits characterization. The frequency and amplitude of the input analog signal have the largest affect on the effective number of bits. This is generally due both to distortion of the signal by the analog front end and the system noise increase due to clock jitter as the signal frequency is increased. In state-of-the-art systems in terms of sampling rate and analog bandwidth, the effective number of bits generally decreases significantly as the signal frequency increases. SYSTEM PERFORMANCE MEASUREMENTS The effective number of bits is determined by sampling a spectrally pure sinusoidal wave and determining the RMS signal and “noise” levels recorded by the system. In this case “noise” refers to anything which is not signal, this includes quantization noise, noise from the input signal, and any distortion of the signal. Often data acquisition system manufacturers specify a performance parameter called SINAD. SINAD is the ratio of the fundamental SINusoidal signal power acquired to the total Noise And Distortion. Because this parameter contains noise and distortion, it can be used directly to calculate effective bits. When Signal to Noise Ratio (SNR) is specified, it is often the ratio of the fundamental sinusoidal signal power to the noise, not including the harmonics. Figure 1 shows the relationship of SINAD to SNR in a typical application. Using SNR to calculate the effective bits of a system is acceptable in some applications. For example a communications system where the bandwidth of interest is small and it is known that no harmonics, including those above the Nyquist limit which will be aliased, will fall within that band. 3 SINAD VS SNR 44 42 40 38 36 dB 34 32 30 28 1 10 100 1000 Signal Frequency (MHz) SINAD SNR FIGURE 1 DATA ANALYSIS There are two data analysis methods used to determine SINAD, and therefore effective bits. One method uses time domain data analysis and the other uses frequency domain data analysis. Time domain analysis uses a complex algorithm to fit a perfect sine curve to the acquired time domain data points. The algorithm must match the sine-wave frequency, phase, amplitude, and offset to the data. The perfect wave is then subtracted from the data and the remaining data is noise and distortion. This is the method commonly used by some ADC manufacturers. Frequency domain analysis uses an FFT to convert time domain data to the frequency domain. The appropriate FFT frequency bins are then selected to determine SINAD. Signatec, and some ADC manufacturers, use the frequency domain analysis method. Signatec uses a 4096 point FFT with a Blackman-Harris window to convert the data to the frequency domain. The energy from a signal spreads over a number of bins in the FFT. This makes selection of bins for signal calculations important when using the frequency domain method. An improper bin selection will affect the SINAD/effective bits calculation. Using a number of frequency bins which is greater than the number which actually contain signal energy will result in summing noise energy into the signal, resulting in an erroneously high signal level. Using too few frequency bins to represent the fundamental will result in a fundamental power which is too low and a “noise” level which is too high. The first 4 bins of the FFT represent the dc term caused by offset shift and the FFT windowing function, and are excluded from analysis. The 9 bins centered 4 around the peak frequency are summed to determine the fundamental signal power and the remaining bins are considered “noise” for the SINAD calculation. Figures 2, 4, and 6 show the frequency domain plots of data acquired with Signatec’s DA500A, 500MHz digitizing rate, 500MHz analog bandwidth data acquisition system. Figures 3, 5, and 7 are exploded views of showing the frequency bins at the fundamental frequency. The shaded bins are the ones used to calculate the level of the fundamental frequency. FFT RESULT (25MHz) FFT BINS (25MHz) -10 -20 -30 -40 -50 -60 Amplitude (dB) -70 -80 24.0 24.3 24.5 24.8 25.0 25.3 25.5 25.8 26.0 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 2 FIGURE 3 FFT RESULT (95MHz) FFT BINS (95MHz) -10 -20 -30 -40 -50 -60 Amplitude (dB) -70 -80 93.0 93.4 93.7 94.1 94.5 94.8 95.2 95.6 95.9 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 4 FIGURE 5 FFT RESULT (230MHz) FFT BINS (230MHz) -10 -20 -30 -40 -50 -60 Amplitude (dB) -70 -80 228.0 228.5 229.0 229.5 230.0 230.5 231.0 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 6 FIGURE 7 5 The selection of the frequency used for SINAD and effective bits test is important. The signal frequency must be selected such that the harmonic terms are sufficiently separated from the fundamental so as not to be considered part of the signal.
Load more

Recommended publications
  • All You Need to Know About SINAD Measurements Using the 2023
    applicationapplication notenote All you need to know about SINAD and its measurement using 2023 signal generators The 2023A, 2023B and 2025 can be supplied with an optional SINAD measuring capability. This article explains what SINAD measurements are, when they are used and how the SINAD option on 2023A, 2023B and 2025 performs this important task. www.ifrsys.com SINAD and its measurements using the 2023 What is SINAD? C-MESSAGE filter used in North America SINAD is a parameter which provides a quantitative Psophometric filter specified in ITU-T Recommendation measurement of the quality of an audio signal from a O.41, more commonly known from its original description as a communication device. For the purpose of this article the CCITT filter (also often referred to as a P53 filter) device is a radio receiver. The definition of SINAD is very simple A third type of filter is also sometimes used which is - its the ratio of the total signal power level (wanted Signal + unweighted (i.e. flat) over a broader bandwidth. Noise + Distortion or SND) to unwanted signal power (Noise + The telephony filter responses are tabulated in Figure 2. The Distortion or ND). It follows that the higher the figure the better differences in frequency response result in different SINAD the quality of the audio signal. The ratio is expressed as a values for the same signal. The C-MES signal uses a reference logarithmic value (in dB) from the formulae 10Log (SND/ND). frequency of 1 kHz while the CCITT filter uses a reference of Remember that this a power ratio, not a voltage ratio, so a 800 Hz, which results in the filter having "gain" at 1 kHz.
    [Show full text]
  • Smart Innovation, Systems and Technologies
    Smart Innovation, Systems and Technologies Volume 235 Series Editors Robert J. Howlett, Bournemouth University and KES International, Shoreham-by-Sea, UK Lakhmi C. Jain, KES International, Shoreham-by-Sea, UK The Smart Innovation, Systems and Technologies book series encompasses the topics of knowledge, intelligence, innovation and sustainability. The aim of the series is to make available a platform for the publication of books on all aspects of single and multi-disciplinary research on these themes in order to make the latest results available in a readily-accessible form. Volumes on interdisciplinary research combining two or more of these areas is particularly sought. The series covers systems and paradigms that employ knowledge and intelligence in a broad sense. Its scope is systems having embedded knowledge and intelligence, which may be applied to the solution of world problems in industry, the environment and the community. It also focusses on the knowledge-transfer methodologies and innovation strategies employed to make this happen effectively. The combination of intelligent systems tools and a broad range of applications introduces a need for a synergy of disciplines from science, technology, business and the humanities. The series will include conference proceedings, edited collections, monographs, hand- books, reference books, and other relevant types of book in areas of science and technology where smart systems and technologies can offer innovative solutions. High quality content is an essential feature for all book proposals accepted for the series. It is expected that editors of all accepted volumes will ensure that contributions are subjected to an appropriate level of reviewing process and adhere to KES quality principles.
    [Show full text]
  • Receiver Sensitivity and Equivalent Noise Bandwidth Receiver Sensitivity and Equivalent Noise Bandwidth
    11/08/2016 Receiver Sensitivity and Equivalent Noise Bandwidth Receiver Sensitivity and Equivalent Noise Bandwidth Parent Category: 2014 HFE By Dennis Layne Introduction Receivers often contain narrow bandpass hardware filters as well as narrow lowpass filters implemented in digital signal processing (DSP). The equivalent noise bandwidth (ENBW) is a way to understand the noise floor that is present in these filters. To predict the sensitivity of a receiver design it is critical to understand noise including ENBW. This paper will cover each of the building block characteristics used to calculate receiver sensitivity and then put them together to make the calculation. Receiver Sensitivity Receiver sensitivity is a measure of the ability of a receiver to demodulate and get information from a weak signal. We quantify sensitivity as the lowest signal power level from which we can get useful information. In an Analog FM system the standard figure of merit for usable information is SINAD, a ratio of demodulated audio signal to noise. In digital systems receive signal quality is measured by calculating the ratio of bits received that are wrong to the total number of bits received. This is called Bit Error Rate (BER). Most Land Mobile radio systems use one of these figures of merit to quantify sensitivity. To measure sensitivity, we apply a desired signal and reduce the signal power until the quality threshold is met. SINAD SINAD is a term used for the Signal to Noise and Distortion ratio and is a type of audio signal to noise ratio. In an analog FM system, demodulated audio signal to noise ratio is an indication of RF signal quality.
    [Show full text]
  • MT-004: the Good, the Bad, and the Ugly Aspects of ADC Input Noise-Is
    MT-004 TUTORIAL The Good, the Bad, and the Ugly Aspects of ADC Input Noise—Is No Noise Good Noise? by Walt Kester INTRODUCTION All analog-to-digital converters (ADCs) have a certain amount of "input-referred noise"— modeled as a noise source connected in series with the input of a noise-free ADC. Input-referred noise is not to be confused with quantization noise which only occurs when an ADC is processing an ac signal. In most cases, less input noise is better, however there are some instances where input noise can actually be helpful in achieving higher resolution. This probably doesn't make sense right now, so you will just have to read further into this tutorial to find out how SOME noise can be GOOD noise. INPUT-REFERRED NOISE (CODE TRANSITION NOISE) Practical ADCs deviate from ideal ADCs in many ways. Input-referred noise is certainly a departure from the ideal, and its effect on the overall ADC transfer function is shown in Figure 1. As the analog input voltage is increased, the "ideal" ADC (shown in Figure 1A) maintains a constant output code until the transition region is reached, at which point the output code instantly jumps to the next value and remains there until the next transition region is reached. A theoretically perfect ADC has zero "code transition" noise, and a transition region width equal to zero. A practical ADC has certain amount of code transition noise, and therefore a transition region width that depends on the amount of input-referred noise present (shown in Figure 1B).
    [Show full text]
  • Clock Jitter Effects on the Performance of ADC Devices
    Clock Jitter Effects on the Performance of ADC Devices Roberto J. Vega Luis Geraldo P. Meloni Universidade Estadual de Campinas - UNICAMP Universidade Estadual de Campinas - UNICAMP P.O. Box 05 - 13083-852 P.O. Box 05 - 13083-852 Campinas - SP - Brazil Campinas - SP - Brazil [email protected] [email protected] Karlo G. Lenzi Centro de Pesquisa e Desenvolvimento em Telecomunicac¸oes˜ - CPqD P.O. Box 05 - 13083-852 Campinas - SP - Brazil [email protected] Abstract— This paper aims to demonstrate the effect of jitter power near the full scale of the ADC, the noise power is on the performance of Analog-to-digital converters and how computed by all FFT bins except the DC bin value (it is it degrades the quality of the signal being sampled. If not common to exclude up to 8 bins after the DC zero-bin to carefully controlled, jitter effects on data acquisition may severely impacted the outcome of the sampling process. This analysis avoid any spectral leakage of the DC component). is of great importance for applications that demands a very This measure includes the effect of all types of noise, the good signal to noise ratio, such as high-performance wireless distortion and harmonics introduced by the converter. The rms standards, such as DTV, WiMAX and LTE. error is given by (1), as defined by IEEE standard [5], where Index Terms— ADC Performance, Jitter, Phase Noise, SNR. J is an exact integer multiple of fs=N: I. INTRODUCTION 1 s X = jX(k)j2 (1) With the advance of the technology and the migration of the rms N signal processing from analog to digital, the use of analog-to- k6=0;J;N−J digital converters (ADC) became essential.
    [Show full text]
  • Effective Bits
    Application Note Effective Bits Effective Bits Testing Evaluates Dynamic Performance of Digitizing Instruments The Effective Bits Concept desired time resolution, run the digitizer at the requisite Whether you are designing or buying a digitizing sys- sampling rate. Those are simple enough answers. tem, you need some means of determining actual, Unfortunately, they can be quite misleading, too. real-life digitizing performance. How closely does the While an “8-bit digitizer” might provide close to eight output of any given analog-to-digital converter (ADC), bits of accuracy and resolution on DC or slowly waveform digitizer or digital storage oscilloscope changing signals, that will not be the case for higher actually follow any given analog input signal? speed signals. Depending on the digitizing technology At the most basic level, digitizing performance would used and other system factors, dynamic digitizing seem to be a simple matter of resolution. For the performance can drop markedly as signal speeds desired amplitude resolution, pick a digitizer with the increase. An 8-bit digitizer can drop to 6-bit, 4-bit, requisite number of “bits” (quantizing levels). For the or even fewer effective bits of performance well before reaching its specified bandwidth. Effective Bits Application Note Figure 1. When comparing digitizer performance, testing the full frequency range is important. If you are designing an ADC device, a digitizing instru- components. Thus, it may be necessary to do an ment, or a test system, it is important to understand the effective bits evaluation for purposes of comparison. If various factors affecting digitizing performance and to equipment is to be combined into a system, an effective have some means of overall performance evaluation.
    [Show full text]
  • Analog-To-Digital Conversion Revolutionized by Deep Learning Shaofu Xu1, Xiuting Zou1, Bowen Ma1, Jianping Chen1, Lei Yu1, Weiwen Zou1, *
    Analog-to-digital Conversion Revolutionized by Deep Learning Shaofu Xu1, Xiuting Zou1, Bowen Ma1, Jianping Chen1, Lei Yu1, Weiwen Zou1, * 1State Key Laboratory of Advanced Optical Communication Systems and Networks, Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai 200240, China. *Correspondence to: [email protected]. Abstract: As the bridge between the analog world and digital computers, analog-to-digital converters are generally used in modern information systems such as radar, surveillance, and communications. For the configuration of analog- to-digital converters in future high-frequency broadband systems, we introduce a revolutionary architecture that adopts deep learning technology to overcome tradeoffs between bandwidth, sampling rate, and accuracy. A photonic front-end provides broadband capability for direct sampling and speed multiplication. Trained deep neural networks learn the patterns of system defects, maintaining high accuracy of quantized data in a succinct and adaptive manner. Based on numerical and experimental demonstrations, we show that the proposed architecture outperforms state-of- the-art analog-to-digital converters, confirming the potential of our approach in future analog-to-digital converter design and performance enhancement of future information systems. bandwidth, sampling rate, and accuracy (dynamic range) From the advent of digital processing and the von remains a challenge for all existing ADC architectures. Neumann computing scheme, the continuous world has become discrete by use of analog-to-digital converters Deep learning techniques involve a family of data (ADCs). Discrete digital signals are easier to process, processing algorithms that use deep neural networks to store, and display; thus, they are integral to modern manipulate data (10).
    [Show full text]
  • Measurement of Delta-Sigma Converter
    FACULTY OF ENGINEERING AND SUSTAINABLE DEVELOPMENT . Measurement of Delta-Sigma Converter Liu Xiyang 06/2011 Bachelor’s Thesis in Electronics Bachelor’s Program in Electronics Examiner: Niclas Bjorsell Supervisor: Charles Nader 1 2 Liu Xiyang Measurement of Delta-Sigma Converter Acknowledgement Here, I would like to thank my supervisor Charles. Nader, who gave me lots of help and support. With his guidance, I could finish this thesis work. 1 Liu Xiyang Measurement of Delta-Sigma Converter Abstract With today’s technology, digital signal processing plays a major role. It is used widely in many applications. Many applications require high resolution in measured data to achieve a perfect digital processing technology. The key to achieve high resolution in digital processing systems is analog-to-digital converters. In the market, there are many types ADC for different systems. Delta-sigma converters has high resolution and expected speed because it’s special structure. The signal-to-noise-and-distortion (SINAD) and total harmonic distortion (THD) are two important parameters for delta-sigma converters. The paper will describe the theory of parameters and test method. Key words: Digital signal processing, ADC, delta-sigma converters, SINAD, THD. 2 Liu Xiyang Measurement of Delta-Sigma Converter Contents Acknowledgement................................................................................................................................... 1 Abstract ..................................................................................................................................................
    [Show full text]
  • Noise-Shaping Sar Adcs
    NOISE-SHAPING SAR ADCS by Jeffrey Alan Fredenburg A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy (Electrical Engineering) in the University of Michigan 2015 Committee: Professor Michael P. Flynn, Chair Professor Zhong He Professor Dave D. Wentzloff Professor Zhengya Zhang “Nobody tells this to people who are beginners; I wish someone told me. All of us who do creative work, we get into it because we have good taste. But there is this gap. For the first couple years you make stuff; it’s just not that good. It’s trying to be good, it has potential, but it’s not. But your taste, the thing that got you into the game, is still killer. And your taste is why your work disappoints you. A lot of people never get past this phase. They quit. Most people I know who do interesting, creative work went through years of this. We know our work doesn’t have this special thing that we want it to have. We all go through this. And if you are just starting out or you are still in this phase, you gotta know it's normal and the most important thing you can do is do a lot of work. Put yourself on a deadline so that every week you will finish one story. It is only by going through a volume of work that you will close that gap and your work will be as good as your ambitions. And I took longer to figure out how to do this than anyone I’ve ever met.
    [Show full text]
  • MT-200: Minimizing Jitter in ADC Clock Interfaces
    Applications Engineering Notebook MT-200 One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Minimizing Jitter in ADC Clock Interfaces by the Applications Engineering Group POWER SUPPLY Analog Devices, Inc. INPUT V REF DATA ANALOG OUTPUT IN THIS NOTEBOOK INPUT ADC Since jitter around the threshold region of a clock interface CLOCK FPGA INTERFACE can corrupt the dynamic performance of an analog-to- INPUT CONTROL digital converter (ADC), this notebook provides an overview of clocking considerations and jitter-reduction techniques. The Applications Engineering Notebook Educational Series TABLE OF CONTENTS Clock Input Noise.............................................................................. 2 Frequency Domain View ............................................................. 3 Time Domain View ....................................................................... 2 Phase Domain View ..................................................................... 4 Effect of Slew Rate..................................................................... 3 Solutions for Clocking Converters ............................................. 5 REVISION HISTORY 1/12—Revision 0: Initial Version Rev. 0 | Page 1 of 8 MT-200 Applications Engineering Notebook CLOCK INPUT NOISE Jitter around the threshold region of the clock interface can TIME DOMAIN VIEW corrupt the timing of an analog-to-digital converter (ADC). For example, jitter can cause the ADC to capture a sample at the wrong time, resulting in false sampling of the analog input and reducing the signal to noise (SNR) ratio of the device. A reduction in jitter can be achieved in a number of different ways, including improving the clock source, filtering, frequency division, and clock circuit hardware. This document provides dV suggestions on how to improve the clock system to achieve the best possible performance from an ADC. Noise in the circuit between the clock and ADC is the root ERROR VOLTAGE cause of clock jitter.
    [Show full text]
  • Impact of PLL Jitter to GSPS ADC's SNR and Performance Optimization
    www.ti.com Table of Contents Application Report Impact of PLL Jitter to GSPS ADC's SNR and Performance Optimization Neeraj Gill, Salvo Finocchiaro ABSTRACT Jitter noise contributed by the clock source (frequency synthesizer or phase-locked loop (PLL)) has a big impact on the performance of new generation high-performance Gsps analog-to-digital converters (ADC). Both in-band and out of-band noise performance of the PLL impact the ADC signal-to-noise ratio (SNR), and consequently the effective resolution of the ADC (ENOB). The noise contributed by the PLL can be reduced by operating the PLL Phase Frequency Detector (PFD) at higher frequencies, reducing the input -output multiplication factor N, and using a bandpass filter to reduce far-out noise (or noise floor). This application note describes how to estimate the jitter requirements, translate that into a PLL phase noise requirement, and determine (recommending) the filter bandwidth needed to minimize the SNR performance degradation due to the clocking source. While this analysis is generic and applies to any PLL and ADC, a specific example will be provided by using TI LMX2594 high performance PLL and ADC12DJ5200 12-bit, 5-GSPS ADC. Table of Contents 1 PLL Phase Noise and RMS Jitter...........................................................................................................................................2 2 ADC SNR and Jitter Impact....................................................................................................................................................4
    [Show full text]
  • 9 Amplitude Modulation with Additive Gaussian White Noise 9.1 Summary This Laboratory Exercise Has Two Objectives
    Introduction to Communication Systems November 1, 2014 Using NI USRP Lab Manual 9 Amplitude Modulation with Additive Gaussian White Noise 9.1 Summary This laboratory exercise has two objectives. The first is to gain experience in implementing a white noise source in LabView. The second is to investigate classical analog amplitude modulation [1] and the effects of noise on the modulated signal envelope. 9.2 Background 9.2.1 Additive Gaussian White Noise Additive white Gaussian noise (AWGN) is used to simulate the effect of many random processes too complicated to model explicitly. These random processes are the result of many natural sources, such as: Thermal noise is the result of vibrations of atoms in conductors resulting thermal energy; Shot noise is the result of random fluctuations in the movement of current in discrete electric charge quanta or electrons. Electromagnetic radiation emitted by the sun, earth and other large masses in thermal equilibrium. In the case of this lab, the distance between the transmitter and receiver, and background radiation from other nearby transmitters. AWGN is also used to simulate other types of noise such as background noise and interference between other transceivers in the network. The model is assumed to be linear so that the noise can be super imposed or added to the message or modulated signal. A white noise process is assumed to uniformly affect all frequencies in the signal’s spectrum. When the noise only affects a part of the spectrum it is referred to as colored noise. The noise in the time-domain results in a sequence of random terms that are added to the signal’s amplitude.
    [Show full text]