AN95091 APPLICATION NOTE

UNDERSTANDING EFFECTIVE BITS

Tony Girard, Signatec, Design and Applications Engineer

INTRODUCTION

One criteria often used to evaluate an Analog to Digital Converter (ADC) or data acquisition system is the achieved. The effective number of bits provides a means to evaluate the overall performance of a system. However, like any other parameter, an understanding of the theory behind the effective bits, and different methods used to determine effective bits is necessary to properly compare components and systems. The intent of this application note is to provide the basic theory behind effective bits, describe different methods used to determine effective bits, and to explain the limitations in its usage.

NUMBER OF BITS VERSES EFFECTIVE BITS

The number of bits in a data acquisition system is normally specified as the number of bits of the digitizer. Any data acquisition system, or ADC, has inherent performance limitations. When evaluating an acquisition system the effective number of bits provided by the system can useful in determining if the system is right for the application.

There are many sources of error in an acquisition system. Considering a system in terms of effective bits, all error sources are included. Evaluation of system performance is made without the need to consider the individual error sources, all of which may not be characterized by the manufacturer.

THE PERFECT SYSTEM

A perfect data acquisition system is one in which the captured analog is free from and . The system is free from any frequency dependent performance characteristics, up to the maximum sampling rate and the bandwidth limit of the system. In this system the only limitation to system performance would be the quantization error inherent in all sampling systems.

Quantization error occurs because an analog signal is sampled and its level represented by a finite number. The output of an ADC has 2n levels, where n is the number of converter bits. For example, an 8 bit ADC has 28, or 256 levels. The bit which represents the smallest voltage change is called the least significant bit (lsb). Each sample has a quantization error of up to ±0.5 of the lsb due to the difference between the true analog voltage level and the level represented by the ADC output.

1 The quantization error defines a base line noise level which limits the systems ability to resolve small in a perfect system. This is commonly referred to as Signal to Noise ratio (S/N) which is the ratio of the Root Mean Square (RMS) of the largest signal divided by the RMS value of the noise. The maximum signal level is 2n bits and the noise is 1 bit. The higher the resolution of a system, the larger the maximum signal level with respect to the 1 bit quantization noise. The result is that higher resolution systems have a lower base line noise level resulting in a greater .

 S    The SNR of an ideal system   is found using the maximum RMS signal level N ideal

(VRMS ) and the quantization error ( QE RMS ). The “mean square” of the quantization error is found by integrating over the quantization voltage error range as follows:

+ Vq /2 2 V 2 ==E q QE MS ∫ dE − V 12 Vq /2 q

The RMS value of the quantization error is found by taking the square root of the mean square error:

VV2 QE ==qq RMS 12 12

where Vq is the quanitization voltage and is equal to 1 bit.

The ideal signal to noise ratio can then be found as follows:

2 n 1 V = QE = RMS 22 RMS 12 2 n  S  V 212nn23   ====≅∗RMS 22 n   2 1225. N ideal QE RMS 1 22 2 12

 S  In terms of :   ≅∗20log ( 2n 1255 . )dB   10 N ideal

 S    ≅+ or   (.602ndB 176 . ) N ideal where n is the number of bits.

2 THE REAL SYSTEM

No system is ideal. Every converter has non-linearity, noise from reference voltages, and aperture . Every system adds noise to the analog signal being sampled, creates signal distortion (harmonics), and has some amount of clock jitter. All these elements, and more, contribute to system performance degradation with respect to the ideal system. In effect, all error sources combine to limit the effective resolution of a system. Because different error sources are dependent upon various operating conditions, the effective number of bits is also dependent upon the operating conditions.

The amplitude of the test signal can change the level of distortion. Signal amplitudes near full scale should normally be used. Typically the frequency of the sampling clock has little affect on the effective number of bits. The generally accepted method is to use the systems maximum sampling frequency for effective bits characterization. The frequency and amplitude of the input analog signal have the largest affect on the effective number of bits. This is generally due both to distortion of the signal by the analog front end and the system noise increase due to clock jitter as the signal frequency is increased. In state-of-the-art systems in terms of sampling rate and analog bandwidth, the effective number of bits generally decreases significantly as the signal frequency increases.

SYSTEM PERFORMANCE MEASUREMENTS

The effective number of bits is determined by sampling a spectrally pure sinusoidal wave and determining the RMS signal and “noise” levels recorded by the system. In this case “noise” refers to anything which is not signal, this includes quantization noise, noise from the input signal, and any distortion of the signal. Often data acquisition system manufacturers specify a performance parameter called SINAD. SINAD is the ratio of the fundamental SINusoidal signal power acquired to the total Noise And Distortion. Because this parameter contains noise and distortion, it can be used directly to calculate effective bits. When Signal to Noise Ratio (SNR) is specified, it is often the ratio of the fundamental sinusoidal signal power to the noise, not including the harmonics. Figure 1 shows the relationship of SINAD to SNR in a typical application. Using SNR to calculate the effective bits of a system is acceptable in some applications. For example a communications system where the bandwidth of interest is small and it is known that no harmonics, including those above the Nyquist limit which will be aliased, will fall within that band.

3 SINAD VS SNR 44 42 40 38 36 dB 34 32 30 28 1 10 100 1000 Signal Frequency (MHz) SINAD SNR FIGURE 1

DATA ANALYSIS

There are two data analysis methods used to determine SINAD, and therefore effective bits. One method uses time domain data analysis and the other uses frequency domain data analysis.

Time domain analysis uses a complex algorithm to fit a perfect sine curve to the acquired time domain data points. The algorithm must match the sine-wave frequency, phase, amplitude, and offset to the data. The perfect wave is then subtracted from the data and the remaining data is noise and distortion. This is the method commonly used by some ADC manufacturers.

Frequency domain analysis uses an FFT to convert time domain data to the frequency domain. The appropriate FFT frequency bins are then selected to determine SINAD. Signatec, and some ADC manufacturers, use the frequency domain analysis method.

Signatec uses a 4096 point FFT with a Blackman-Harris window to convert the data to the frequency domain. The energy from a signal spreads over a number of bins in the FFT. This makes selection of bins for signal calculations important when using the frequency domain method. An improper bin selection will affect the SINAD/effective bits calculation. Using a number of frequency bins which is greater than the number which actually contain signal energy will result in summing noise energy into the signal, resulting in an erroneously high signal level. Using too few frequency bins to represent the fundamental will result in a fundamental power which is too low and a “noise” level which is too high. The first 4 bins of the FFT represent the dc term caused by offset shift and the FFT windowing function, and are excluded from analysis. The 9 bins centered

4 around the peak frequency are summed to determine the fundamental signal power and the remaining bins are considered “noise” for the SINAD calculation. Figures 2, 4, and 6 show the frequency domain plots of data acquired with Signatec’s DA500A, 500MHz digitizing rate, 500MHz analog bandwidth data acquisition system. Figures 3, 5, and 7 are exploded views of showing the frequency bins at the fundamental frequency. The shaded bins are the ones used to calculate the level of the fundamental frequency.

FFT RESULT (25MHz) FFT BINS (25MHz) -10 -20 -30 -40 -50 -60 Amplitude (dB) -70 -80 24.0 24.3 24.5 24.8 25.0 25.3 25.5 25.8 26.0 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 2 FIGURE 3

FFT RESULT (95MHz) FFT BINS (95MHz) -10 -20 -30 -40 -50 -60 Amplitude (dB) -70 -80 93.0 93.4 93.7 94.1 94.5 94.8 95.2 95.6 95.9 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 4 FIGURE 5

FFT RESULT (230MHz) FFT BINS (230MHz) -10 -20 -30 -40 -50 -60 Amplitude (dB) -70 -80 228.0 228.5 229.0 229.5 230.0 230.5 231.0 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 6 FIGURE 7

5 The selection of the frequency used for SINAD and effective bits test is important. The signal frequency must be selected such that the harmonic terms are sufficiently separated from the fundamental so as not to be considered part of the signal. The relationship of the signal frequency to the sampling frequency must be selected such that the harmonics, which may be above the Nyquist limit, do not alias onto the fundamental. This would cause the harmonic energy to sum with the signal energy resulting in an erroneously high signal level and a lower “noise” level. The resulting effective bits value is significantly better than the system actually provides. Figures 8 and 9 illustrate the importance of frequency selection. The fundamental frequency is 166.4MHz. This results in a 2nd harmonic of 332.8MHz which is above the Nyquist limit, so it will alias to 167.2MHz. If the fundamental frequency was slightly higher, the 2nd harmonic will fold directly on top of the fundamental.

FFT RESULT (166.4MHz) FFT BINS (166.4MHz) -10 70 Fundamental -20 60 2nd Harmonic -30 50 -40 40 -50 30 -60 20 Amplitude (dB) -70 10 -80 0 165.4 165.9 166.4 166.9 167.4 167.8 0 50 100 150 200 250 Frequency (MHz) Frequency (MHz) FIGURE 8 FIGURE 9

When values for SINAD are included in product specifications, a simple calculation  S    ≅+ yields the effective number of bits. The equation   (.602ndb 176 . ) was N ideal previously shown to represent the ideal Signal to Noise ratio, assuming a full scale input signal, and a noise value which includes distortion. This equation can be used for an  S    effective bits calculation by replacing the theoretical   with the measured SINAD N ideal and letting n equal the effective number of bits rather than the actual digitizer bits. Solving this equation for effective bits yields:

SINAD −176. EffectiveBits = 602. where SINAD is given in dB and the test signal for SINAD is near full scale.

6 Figure 10 shows the effective bits when using SINAD and SNR for the calculation. The decrease in effective bits as the signal frequency increases is typical of high speed, high bandwidth systems. The decrease in effective bits from the SNR calculation, labeled “A” in Figure 10, is due to digitizer clock and aperture jitter. The difference in the decrease between the SNR and the SINAD effective bits, labeled “B” in Figure 10 is due to signal distortion.

EFFECTIVE BITS 7

6.5 A 6

5.5 B 5 Number Eff. Bits Number 4.5 1 10 100 1000 Frequency (MHz) SINAD SNR FIGURE 10

Some manufactures add a correction factor to the SINAD term when calculating effective bits to correct for the difference in dynamic range between the amplitude of the test signal and the maximum full scale amplitude of the converter. In a high speed, large bandwidth system adding this correction factor is inappropriate. The nature of the correction in the calculation assumes that unused dynamic range would be pure signal with no noise or distortion. In real life high speed systems this will not occur and the calculation will yield an unfairly large effective number of bits. For these reasons Signatec does not include this correction factor in any calculations or graphs given in this document.

DROPPING BITS

A common misconception regarding effective bits and system performance is that any resolution beyond the effective bits is useless. For example, in an 8 bit system with 6 effective bits, the 2 least significant bits are useless and can be disregarded in data analysis. This is not true. As discussed above, the effective number of bits, or SINAD, represents the overall system performance. In other words, these parameters are the combination of all error sources. If the total error is broken into two parts, quantization error and all other errors, the total system “noise” is given by:

7 =+22 Error Eqs E

where Eq is the quantization error and Es is the RMS values of all other errors.

Using a digitizer with fewer bits, or dropping the bits from processing increases the quantization error. The equation above shows that as the quantization error increases, the overall error increases, increasing SINAD and decreasing the effective number of bits. If the “noise” due to system noise and error is not significantly greater than quantization error, then removing bits from the data will increase the overall “noise” level, which reduces data quality.

Figure 11 shows data which was acquired with Signatec’s DA500A data acquisition board. The graph shows four SINAD curves, one each for data acquired with 8, 7, 6, and 5 digitizer bits. The y-axis grid lines are positioned at the SINAD values corresponding to a “perfect” 8, 7, 6, 5, and 4 bit system. At low frequencies where the errors introduced by the system are small relative to the quantization error, each of the truncated data sets closely matches its respective effective bit value. However, at higher frequencies where the signal error increases, there is a decrease in the SINAD value.

SINAD WITH TRUNCATED BITS 48

42

36 dB

30

24 1 10 100 1000 Frequency (MHz) 8 Bits 7 Bits 6 Bits 5 Bits FIGURE 11

8 EVALUATING RESULTS

As previously stated, the effective number of bits achieved by a data acquisition system is a reflection of the systems overall performance. Evaluation of a system’s effective bits show that if an application requires a signal to be resolved to true eight bits of resolution, for example, then a digitizer with a resolution higher than eight bits is required.

When using effective bits to evaluate system performance, the method used to determine the number is important. The method must allow for the inclusion or exclusion of various parameters depending on the specifics of the application. For example SINAD, which includes distortion terms, should normally be used to derive effective bits, but in some applications using SNR may be appropriate.

It is also important to evaluate the effective bits at a frequency and amplitude appropriate for the application. The effective bits, and other performance parameters, should be specified at a particular frequency or set of frequencies. This is important due the normal decrease in performance as the signal frequency increases in high performance systems.

The effective number of bits for a high performance system cannot be assumed to be the same as the effective number of bits for the ADC used in the system. Therefore the effective number of bits, along with all other performance parameters must be specified for the entire system. Referencing ADC manufactures specifications in system data sheets provides information which is not useful to the system user.

When evaluating a system for a particular application it is often necessary to look beyond the effective bits parameter. While the effective number of bits gives an indication of overall system performance, it may not be the best parameter to use when considering a system for a particular application. Other parameters such as Spurious Free Dynamic Range (SFDR) or Total Harmonic Distortion (THD) are more appropriate for some applications. Often it is important to evaluate characteristics such as harmonic distortion or SNR as a function of signal frequency.

SUMMARY

The effective number of bits achieved by a data acquisition system can provide a user with an overall insight into the systems performance. However, as with any other performance parameters, the user should understand the methods used by the manufacturer to determine the effective number of bits. In critical applications it is generally necessary to look beyond the number effective bits to other performance specifications which identify specific system limitations.

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