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Precision Wafer to Wafer Packaging Using Eutectic Metal Bonding Eutectic Metal Bonding of Wafers Is Used in Advanced MEMS Packaging and 3D Integration Technologies

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Precision Wafer to Wafer Packaging Using Eutectic Metal Bonding Eutectic Metal Bonding of Wafers Is Used in Advanced MEMS Packaging and 3D Integration Technologies 2008 . July Issue Precision Wafer to Wafer Packaging Using Eutectic Metal Bonding Eutectic metal bonding of wafers is used in advanced MEMS packaging and 3D integration technologies. A unique feature of eutectic metals is the melting of the solder like alloys that facilitate surface planarization and provide a tolerance to surface topography and particles. Advanced wafer level bonding using 2-3um thick metal layers allows precision alignment preventing the aberrant viscous flow of the metal and wafer slippage. Also in this issue: • C4NP Next Generation Wafer Bumping Page 2 index 3 The Age of 3D Integration 12 Application Notes Wilfried Bair Tips to Get The Most Out Vice President Strategic Business Development, of Data Viewer SUSS MicroTec Sumant Sood, SUSS MicroTec 4 C4NP Next Generation Wafer 13 New Office in USA Bumping Anton Wolejnik, Managing Director, SUSS MicroTec Changing bumping requirements driven by 3D Packaging Klaus Ruhmer and Emmett Hughlett, 14 Clif´s Notes SUSS MicroTec You Can Define That Exposure Dose In One Wafer! 6 Precision Wafer to Wafer Clifford J. Hamel, Packaging Using Eutectic SUSS MicroTec Metal Bonding Shari Farrens, Ph.D. and Sumant Sood, SUSS MicroTec 18 SUSS in the News 20 Tradeshows/Conferences SUSS Scores First Place for 10th Year as Material Handling Supplier Page 3 Full View The Age of Integration 3D When commercial wafer bonders processes. A commonly used com- were first introduced to the industry parison of 3D integration with real in the early 90’s the main driver for estate illustrates that when silicon this new equipment type was the space is at a premium or cannot be then emerging MEMS technology. made larger the only logical conclu- Pressure sensors and accelerome- sion is to expand constructions into ters for automotive applications set the third dimension. off on its booming track providing the first volume market opportunity Thus 3D integration technologies for wafer bonding in large quantities. allow for an alternate path to Moore’s Since the early 60’s and until then the law. This is now commonly referred mechanical use of silicon was mainly to as “More than Moore” and shows limited to high performance, but low that the continuous scaling of tran- Wilfried Bair volume applications in aerospace. sistors by doubling approximately Vice President every two years can be pursued by Strategic Business Development, The second phase in wafer bon- stacking devices. SUSS MicroTec ding is hallmarked by the growing demand for MEMS devices in con- To address this new market op- sumer electronics providing new and portunity novel equipment approa- unique product features to a vast ches are required to provide submi- mass of insatiable consumers. From cron alignment accuracy for 300mm MEMS microphones to accelerome- wafers for the full product range of ters being used in game consoles like lithography and wafer bonding tools. the Nintendo Wii MEMS continued to The product and process develop- penetrate and influence the appetite ment teams within SUSS MicroTec of the consumer world. The latest have worked on a new and unique “MEMS publicity stunt” was Apple’s set of tools to address this upcoming announcement of the 2nd generation challenge. Millions of connections iPhone. Describing the latest unique per stacked device will be dedicated features of the iPhone the use of to the use of metal bond processes (MEMS) accelerometers and smart with alignment accuracies in order sensors was prominently shown on to match the roadmaps of the con- the supplier’s website. tinuously shrinking Through Silicon Via (TSV) sizes down to interconnect Now we are looking at the third pitches of 3 microns and less. and - what we expect to be - the largest surge in demand for wafer We are approaching the age of 3D bonding applications: We are ap- integration – in fact, we are already proaching the age of 3D integration there. And SUSS is right ahead to of semiconductor devices. The en- help our customers maximize their visioned plan for the 3D integration wafer’s real estate. And maximize includes logic, memory, mixed signal, their profit. As their success is our image sensor and almost all other success. commercially viable semiconductor Page 4 - C4NP – Next Generation Wafer Bumping - Klaus Ruhmer, Sales & Marketing C4NP, and Emmet Hughlett, VP and Business Unit Manager C4NP, SUSS MicroTec Solder bumps were invented almost or in-situ reflow, the solder volume materials has shown to be the primary half a century ago – an eternity in to- transforms into a solder sphere due driver for cost, reliability and electrical day’s world of micro electronics. The to surface tension. That solder sphere performance. technology has not stood still and many is then used to connect to the outside One key advantage of IBM’s C4NP advances have been made in the ar- world. Depending on the type of pack- is it’s capability to put bumps on es- eas of solder and UBM (Under Bump age, that may either be to an interme- sentially any UBM material as long as Metallurgy) materials, solder deposition diate substrate (Flip Chip in Package it wets to solder. As previously reported techniques and equipment technology. FCiP) or to the board itself (Wafer Level in this publication, C4NP also tackles The basic principle however remained Chip Scale Package WLCSP). other classical bumping challenges and unchanged: A UBM feature is created enables environmentally friendly, low- on open pads of a semiconductor chip. SUSS MicroTec has played a key cost, fine pitch bumping using a variety 50um pitch, lead- A specific volume of solder is deposited role in Wafer Bumping since its infancy. of lead-free solder alloys. With C4NP, free solder bumps (Courtesy of IBM) on top of the UBM. During subsequent SUSS Mask Aligners and coat/develop pure bulk solder is molten and injected cluster systems are ideally suited for the into prefabricated glass molds. These specific requirements related to pattern- molds contain etched cavities mirror- ing the UBM and the resist and polymer ing the bump pattern of the wafer. Once layers for subsequent metal deposition. the molds are filled, all solder bumps are transferred in one step onto the wafer. Advanced packaging techniques in- The process is quite simple and doesn’t cluding 3D packaging utilizing solder use any liquid flux. That makes it a low bumps as the primary interconnect- cost, high yield and fast cycle time so- technology have been growing at an lution for bumping with a wide variety impressive pace since the mid 1990’s. of high performance lead free solders. Ever higher interconnect density needs In addition, this process also eliminates combined with increasing performance the need for toxic chemicals needed for requirements are no longer a match for alternative bumping techniques – C4NP existing interconnect technologies such is truly a “Green Technology”. as wire bonding. Besides the solder bump itself how- Unlike other solder deposition pro- ever, the selection of the appropriate cesses, C4NP is independent of the UBM or BLM (Ball Limiting Metallurgy) UBM materials used. It offers full flex- Page 5 - C4NP – Next Generation Wafer Bumping - KlAUS RUHMER Klaus Ruhmer has global Sales & Marketing responsibility for C4NP wafer bumping technology at SUSS MicroTec. He has been with SUSS since 1998 starting out as an Applications Engineer for wafer bonding and lithography pro- ducts. Over the years, he has held vari- ous technical and sales related posi- tions within SUSS. Prior to his current position, Klaus was responsible for Strategic Accounts in North America. Klaus is a native Austrian and holds a BS in Electronics and Telecommunica- tions Technology. He worked in software development before he moved to the 3D - Stacked chips using C4NP micro-bumps US and joined the semiconductor indus- (Courtesy of IBM) try in 1996. ibility to combine the proper UBM with the right solder alloy EMMETT HUGHlETT to not only fit the application but also meet cost and perfor- is Vice President and C4NP Business mance requirements of the final package. Unit Manager with SUSS MicroTec. Emmett holds a Ph.D. in electrical en- Besides the need for lead-free, future solder bumps are gineering. Emmett‘s career includes also driven by 3D packaging and integration requirements. 24 years of engineering, sales and 3D requires fine pitch bumping capability to accommodate management in the semiconductor very high interconnect density. equipment industry, with both Kulicke & Soffa Industries and SUSS MicroTec More information about SUSS MicroTec’s Inc. wafer bumping and advanced packaging solutions can be found on www.suss.com. Page 6 - Precision Wafer To Wafer Packaging Using Eutectic Metal Bonding - ABSTRACT PRECISION Eutectic metal bonding of wafers is used in advanced MEMS packaging and 3D integration technologies. A unique feature of eutectic metals is the melting of the solder WAFER TO WAFER like alloys that facilitate surface planarization and provide a tolerance to surface topography and particles. Often it is assumed that the alignment in eutectic metal bonding is PACKAGING compromised from the liquid phase transition and precision alignment is not possible. This is not true in advanced wafer level bonding using 2-3um thick metal layers. Precision con- trol of bonding force and temperature prevent the aberrant USING EUTECTIC viscous flow of the metal and prevent wafer slippage. Keywords: Eutectic bonding, wafer bonding, MEMS pack- aging, Au-Sn, Au-Si, Cu-Sn. METAl BONDING Shari Farrens, Ph.D., Chief Scientist, and Co-Author Sumant Sood, Sr Application Engineer, SUSS MicroTec INTRODUCTION Hermetic packaging of sensors has historically been achieved with glass frit and anodic bonding techniques. However, these techniques are pres- ently limiting scaling of devices and are not appropriate for integration plans for CMOS compatible MEMS. The widespread use of glass frit bonding can be attributed to its toler- ance to particles and surface topogra- phy, hermetic quality of the seals, and inexpensive processing costs.
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