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Lecture 24 Wafer Bonding and Packaging Wafer-to-Wafer Bonding and Packaging Dr. Thara Srinivasan Lecture 25 EE C245 U. Srinivasan © Picture credit: Radant MEMS Lecture Outline • Reading • Senturia, S., Chapter 17, “Packaging.” • Schmidt, M. A. “Wafer-to-Wafer Bonding for Microstructure Formation,” pp. 1575-1585. • Tummala, R.R. “Fundamentals of Microsystems Packaging,” pp. 556-66. • Today’s Lecture • MEMS Packaging: Why a Whole Lecture? • Wafer Bonding Methods for MEMS • Bonding Tools and Characterization • Packaging: Die-Level, Wafer-Level… EE C245 2 U. Srinivasan © 1 MEMS and the Package • Packaging electronics • Provide electrical interconnects, protect electronics • Dice up wafer, assemble into ceramic/plastic package • Single package, many chips • Packaging MEMS • Provide electrical (and other, i.e., fluidic, optical) interconnects, protect micromechanical elements, interface with outside environment • Dicing cannot be done after release unless precautions taken • Environment inside package important • Package should not mechanically stress MEMS • Single chip, many packages • Packaging, test and calibration important to MEMS design EE C245 3 U. Srinivasan © Current MEMS Packages Die Level Wafer Level Wafer bonded package with glass frit seal and lateral feedthroughs (sealed MEMS is then placed into ceramic package) Cronos Relay Die level release and Motorola CMOS ceramic package Accelerometer region Bosch Gyroscope MEMS region BSAC/Sandia Partial Hexsil cap assembled Wafer bonded package EE C245 onto Sandia iMEMS chip with glass frit seal and using wafer-to-wafer transfer4 U. Srinivasan © lateral feedthroughs 2 Lecture Outline • MEMS Packaging • Wafer Bonding Methods for MEMS • Bonding tools and characterization • Packaging: die-level, wafer-level… EE C245 5 U. Srinivasan © Wafer Bonding in MEMS • Wafer-level packaging • MEMS device construction • Sealed structures, i.e., pressure sensors and fluidic channels • Multiwafer structures, i.e., µTAS, microturbines, optical devices, inkjet print heads Motorola pressure sensor EE C245 MIT microturbine 6 U. Srinivasan © Jensen group, MIT 3 Sealed Structures • Microfluidic channel structures • Pressure sensors and valves Caliper Technologies EE C245 Redwood Microsystems MEMS valve 7 U. Srinivasan © Wafer Bonding Methods • Surface bonding • Metallic layer bonding • Insulating layer bonding EE C245 8 U. Srinivasan © 4 Fusion Bonding • Two ultra-smooth (<10 Å roughness) wafers are bonded without adhesives or applied external forces • Technique • Surface preparation: O2 plasma, hydration, or HF dip • Room temperature contacting leads to hydrogen bonding, van der Waals forces • Annealing at 600-1200°C brings bond to full strength • Low temperature fusion bonding also possible using Ziptronix surface preparation • Mechanism Ziptronix • Hydrophilic ~ Si – O – Si EE C245 • Hydrophobic ~ Si – Si 9 U. Srinivasan © Anodic Bonding • Bonds an electron conducting material, Si, to an ion conducting material, e.g. sodium glass (Pyrex) • Technique • Voltage applied ~ 200-1500 V • Elevated temperature ~ 180-500°C • Positive ions in glass migrate, creating depletion layer near Si surface; voltage drop creates large E-field pulling surfaces into contact • Pro and con – CTE mismatch concerns EE C245 + Hermetic sealing 10 U. Srinivasan © 5 Anodic Bonding 1. after 5 sec 2. after 20 sec ø100 mm, Only center bond pin active All bond pins active Pyrex® - 500 µm, 430 °C, 3. after 2,5 min 4. after 8 min 800 V, N2 - 1000 mbar Bond front spreads Bond 98% completed EE C245 11 U. Srinivasan © Metal Layer Bonding • Pattern seal rings and bond pads photolithographically • Eutectic bonding • Uses eutectic point in metal-Si phase diagrams to form silicides • Au and Si have eutectic point at 363°C + Low-T process, can bond slightly rough surfaces – Au contamination of CMOS • Solder bonding • PbSn (183°C), AuSn (280°C) + Lower-T process, can bond really rough surfaces • Thermocompression • Commonly done with electroplated Au, other soft metals • T ~ room temperature to 300°C • P ~ 1-2 MPa EE C245 + Lowest-T process, can bond rough surfaces, topography 12 U. Srinivasan © 6 Thermocompression Bonding • Transfer of hexsil actuator onto CMOS wafer Angad Singh, et al., EE C245 Transducers ‘97 13 U. Srinivasan © Bonding with Insulating Layers Glass Paste • Adhesives, i.e. Screen epoxies, BCB Cap Wafer • Glass frit bonding Glass Frit Frame Cap Wafer • Stencil or screen printed glass paste • 350-450°C: glass flows Device Wafer • Hermetic P: 1000 mbar Device • Wide sealing layer required (500 µm) EE C245 14 U. Srinivasan © T: 425°C 7 Glass Frit Bonding Packaged switch by EE C245 Radant MEMS 15 U. Srinivasan © Suss MicroTEC Wafer Bonding Methods Techniques Advantages Drawbacks “Surface” bonding Hermetic Flat surface required Anodic strong bond high-voltage Fusion (Direct) strong bond high temp Surface-activated varies varies Metallic interlayer Hermetic Specific metals required Non-flat surface ok Eutectic strong bond flat surface req’d Thermocompression non-flat surface ok high force Solder self-aligning solder flow possible Insulating interlayer Non-flat surface ok Varies Glass frit hermetic large area common in MEMS medium-hi temp Adhesive versatile non-hermetic EE C245 16 U. Srinivasan © 8 Lecture Outline • MEMS Packaging • Wafer Bonding Methods for MEMS • Bonding Tools and Characterization • Packaging: Die-Level, Wafer-Level… EE C245 17 U. Srinivasan © Bonding Tool Suss SB 6e Bonder EE C245 18 U. Srinivasan © 9 Wafer Bonding Considerations • Topography: planar or textured? • Material: insulating or conducting? • Hermeticity required? • Maximum temperature or force allowed? • Biocompatibility? EE C245 19 U. Srinivasan © Bond Characterization • Nondestructive • Visual inspection X-ray • Imaging ~ IR transmission, ultrasonic, X-ray topography • Destructive • Cross-sectional analysis using SEM or TEM Acoustic • Defect etching a cross-sectioned sample • Bond strength measurement techniques • Pressure burst test • Tensile-shear test • Knife-edge test IR EE C245 20 U. Srinivasan © 10 Lecture Outline • MEMS Packaging • Wafer Bonding Methods for MEMS • Bonding Tools and Characterization • Packaging: Die-Level, Wafer-Level… EE C245 21 U. Srinivasan © Issues Specific to MEMS Packaging • MEMS are micromechanical structures • Damaged during dicing step? • Package environment important: hermeticity required? • Considerations • Bonding method • Stack thickness • Mechanical stress of package • Coefficient of thermal expansion mismatch • Thermal management • Electrical feedthrough method EE C245 22 U. Srinivasan © 11 Packaging Approaches • Die-level vs. wafer level EE C245 23 U. Srinivasan © Die Level Packaging • Conventionally, MEMS have been diced, then released to protect them from the sawing process. • But die-level release is expensive and slow Cronos Relay • Die are then packaged in ceramic cavity packages. • Ceramic packages are large and expensive Ceramic Cavity Package Fabricate Singulate Release Package EE C245 24 U. Srinivasan © 12 Dicing After Release? Analog Devices’ upside-down-saw process Texas Instruments’ fabrication and packaging for DMD chip EE C245 25 U. Srinivasan © Wafer Level Packaging • Alternately, do the MEMS release at the wafer level • Release Æ seal Æ dice • Wafer level packaging must follow the wafer level release, to avoid damaging the MEMS. • Much smaller packages are possible. Fabricate Release Wafer bond Chip Scale Package (CSP) EE C245 Singulate 26 U. Srinivasan © 13 Wafer-level packaged MEMS Clarisay Packaged surface gyroscope by acoustic wave IMEC, Bosch filters and STS Packaged switch by EE C245 Radant MEMS 27 U. Srinivasan © Wafer-Level MEMS Package Types • Bulk wafer caps • Current Industry standard • Micro-assembled hexsil caps • Berkeley • In situ caps • Toyota • Berkeley EE C245 28 U. Srinivasan © 14 Bulk Wafer Caps • Industry standard, examples: • Motorola accelerometers • Bosch gyroscopes • Clarisay SAW filter • Radant MEMS switch • Pros and cons + Robust + Hermetic + Wafer-level – Large on-chip area required for seal ring EE C245 29 U. Srinivasan © Micro-Assembled Caps • Fabricate microcaps on donor M. Cohn PhD, J. Heck PhD, wafer Howe group • Transfer microcaps to target wafer by wafer bonding and separation • Thin seal ring requires little real estate (~1% of bulk cap) • Potentially much less expensive than wafer-bonded caps EE C245 Align Bond Separate 30 U. Srinivasan © 15 Micro-Assembled Cap Fabrication • The hexsil process makes “honeycomb” type, high-aspect- ratio structures from thin film deposition Recess etch Electroplate gold bumps & seal ring Deep trench etch Release etch EE C245 Deposit & pattern sacrificial, Thermocompression-bond to target wafer 31 U. Srinivasan © structural layers Microcap Assembly CMOS region MEMS region Several hexsil caps assembled Partial Hexsil cap assembled onto onto bare gold die Sandia iMEMS chip Heck PhD, Howe group, EE C245 Sandia Labs 32 U. Srinivasan © 16 In Situ Sealing • Seal MEMS devices on wafer scale post- release • Microshells fabricated over MEMS • Release etch frees MEMS through access holes • Access holes are sealed using film deposition, possibly at low pressure + Simplifies packaging process – Adds development to fabrication process T. Corman et al. shell EE C245 MEMS 33 U. Srinivasan © Lebouitz et al., BSAC Toyota Hermeticity • Hermetic package has internal cavity with acceptable level of gas-tightness • Metals, glasses, semiconductors are considered hermetic materials; plastic seals are not • Getters (certain metal alloys) can absorb and react with gases in package to
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