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NAND Flash Memory Organization and Operations Novotný R*, Kadlec J and Kuchta R Brno University of Technology, Technická 3058/10, 616 00 Brno, the Czech Republic

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NAND Flash Memory Organization and Operations Novotný R*, Kadlec J and Kuchta R Brno University of Technology, Technická 3058/10, 616 00 Brno, the Czech Republic chnology Te & n S o o ti ft a w a m r r Novotný et al., J Inform Tech Softw Eng 2015, 5:1 e o f E Journal of n n I g f DOI: 10.4172/2165-7866.1000139 i o n l e a e n r r i n u g o J ISSN: 2165-7866 Information Technology & Software Engineering Research Article Open Access NAND Flash Memory Organization and Operations Novotný R*, Kadlec J and Kuchta R Brno University of Technology, Technická 3058/10, 616 00 Brno, The Czech Republic Abstract NAND flash memories are well known for their uncomplicated structure, low cost, and high capacity. Their typical characteristics include architecture, sequential reading, and high density. NAND flash memory is a non-volatile type of memory and has low power consumption. The erasing of NAND Flash memory is based on a block-wise base. Since cells in a flash chip will fail after a limited number of writes, limited write endurance is a key characteristic of flash memory. There are many noise causes such as read or program disturbs, retention process, charge leakage, trapping generation, etc. Preferably, all errors in the storage would be adjusted by the ECC algorithm. The conclusion of all mentioned parasitic factors creates a set of external and internal influences which affects variable behaviour of memory in time. To prepare a review of all the important factors that affect the reliability and life-cycle endurance of NAND flash memories and was our main motivation for this paper. Keywords: Flash memory; Non-volatile; Bit error rate; Error NOR Flash memories. In NAND flash, cells are connected in series, correction code; Architecture; Reliability resembling a NAND gate. In NOR flash, cells are connected in parallel to the bit lines. Due to the non-volatile nature of this storage media, Introduction there is a high demand for it in the mobile communication industry. Flash memory has been an important driving force due to the Flash memory has become the most popular choice for mobile devices. increasing popularity of mobile devices with large storage requirements. NAND Flash memory is commonly found in portable or embedded Flash memory is respected in many applications as a storage media due memory for computers, digital cameras, mobile phones, MP3 players to its high access speed, non-volatile type of storage (Figure 1), and low- and other devices where data is generally written or read sequentially power consumption. There is a wide range of non-volatile memories, [5]. and they all give various characteristics based on the complexity of array organization and structure of the selected cell type [1]. Flash memories are becoming widely deployed in many applications such MEMORY: TYPE: SUB-TYPE: EXAMPLE: as solid state drives (SSDs) for embedded controllers and traditional Dynamic SDRAM computing storage. NAND Flash memories are becoming more memory (retain and more popular due to their usage as Solid-State Drives (SSDs) data for small [2] and USB Flash drives which are in general called Flash storage time period) Volatile devices. Another area of application is as the non-volatile memory (loss data in systems, which allow system reconfiguration, software updates, when power Static SRAM changing of stored identification codes, or frequent updating of stored is off) memory (retain data as information (i.e. smart cards). Electrically erasable and programmable long as power Types of is on) read-only memories (EEPROM’s), which are electrically erasable and silicon programmable, will be produced only for specific applications, because memories they use larger chip areas and are more expensive (Figure 1). Flash memories as a type of memory device characterized by non-volatility. One-time Mask programmable programmable Following on from these advantages, the manufacturers of memories Nonvolatile ROM started to consider the role of flash memories for a new range of (retains data memory regardless of applications. These include hard disk caches, solid-state drives, mobile power supply) Programmable NAND Flash sensor networks, and data-centric computing. Many microcontrollers memory (data have integrated flash memory for non-volatile data storage. Flash written many times) NOR Flash memory is also used in many applications where data retention in power-off situations and reliability are crucial requirements, such as in embedded computers or wireless communication systems. Nowadays, Figure 1: Flash memories as a type of memory device characterized by non-volatility. flash memory is one of the most popular, reliable, and flexible non- volatile memories to store constant data values and software code. NAND Flash architecture and NOR Flash architecture (Figure 2) dominates the non-volatile Flash market [3] because NAND Flash is *Corresponding author: Novotný R, Brno University of Technology, Technická not byte addressable it is rarely used as the main memory of the system. 3058/10, 616 00 Brno, The Czech Republic, Tel: +420541141111; E-mail: As a result, there must be a controller to access data which is important [email protected]. in order to manage all the essential tasks of accessing NAND Flash Received August 26, 2014; Accepted January 20, 2015; Published January 30, device effectively [4]. The major differences between NAND and NOR 2015 flash memory (Table 1 and Figure 2). The cell structure of NOR and Citation: Novotný R, Kadlec J, Kuchta R (2015) NAND Flash Memory Organization NAND Memory is shown in Figure 2. The structure of NAND Flash and Operations. J Inform Tech Softw Eng 5: 139. doi:10.4172/2165-7866.1000139 cell is depicted in ( Figure 3). Bold lines in this figure capture current Copyright: © 2015 Novotný R, et al. This is an open-access article distributed path (with or without wires). Depending on how memory cells are under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the interconnected, it is possible to make a distinction between NAND and original author and source are credited. J Inform Tech Softw Eng Volume 5 • Issue 1 • 1000139 ISSN: 2165-7866 JITSE, an open access journal Citation: Novotný R, Kadlec J, Kuchta R (2015) NAND Flash Memory Organization and Operations. J Inform Tech Softw Eng 5: 139. doi:10.4172/2165- 7866.1000139 Page 2 of 8 NAND NOR Memory cell arrangements (Figure 2) Cells are arranged in series with the adjacent cells sharing Cells are arranged in parallel with all the source node of the cells source and drain. connected to the bit line. Capacity Tens of Gbits, mass data storage. Several Gbits, code storage. Non-volatile Yes, extremely high cell densities. Yes, larger chip area per cell. Interface I/O interface Full memory interface High-speed access Yes, random access. Yes, serial access. Access method Sequential Random byte level access Page mode data access Yes, organized into pages and erased on a block basis. No, organized on a byte or word basis. Performance Fast read (serial access cycle) Fast read (random access) Fast write Slow write Fasted erase Slow erase Price Lower cost per bit Higher cost per bit Life Span 105-106 104-105 Write cycles 106 106 Advantages Fast programing and erasing Random access, possible byte programing Disadvantages Slow random access, difficult byte programing Slow programing, slow erasing Typical uses and applications Storage, file (disk) applications, voice, data, video recorder Networking device memory, replacement of EPROM, applications and any large sequential data archiving executed directly from non-volatile memory Table 1: The major differences between NAND and NOR flash memory. NAND NOR NAND FLASH ARRAY: FLASH PACKAGE: Bit Line Bit Line FLASH: FLASH: Independent Flash Planes Bit Line Select Word line 0 Column decode Word line 0 Source Line block n NAND Adress bloIc/Ok I2/O I/O I/O Flash Row and Word line 1 Cell Word line 1 Cell bloI/cOk I1/O I/O I/O decode I/O I/O I/O I/O Array Control Logic Source Line page Word line n page Word line 2 page Ground Select Data Register I/O Source Line Source Line 16 or 8 bits Figure 2: NAND Flash and NOR Flash memory cells arrangement. Figure 4: Architecture of the NAND Flash Device. Bit Lines (BL) BL BL BL WL Word WL Lines (WL) WL WL Figure 3: The structure of NAND Flash cell. SL SL SL NAND Overview: Flash Array and Architecture Source Lines (SL) The overall architecture of the NAND flash device is shown in Figure 5: Example of NAND Example of flash array configuration. Figure 4. The figure shows the NAND Flash Controller which gives interface to application processors. The page register is a critical data holding area in NAND operations. The register is incorporated or the whole chip [4]. Therefore data can be written only to one page in order to receive new data while the data register simultaneously at once. As shown in Figure 5, a page is defined as cells linked with programs the NAND Flash array. Unlike most memory technologies, the same word line. This is the smallest programmable unit physically NAND flash is ordered in pages which are written and read as a unit. made up of a row of cells. The page size is typically 2 or 4 Kbytes, The elementary unit of operation for a NAND Flash device is one page while a block contains of 32 or 64 pages [6]. Figure 5 is an example of of data with control commands of the whole block (multiple pages) a flash array configuration. The word line (WL) is the horizontal line J Inform Tech Softw Eng Volume 5 • Issue 1 • 1000139 ISSN: 2165-7866 JITSE, an open access journal Citation: Novotný R, Kadlec J, Kuchta R (2015) NAND Flash Memory Organization and Operations.
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