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Analysis of Resistance and Mobility in Ingaas Quantum-Well Mosfets from Ballistic to Diffusive Regimes Jianqiang Lin, Member, IEEE, Yufei Wu, Jesús A

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Analysis of Resistance and Mobility in Ingaas Quantum-Well Mosfets from Ballistic to Diffusive Regimes Jianqiang Lin, Member, IEEE, Yufei Wu, Jesús A 1464 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 4, APRIL 2016 Analysis of Resistance and Mobility in InGaAs Quantum-Well MOSFETs From Ballistic to Diffusive Regimes Jianqiang Lin, Member, IEEE, Yufei Wu, Jesús A. del Alamo, Fellow, IEEE, and Dimitri A. Antoniadis, Life Fellow, IEEE Abstract— Recent advances in the fabrication technology have in 2014 using a self-aligned recessed-gate technology [4]. The yielded nanometer-scale InGaAs quantum-well (QW) MOSFETs excellent ON-state performance of these devices arises from with extremely low and reproducible external contact and access our emphasis on minimization of external resistance through region resistances. This allows, for the first time, a detailed analysis of the role of ballistic transport in the operation of these self-aligned design and very low contact resistivity of the devices. This paper presents a systematic analysis of external source and drain contacts. resistance, ballistic resistance, and channel mobility in InGaAs When the channel length of an MOSFET is comparable QW-MOSFETs under near-equilibrium conditions, i.e., under with or smaller than the mean-free-path (MFP), near-ballistic very low drain-source bias. This is an important regime for device transport is to be expected. In InGaAs high-electron- characterization. Devices with a wide range of channel lengths, from 70 to 650 nm, are investigated. Our analysis includes the mobility transistors (HEMTs), the MFP of 194 nm has been consideration of the impact of carrier degeneracy in the QW extracted [5]. Assuming comparable MFP, in nanometer-scale channel. We show that unless the ballistic behavior in the intrinsic InGaAs QW-MOSFETs with very low parasitics, the sig- channel is accounted for, the standard extraction technique for nature of ballistic transport should clearly emerge, even at external resistance grossly exaggerates its value as it incorporates room temperature. At low electric field, ballistic transport the so-called ballistic resistance. By separating out the ballistic resistance, the external resistance in our devices is shown to manifests itself in a length-independent channel resistance or, be extremely low, 74 -μm, including both source and drain equivalently, a length-dependent carrier mobility. This effect is sides. This is thanks to our contact-first self-aligned Mo-contact explained using the concepts of ballistic resistance [6]–[8] or technology. Furthermore, taking the advantage of the wide range ballistic mobility [9]–[11]. The ballistic resistance has a strong of ballisticity of the devices studied in this paper, we demonstrate dependence on the 2-D carrier concentration (N ).Thishas a methodology to self-consistently extract scattering-dependent s effective mobility, mean-free-path length, and ballistic mobility. already been observed in very short-channel Si fully-depleted silicon-on-insulator MOSFETs [12]. Similar studies have yet Index Terms— III–V, ballistic mobility, ballistic resistance, to be carried out in InGaAs MOSFETs even though with near-equilibrium transport, quantum-well (QW) MOSFETs. gate lengths in the sub-100 nm regime, these devices should be operating closer to the ballistic limit than equivalent Si I. INTRODUCTION MOSFETs. Part of the reason for the absence of such studies nAs-RICH InGaAs is a promising channel material for is the requirement that the external resistance should be small Ifuture CMOS applications due to its superior electron and exhibits a consistent value from device to device. transport properties. In the last few years, there have been In this paper, for the first time, we have carried out extensive significant research efforts toward developing the InGaAs characterization of well-behaved InGaAs QW-MOSFETs with MOSFET technology and unprecedented transistor perfor- a total external resistance below 100 -μm. We have measured mance has been demonstrated recently [1]–[3]. InGaAs devices over a broad range of gate lengths with the goal of quantum-well (QW) MOSFETs with a record transconduc- studying electron transport from near-ballistic to near-diffusive μ tance, gm,of3.1mS/ m were demonstrated by our group regimes. Our work reveals the important roles of ballistic Manuscript received December 29, 2015; revised February 6, 2016; resistance and ballistic mobility in high-performance InGaAs accepted February 16, 2016. Date of publication March 7, 2016; date of transistors. Our results clearly show that in these devices, current version March 22, 2016. This work was supported jointly by the quantum-mechanical ballistic transport phenomena must be Defense Threat Reduction Agency under Contract HDTRA 1-14-1-0057, the National Science Foundation through the NCN-NEEDS Program taken into account for proper device characterization and under Grant 1227020-EEC, and the National Science Foundation modeling to be performed. Furthermore, our study reveals through the Center for Energy Efficient Electronics Science Center that channel carrier degeneracy must be accounted for even under Award 0939514. The review of this paper was arranged by Editor G. Meneghesso. at moderate gate overdrive. This is the result of the relatively The authors are with Microsystems Technology Laboratories, Massachusetts low density of states of the InGaAs channel. Institute of Technology, Cambridge, MA 02139 USA (e-mail: [email protected]). This paper is organized as follows. Section II describes Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. the device structure used in this paper. Section III Digital Object Identifier 10.1109/TED.2016.2532604 extracts and analyzes the experimental channel and external 0018-9383 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. LIN et al.: ANALYSIS OF RESISTANCE AND MOBILITY IN InGaAs QW MOSFETs 1465 Fig. 1. TEM cross section of a QW InGaAs MOSFET similar to those Fig. 2. (a) Linear threshold voltage as a function of Leff obtained at = used in this paper. L is defined as the length of the flat portion of the gate Vds 10 mV. (b) Linear-regime transfer characteristics versus gate overdrive, eff = directly above the channel. Id –Vgt,atVds 10 mV. Respective Leff values from top to bottom are 70, 90, 100, 130, 190, 250, 450, and 650 nm. resistances and explains the importance of ballistic resis- tance. Section IV extracts the apparent mobility by the split capacitance–voltage (C–V) method. From this, MFP, long- channel scattering-limited effective field mobility, and ballistic mobility are extracted self-consistently and their dependencies on gate length and degeneracy are investigated. The conclusion isdrawninSectionV. II. DEVICE DESCRIPTION The devices used in this paper and their fabrication processes have been discussed elsewhere [4], [13]. In essence, this is a contact-first self-aligned architecture, in which the channel is recessed using the ohmic contacts as a mask. The gate recess consists of a combination of dry etch and self- limiting digital etch to precisely control the critical dimensions μ in both the lateral and vertical directions of the device [14]. Fig. 3. Capacitance and integrated charge density versus Vgt of a 1 mby 10 μm device. The split C–V measurement was carried out at a frequency In particular, our fabrication process yields a channel thickness of 100 MHz. Drain and source contacts are shorted together. control in the scale of ∼1nm. An example of a device used in this paper is shown in the cross-sectional transmission electron micrograph (TEM) at Vds = 10 mV. We find that the threshold voltage, Vt , in Fig. 1. This device features an effective gate length, Leff , changes with Leff as a result of short-channel effects of 120 nm. The access regions that link the W/Mo contacts to [Fig. 2(a)]. Vt is determined by extrapolating from the max- + the channel are each 15 nm long and are covered by an n imum slope (maximum gm point) of the linear transfer char- InGaAs/InP cap which makes them highly conducting. The acteristics to Id = 0. Typical transfer characteristics versus gate insulator consists of 2.5 nm HfO2 that conformably covers gate overdrive, Vgt = Vgs − Vt ,forVds = 10 mV are plotted the gate and access regions. The gate metal is also Mo. To help in Fig. 2(b). reduce the device access resistance, a slight overlap is created The C–V characteristics were also measured using the split + between the gate and the n cap at the edge of the access C–V method on a device with a gate length of 1 μmand region. Through process optimization, our gate recess yields a width of 10 μmatVds = 0 V. A relatively high frequency smooth and uniform channel, as shown in Fig. 1. The channel of 100 MHz has been used to diminish the influence of inter- thickness of all devices in his paper is estimated to be 7 nm face states, but little frequency dispersion was observed above (different from Fig. 1). The channel consists of 2 nm InAs on 1 MHz (not shown here). Gate overlap capacitance obtained the top of 5 nm In0.7Ga0.3As. at Vgt =−0.3 V is subtracted from the measured capacitance. Devices with Leff between 70 and 650 nm have been The result is shown in Fig. 3. The channel electron sheet studied. Leff is the effective gate length estimated from the density is obtained by integrating the capacitance, and is printed gate length by electron-beam lithography and calibra- shown in the same plot. tion from cross-sectional TEM images. All device measure- The ON-resistance of the MOSFETs under varying ments have been taken at room temperature. gate overdrive was also extracted as RON = Vds/Id for Vds = 10 mV, and is shown in Fig. 4. RON(0) is extracted by III. ANALYSIS OF RESISTANCE extrapolating the linear fit of RON versus Leff to Leff = 0.
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