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Nanotechnology ? Nram (Nano Random Access
International Journal Of Engineering Research and Technology (IJERT) IFET-2014 Conference Proceedings INTERFACE ECE T14 INTRACT – INNOVATE - INSPIRE NANOTECHNOLOGY – NRAM (NANO RANDOM ACCESS MEMORY) RANJITHA. T, SANDHYA. R GOVERNMENT COLLEGE OF TECHNOLOGY, COIMBATORE 13. containing elements, nanotubes, are so small, NRAM technology will Abstract— NRAM (Nano Random Access Memory), is one of achieve very high memory densities: at least 10-100 times our current the important applications of nanotechnology. This paper has best. NRAM will operate electromechanically rather than just been prepared to cull out answers for the following crucial electrically, setting it apart from other memory technologies as a questions: nonvolatile form of memory, meaning data will be retained even What is NRAM? when the power is turned off. The creators of the technology claim it What is the need of it? has the advantages of all the best memory technologies with none of How can it be made possible? the disadvantages, setting it up to be the universal medium for What is the principle and technology involved in NRAM? memory in the future. What are the advantages and features of NRAM? The world is longing for all the things it can use within its TECHNOLOGY palm. As a result nanotechnology is taking its head in the world. Nantero's technology is based on a well-known effect in carbon Much of the electronic gadgets are reduced in size and increased nanotubes where crossed nanotubes on a flat surface can either be in efficiency by the nanotechnology. The memory storage devices touching or slightly separated in the vertical direction (normal to the are somewhat large in size due to the materials used for their substrate) due to Van der Waal's interactions. -
Lecture 27 Semiconductor Memory: DRAM and Non-Volatile Memory Administrivia
Lecture 27 Semiconductor Memory: DRAM and Non-Volatile Memory Digital Integrated Circuits Interconnect © Prentice Hall 2000 Administrivia l Today: Project phase 3 announcement. l Poster Session Tu 5/8 1-4pm » Location BWRC, 2108 Allston Way l Last lecture on Th 5/3 will cover issues in IC design Digital Integrated Circuits Interconnect © Prentice Hall 2000 1 Lectures Last l ROM and SRAM Today l Introducing the project phase III l DRAM and Non-volatile Digital Integrated Circuits Interconnect © Prentice Hall 2000 Project Phase III A proposed SRAM cell! w/ Control Circuit Digital Integrated Circuits Interconnect © Prentice Hall 2000 2 Tasks l Explain the behavior of the cell in its global contents. Provide transient simulations to illustrate. l Identify weakness of the cell in terms of signal integrity and power dissipation. Quantify your statements. l Propose an implementation that improves power dissipation. Digital Integrated Circuits Interconnect © Prentice Hall 2000 Report l Report » Comparison, Selection, Electrical Design » Cell Layout, Timing Waveforms in SRAM, Simulation » Power and Estimation and Proposal for SRAM power reduction l 3 slides on poster, each of which represents one of the tasks of the previous slide » Explanation of cell operation, comparison, design » Cell Operation in SRAM, Waveforms, Simulation » Proposal of improved SRAM implementation (from a power perspective) Digital Integrated Circuits Interconnect © Prentice Hall 2000 3 SEMICONDUCTOR MEMORIES Digital Integrated Circuits Interconnect © Prentice Hall 2000 3-Transistor DRAM Cell BL1 BL2 WWL WWL RWL RWL X X M3 VDD-VT M2 M1 VDD BL1 CS BL2 VDD-VT DV No constraints on device ratios Reads are non-destructive Value stored at node X when writing a “1” = VWWL-VTn Digital Integrated Circuits Interconnect © Prentice Hall 2000 4 3T-DRAM — Layout BL2 BL1 GND RWL M3 M2 WWL M1 Digital Integrated Circuits Interconnect © Prentice Hall 2000 1-Transistor DRAM Cell BL WL Write "1" Read "1" WL 1 M C X S GND VDD-VT V BL DD VDD/2 VDD/2 CBL sensing Write: CS is charged or discharged by asserting WL and BL. -
Nanotechnology Trends in Nonvolatile Memory Devices
IBM Research Nanotechnology Trends in Nonvolatile Memory Devices Gian-Luca Bona [email protected] IBM Research, Almaden Research Center © 2008 IBM Corporation IBM Research The Elusive Universal Memory © 2008 IBM Corporation IBM Research Incumbent Semiconductor Memories SRAM Cost NOR FLASH DRAM NAND FLASH Attributes for universal memories: –Highest performance –Lowest active and standby power –Unlimited Read/Write endurance –Non-Volatility –Compatible to existing technologies –Continuously scalable –Lowest cost per bit Performance © 2008 IBM Corporation IBM Research Incumbent Semiconductor Memories SRAM Cost NOR FLASH DRAM NAND FLASH m+1 SLm SLm-1 WLn-1 WLn WLn+1 A new class of universal storage device : – a fast solid-state, nonvolatile RAM – enables compact, robust storage systems with solid state reliability and significantly improved cost- performance Performance © 2008 IBM Corporation IBM Research Non-volatile, universal semiconductor memory SL m+1 SL m SL m-1 WL n-1 WL n WL n+1 Everyone is looking for a dense (cheap) crosspoint memory. It is relatively easy to identify materials that show bistable hysteretic behavior (easily distinguishable, stable on/off states). IBM © 2006 IBM Corporation IBM Research The Memory Landscape © 2008 IBM Corporation IBM Research IBM Research Histogram of Memory Papers Papers presented at Symposium on VLSI Technology and IEDM; Ref.: G. Burr et al., IBM Journal of R&D, Vol.52, No.4/5, July 2008 © 2008 IBM Corporation IBM Research IBM Research Emerging Memory Technologies Memory technology remains an -
MRAM (Magnetoresistive Random Access Memory)
MRAM (MagnetoResistive Random Access Memory) By : Dhruv Dani 200601163 Shitij Kumar 200601084 Team - N Flow of Presentation Current Memory Technologies Riddles Introduction Principle, Structure and Working Working Modes Schematic Overview MRAM v/s Other Memory Elements Applications in Embedded Systems Case Studies Supported Microcontrollers and Companies Constraints References Current Memory Technologies Volatile When the power is switched off the information is lost. Restarting: programs and data need to be reloaded resulting in increase of idle time. Non -Volatile Can retain stored information permanently Stores information that does not require frequent changing. Read/Write/Erase cycles consume a lot of time. Commonly Known Memories Volatile – Static RAM (SRAM), Dynamic RAM (DRAM) Non –Volatile – Flash, EEPROM Riddle - 1 A car component manufacturing company ‘X’ has to built Air Bag systems for a range of cars. The requisites of building such a system are that it has to interact with the various sensors which detect and record passenger weight and are employed in other safety devices on the vehicle which perform various crucial tasks like detecting the impact of the possible collision. Such a real time system requires the memory to be susceptible to continuous reads, writes and overwrites in each clocked interval. As an embedded engineer for this company X which kind of memory would you use to implement such a system? Riddle - 2 The Defense Research and Development Organization of a nation ‘C’ has to build a system which can be employed by them for their military and aerospace applications. These systems at present require constant power supply to maintain various kinds databases consisting of confidential information. -
Memory We Have Already Mentioned That Digital Computer Works on Stored Programmed Concept Introduced by Von Neumann
www.getmyuni.com Memory We have already mentioned that digital computer works on stored programmed concept introduced by Von Neumann. We use memory to store the information, which includes both program and data. Due to several reasons, we have different kind of memories. We use different kind of memory at different level. The memory of computer is broadly categories into two categories: . Internal and . external Internal memory is used by CPU to perform task and external memory is used to store bulk information, which includes large software and data. Memory is used to store the information in digital form. The memory hierarchy is given by: . Register . Cache Memory . Main Memory . Magnetic Disk . Removable media (Magnetic tape) Register: This is a part of Central Processor Unit, so they reside inside the CPU. The information from main memory is brought to CPU and keep the information in register. Due to space and cost constraints, we have got a limited number of registers in a CPU. These are basically faster devices. Cache Memory: Cache memory is a storage device placed in between CPU and main memory. These are semiconductor memories. These are basically fast memory device, faster than main memory. We cannot have a big volume of cache memory due to its higher cost and some constraints of the CPU. Due to higher cost we cannot replace the whole main memory by faster memory. Generally, the most recently used information is kept in the cache memory. It is brought from the main memory and placed in the cache memory. Now days, we get CPU with internal cache. -
A Survey of Circuit Innovations in Ferroelectric Random-Access Memories
A Survey of Circuit Innovations in Ferroelectric Random-Access Memories Ali Sheikholeslami, MEMBER, IEEE, AND P. Glenn Gulak, SENIOR MEMBER, IEEE This paper surveys circuit innovations in ferroelectric memo- and low power consumption and the emergence of new ries at three circuit levels: memory cell, sensing, and architecture. applications such as contactless smart cards and digital A ferroelectric memory cell consists of at least one ferroelectric ca- cameras. pacitor, where binary data are stored, and one or two transistors that either allow access to the capacitor or amplify its content for Table 1 compares ferroelectric memories with elec- a read operation. Once a cell is accessed for a read operation, its trically erasable and programmable read-only memories data are presented in the form of an analog signal to a sense ampli- (EEPROM’s) and Flash memories, two types of floating-gate fier, where it is compared against a reference voltage to determine memories, in terms of density, read-access time, write-access its logic level. time, and the energy consumed in a 32-bit read/write. En- The circuit techniques used to generate the reference voltage must be robust to semiconductor processing variations across the chip joying a mature process technology, EEPROM’s and Flash and the device imperfections of ferroelectric capacitors. We review memories [1], [2] are superior to ferroelectric memories in six methods of generating a reference voltage, two being presented terms of density. Also, they require less power compared to for the first time in this paper. These methods are discussed and ferroelectric memories for read operations, a factor that will evaluated in terms of their accuracy, area overhead, and sensing keep them popular in applications that demand numerous complexity. -
Evaluation of Ferroelectric Materials for Memory Applications
Calhoun: The NPS Institutional Archive Theses and Dissertations Thesis Collection 1990-06 Evaluation of ferroelectric materials for memory applications Josefson, Carl Elof Monterey, California: Naval Postgraduate School http://hdl.handle.net/10945/27767 NAVAL POSTGRADUATE SCHOOL Monterey, California k ?' AT)'0p D T I C I I ELECTE1 '- ' TH SI EVALUATION OF FERROELECTRIC MATERIALS FOR MEMORY APPLICATIONS by Carl Elof Josefson June 1990 Thesis Advisor: R. Panholzer Approved for public release; distribution is unlimited. 91 2 28 056 SECURITY CLASSIFICATION OF THIS PAGE RPRDOUETA I Form Approved REPORT DOCUMENTATION PAGE No. 0704-0188 la. REPORT SECURITY CLASSIFICATION lb. RESTRICTIVE MARKINGS Unclassified 2a. SECURITY CLASSIFICATION AUTHORITY 3. DISTRIBUTION /AVAILABILITY OF REPORT Approved for public release; 2b. DECLASSIFICATION /DOWNGRADING SCHEDULE distribution is unlimited. 4. PERFORMING ORGANIZATION REPORT NUMBER(S) 5. MONITORING ORGANIZATION REPORT NUMBER(S) 6a. NAME OF PERFORMING ORGANIZATION C.j. OFFICE SYMBOL 7a. NAME OF MONITORING ORGANIZATION (If appicable) Naval Postgraduate School 9 Naval Postgraduate School 6c. ADDRESS (City, State, and ZIP Code) 7b. ADDRESS (City, State, and ZIP Code) Monterey, CA 93943-5000 Monterey, CA 93943-5000 Ba. NAME OF FUNDING /SPONSORING 8b. OFFICE SYMBOL 9. PROCUREMENT INSTRUMENT IDENTIFICATION NUMBER ORGANIZATION I (If applicable) 8c. ADDRESS (City, State, and ZIP Code) 10. SOURCE OF FUNDING NUMBERS PROGRAM PROJECT TASK WORK UNIT ELEMENT NO. NO. NO. ACCESSION NO. 11. TITLE (Include Security Classification) Evaluation of Ferroelectric Materials for Memory Applications 12. PERSONAL AUTHOR(S) Carl E. Josefson 13a. TYPE OF REPORT 13b. TIME COVERED 14. DATE OF REPORT (YearMonthDay) 15. PAGE COUNT Master's Thesis FROM TO 1990 June I 97 16. -
VLSI Memory Lecture-Nahas-181025.Pdf
Introduction to CMOS VLSI Design Semiconductor Memory Harris and Weste, Chapter 12 25 October 2018 J. J. Nahas and P. M. Kogge Modified from slides by Jay Brockman 2008 [Including slides from Harris & Weste, Ed 4, Adapted from Mary Jane Irwin and Vijay Narananan, CSE Penn State adaptation of Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.] Semiconductor Memory Slide 1 Outline Memory features and comparisons Generic Memory Architecture – Architecture Overview – Row and Column Decoders – Redundancy and Error Correction Static Random Access Memory (SRAM) Dynamic Random Access Memory (DRAM) Flash (EEPROM) Memory Other Memory Types Semiconductor MemoryCMOS VLSI Design Slide 2 1 Memory Features and Comparisons Semiconductor MemoryCMOS VLSI Design Slide 3 Memory Characteristics Read/Write Attributes – Read-Only Memory (ROM): Programmed at manufacture • Being phased out of use in favor of Flash – Read-Write Memory: Can change value dynamically • SRAM, DRAM – Read-Mostly: Can write, but much more slowly than read • EEPROM (Electrically Eraseable, Programable Read Only Memory) (pronounced “Double E Prom”) • Flash (A form of EEPROM) Volatility: sensitivity to losing power – Volatile: loses contents when power turned off – Non-volatile: does not lose contents Semiconductor MemoryCMOS VLSI Design Slide 4 2 Memory Characteristics Addressability – Random-Access: provide address to access a “word” of data • No correlation between successive addresses – Block oriented: read and write large blocks of data at a time – Content-addressable: -
17. Semiconductor Memories
17. Semiconductor Memories Institute of Microelectronic Systems Overview •Introduction • Read Only Memory (ROM) • Nonvolatile Read/Write Memory (RWM) • Static Random Access Memory (SRAM) • Dynamic Random Access Memory (DRAM) •Summary Institute of Microelectronic 17: Semiconductor Memories Systems 2 Semiconductor Memory Classification Non-Volatile Memory Volatile Memory Read Only Memory Read/Write Memory Read/Write Memory (ROM) (RWM) Random Non-Random Mask-Programmable EPROM Access Access ROM E2PROM SRAM FIFO Programmable ROM FLASH DRAM LIFO Shift Register EPROM - Erasable Programmable ROM SRAM - Static Random Access Memory E2PROM - Electrically Erasable DRAM - Dynamic Random Access Memory Programmable ROM FIFO - First-In First-Out LIFO - Last-In First-Out Institute of Microelectronic 17: Semiconductor Memories Systems 3 Random Access Memory Array Organization Memory array • Memory storage cells • Address decoders Each memory cell • stores one bit of binary information (”0“ or ”1“ logic) • shares common connections with other cells: rows, columns Institute of Microelectronic 17: Semiconductor Memories Systems 4 Read Only Memory - ROM • Simple combinatorial Boolean network which produces a specific output for each input combination (address) • ”1“ bit stored - absence of an active transistor • ”0“ bit stored - presence of an active transistor • Organized in arrays of 2N words • Typical applications: • store the microcoded instructions set of a microprocessor • store a portion of the operation system for PCs • store the fixed programs for -
Semiconductor Memories
SEMICONDUCTOR MEMORIES Digital Integrated Circuits Memory © Prentice Hall 1995 Chapter Overview • Memory Classification • Memory Architectures • The Memory Core • Periphery • Reliability Digital Integrated Circuits Memory © Prentice Hall 1995 Semiconductor Memory Classification RWM NVRWM ROM Random Non-Random EPROM Mask-Programmed Access Access 2 E PROM Programmable (PROM) SRAM FIFO FLASH DRAM LIFO Shift Register CAM Digital Integrated Circuits Memory © Prentice Hall 1995 Memory Architecture: Decoders M bits M bits S S0 0 Word 0 Word 0 S1 Word 1 A0 Word 1 S2 Storage Storage s Word 2 Word 2 d Cell A1 Cell r r o e d W o c N AK-1 e S D N-2 Word N-2 Word N-2 SN_1 Word N-1 Word N-1 Input-Output Input-Output (M bits) (M bits) N words => N select signals Decoder reduces # of select signals Too many select signals K = log2N Digital Integrated Circuits Memory © Prentice Hall 1995 Array-Structured Memory Architecture Problem: ASPECT RATIO or HEIGHT >> WIDTH 2L-K Bit Line Storage Cell AK r e d Word Line AK+1 o c e D AL-1 w o R M.2K Sense Amplifiers / Drivers Amplify swing to rail-to-rail amplitude A 0 Column Decoder Selects appropriate AK-1 word Input-Output (M bits) Digital Integrated Circuits Memory © Prentice Hall 1995 Hierarchical Memory Architecture Row Address Column Address Block Address Global Data Bus Control Block Selector Global Circuitry Amplifier/Driver I/O Advantages: 1. Shorter wires within blocks 2. Block address activates only 1 block => power savings Digital Integrated Circuits Memory © Prentice Hall 1995 Memory Timing: Definitions -
Phase Change Materials and Phase Change Memory Simone Raoux , Feng Xiong , Matthias Wuttig , and Eric Pop
Phase change materials and phase change memory Simone Raoux , Feng Xiong , Matthias Wuttig , and Eric Pop Phase change memory (PCM) is an emerging technology that combines the unique properties of phase change materials with the potential for novel memory devices, which can help lead to new computer architectures. Phase change materials store information in their amorphous and crystalline phases, which can be reversibly switched by the application of an external voltage. This article describes the advantages and challenges of PCM. The physical properties of phase change materials that enable data storage are described, and our current knowledge of the phase change processes is summarized. Various designs of PCM devices with their respective advantages and integration challenges are presented. The scaling limits of PCM are addressed, and its performance is compared to competing existing and emerging memory technologies. Finally, potential new applications of phase change devices such as neuromorphic computing and phase change logic are outlined. Introduction Properties of phase change materials Novel information storage concepts have been continuously Phase change materials exist in an amorphous and one or developed throughout history, from cave paintings to print- sometimes several crystalline phases, and they can be rapidly ing, from phonographs to magnetic tape, dynamic random and repeatedly switched between these phases. The switching access memory (DRAM), compact disks (CDs), and fl ash is typically induced by heating through optical pulses or elec- memory, just to name a few. Over the last four decades, silicon trical (Joule) heating. The optical and electronic properties technology has enabled data storage through charge retention can vary signifi cantly between the amorphous and crystalline on metal-oxide-silicon (MOS) capacitive structures. -
FUJITSU LIMITED 7-1, Nishishinjuku 2-Chome, Shinjuku-Ku, Tokyo 163-0721 Tel : +81-3-5322-3353 Fax : +81-3-5322-3386
• FRAM is a registered trademark of Ramtron International Corporation. Other company names and brand names are the trademarks or registered trademarks of their respective owners. Japan Marketing Div., Electronic Devices Shinjuku Dai-ichi Seimei Bldg. FUJITSU LIMITED 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0721 http://edevice.fujitsu.com/ Tel : +81-3-5322-3353 Fax : +81-3-5322-3386 North and South America Europe Asia Pacific Korea FUJITSU MICROELECTRONICS FUJITSU MICROELECTRONICS FUJITSU MICROELECTRONICS FUJITSU MICROELECTRONICS AMERICA, INC. EUROPE GmbH ASIA PTE LTD. KOREA LTD. 1250 E. Arques Avenue, M/S 333 Pittlerstrasse 47, #05-08, 151 Lorong Chuan, 1702 KOSMO TOWER, Sunnyvale, CA 94088-3470, USA D-63225 Langen, New Tech Park, 1002 Daechi-Dong, Tel : +1-408-737-5600 Germany Singapore 556741 Kangnam-Gu, Seoul Fax : +1-408-737-5999 Tel : +49-6103-690-0 Tel : +65-6281-0770 135-280, Korea http://www.fma.fujitsu.com/ Fax : +49-6103-690-122 Fax : +65-6281-0220 Tel : +82-02-3484-7100 http://www.fme.fujitsu.com/ http://www.fmal.fujitsu.com/ Fax : +82-02-3484-7111 http://www.fmk.fujitsu.com/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information.