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Electronic Manufacturing Services in Bulgaria Electronic Manufacturing Visit the SEEIM web site: www.SEE-industry.com www.tllmedia.bg THE INDUSTRIAL PRODUCTS & SERVICES MAGAZINE FOR THE SOUTH-EAST EUROPEAN COUNTRIES OCTOBER issue3/2015 ISSN 1312-0670 Electronic Manufacturing Services inin BulgariaBulgaria IN THIS ISSUE: ISSN 1312-0670 South-East European Industrial Market is a registered trade mark of TLL Media Ltd. The publisher is not responsible for the content of the advertisements, paid publications and materials. 4 HSIC versus USB South-East European Industrial Market is a bimonthly industrial products & services magazine for the South-East European countries - Bulgaria, Croatia, Greece, F.Y.R. of Macedonia, Romania, Slovenia, Serbia, Montenegro, Turkey, Albania. 7 Electronic Manufacturing Services in Bulgaria It is distributed free of charge among the working specialists in the industrial sectors in the region, and the engineering, manufacturing and trade companies in South-Eastern Europe. 16 The Western Balkans and EU energy security Editorial Department Petya Nakova E-mail: [email protected] Pepa Petrunova 20 SEE TOP 100 companies mark the industry development in E-mail: [email protected] Eleonora Elenkova % (+359 2) 818 3822 the region E-mail: [email protected] Darena Martinova - Editor-in-Chief [email protected] % (+359 2) 818 3828 Marketing & Distribution Dept. 22 Innovation opportunities for the SEE industry through Mirena Russeva - Head of Department % (+359 2) 818 3812 transnational cooperation E-mail: [email protected] Advertising & Communications Marieta Krasteva % (+359 2) 818 3820 Petya Naydenova % (+359 2) 818 3810 24 Solar systems and components manufacturers in South- Anna Nikolova % (+359 2) 818 3811 Galina Petkova % (+359 2) 818 3815 East Europe - part II Gabriela Ivanova % (+359 2) 818 3813 Publishing House 104, Acad. Ivan Geshov Blvd., 30 SEE Exhibitions entr. A, office 9, 1612 Sofia, Bulgaria % (+359 2) 818 3838, Fax: (+359 2) 818 3800 E-mail: [email protected] www.SEE-industry.com 2 south-east european INDUSTRIAL MARKET south-east european INDUSTRIAL MARKET 3 SEE ELECTRONICS HSIC versus USB A look at the advantages of HSIC over USB and the connection procedures that are involved Andrew Rogers, USB software stacks and USB protocol knowledge as clean as if probed properly from one side. The ideal bases can be quickly transitioned to HSIC. would be to probe simultaneously from both ends. A se- Microchip Technology Inc. ries protocol analyser may be able to sample the signals The high-speed inter-chip (HSIC) interface is becom- Data sampling accurately in both directions, but the 10cm trace length ing more popular due to its notable advantages over With standard USB, every data packet begins with a restriction makes this option impractical. USB for hard-wired inter-chip applications. The interface sync pattern to allow the receiver clock to synchronise is a two signal, source synchronous interface that can with the phase of the incoming data. The differential sign Making the connection provide USB high-speed data at 480Mbit/s. The data of the D+/D- signal is then sampled according to the sync The HSIC interface is structured such that a host or pe- transfers are 100% host driver compatible with tradition- pattern. HSIC uses a separate strobe line to tell the re- ripheral can be powered on in any order. To ensure a false al USB topologies. Full-speed (FS) and low-speed (LS) ceiver when to sample the incoming data. The HSIC data connection is not detected, the host, hub and peripherals are not supported by the format, however a hub with signal is sampled at the rising and falling edges of the must ensure that the strobe or data lines do not float to an HSIC can provide FS and LS support. strobe signal. If the strobe and data signals become undetermined value, commonly referred to as tri-stated. The interface differs from USB in the physical layer skewed for any reason, the sampled data may become Fig. 4 shows an oscilloscope capture of a connect se- only. Significant features include no chirp protocol, corrupted. The HSIC Electrical Specification defines the quence. This connect sequence is much simpler than the source-synchronous serial data transmission and no hot maximum allowable skew as 15ps. USB connect sequence because there are no speeds to removal or attach as the interface is always connected. To make sure skew does not become an issue, the negotiate. This sequence can be handled by a very sim- It has 1.2V signal levels designed for low-power applica- HSIC traces must be kept as short as possible and must ple state machine, reducing die size requirements. tions at standard LV CMOS levels. Maximum trace not be longer than 10cm. The data and strobe traces length is 10cm. must be the same length and they should be routed to The protocol for data transactions between host and 50W single-ended impedance. device via HSIC is the same as USB, as shown in Fig. 1. To illustrate the amount of skew possible in the real world, Fig. 2 shows the beginning of a test packet transmitted from a host to a device with equal lengths. Fig. 4: The connect sequence from idle and sus- pend to connecting and resuming signalling With standard USB, the host can determine if a down- stream port has been disconnected by monitoring the magnitudes of the DP/DM signal voltages. If the voltage Fig. 2: Equal HSIC trace lengths exceeds the disconnect voltage threshold, the host can conclude that the device has been disconnected. HSIC The same packet transmitted from the same host with does not support a disconnect protocol because it is in- a strobe trace that is about 10cm longer than the data tended to be a hard-wired, always on connection. How- trace is shown in Fig. 3. The resulting skew is about half ever, it is still possible to have a situation where a down- of a nanosecond. This is an extreme example, but the stream device may appear to have disconnected, and results suggest that even a small amount of length mis- care must be taken to ensure the host does not perma- match may result in an HSIC specification violation. nently lose its connection with the device. This apparent disconnection or standoff can occur be- cause the host always maintains an idle state while the bus is unused, and the idle state is identical to the sus- Fig. 1: Data packet transferred from host to pend state from a signal perspective. The host has no device way of knowing if or when a downstream device has The primary difference is that all information is been powered down or disconnected. Since the suspend transmitted via a single data line, and a strobe signal signalling is identical to the idle signalling, it is possible communicates when to sample the received data sig- to reach a state where a downstream device believes it nal. HSIC uses double data rate (DDR) signalling; is has been suspended while the upstream host thinks data are sampled at both the rising and falling edges there is no device downstream and waits indefinitely for of the strobe signal. The strobe signal oscillates at a a connect signal to arrive. A similar standoff condition frequency of 240MHz, which provides a total data rate could occur if the upstream host disables the port while of 480Mbit/s. the device believes it has been suspended. This condition is not likely to occur between hosts and Advantages over USB Fig. 3: Strobe trace 10cm longer than data trace devices that never cycle power or soft reset. If this issue As mentioned, HSIC has significant advantages over is encountered it must be dealt with in an application USB. For a start, it is a fully digital standard and thus no The single-ended nature and differences in signal ter- specific manner at either the link or software stack level. analogue front end is required. The lack of an analogue mination cause some difficulties when attempting to This can be done by programming the software stack or front end means die sizes can be reduced, and thus so probe HSIC lines. Standard USB signals can be easily designing the link in a way that prevents the condition can cost. Additional die reduction can also be made due monitored and deciphered by placing a differential probe from occurring in the first place. Alternatively, the SoC to the decreased amount of digital logic required by the connected to an oscilloscope at either the transmitter can attempt to deal with a downstream device after it simplified connection protocol. side or receiver side. HSIC signals are more sensitive disconnects by resetting the HSIC hub. The device dis- The HSIC standard does not inherently reduce power and thus transmission line theory should be considered covery sequence will occur and the connection will be consumption, but the removal of the analogue front end when attempting to probe them. re-established. can lead to lower power designs, especially since ana- A good general guideline is to probe at the side oppo- On Microchip's USB254x, USB3613, USB3813, USB4604 logue circuitry does not necessarily scale one-to-one site to the source of the signal that needs to be observed. and USB4624 devices, the SoC can use the VBUS_- DET with digital circuits for reductions in process feature size. For instance, to observe the signals originating from a pin to re-establish the connection. Pulling the pin low sus- HSIC is especially low power when placed into the sus- device, place a probe at the host-side terminals. To ob- pends the hub while pulling the pin high will wake it up. pended state as there is no current draw on the strobe or serve the signals originating from a host, place the data lines.
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