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A Structured Approach to Microcomputer System Design

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A Structured Approach to Microcomputer System Design Behavior Research Methods & Instrumentation 1976, Vol. 8 (2), 123-128 A structured approach to microcomputer system design KEN McKENZIE Intel Corporation. Santa Clara, California .95053 A simple "building block" philosophy for construction of high-performance microcomputer-based systems utilizing I/O functional definition and a structured implementation of MOS/LSI semiconductor devices. The wide acceptance of the microcomputer as a DEFINITION OF SYSTEM ARCHITECTURE practical tool for on-line computation and dedicated control applications has drastically altered the manner in The heart of any structured philosophy is the disci­ which today's design engineer approaches a new project. pline upon which the system is based. In a microcom­ The traditional circuit by circuit analysis is no longer puter system, this discipline is referred to as the system necessary or desirable. A total systems approach of bus. Basically, it is a group of interconnections that closely studying each I/O device and its interface in con­ carry the total information transfer from one device in junction with the desired performance level of the over­ the system to another. All system devices, central pro­ all system then, by selectingthe proper MaS/LSI devices cessing unit, memory. and I/O, intercommunicate over and writing the support software, produces an efficient, the system bus. modular design. In the 8080 microcomputer system (see Figure I), The purpose of this paper is to show how a building the system bus is broken down into three major groups: block approach to both hardware and software will Data bus is the bus upon which all data flows in effect system design, introduce the latest MaS/LSI de­ the system. It is bi-directional in nature, allowing both vices, ami familiarize the uninitiated engineer with basic read and write operations to utilize the same bus. microcomputer terminology and jargon. Address bus: When the CPU wishes to read or write to a The structured philosophy presented here is based on specific memory or I/O device, it issues a unique binary the 8080 Microcomputer System (MCS-80), Intel Cor­ value (address) on the address bus. Control bus: The poration, Santa Clara, California.' collection of timing signals that gates data on and off of HOLD REO INT k----------------------------, ROY 8080A CPU :r;?~ ~~~"fs::'1 8702A 8302 8'012 8102A-4 - 8107B-4 8704 ROMs 8308 RAMs II 8205 8UFFERS/ I 8'11·2 8210 I DECODER I lL8~1~ (OP2:.I~~~..J 8708 8316A 8102-2 5101 8222 DATA BUS 181 U vel II V D II {t rr:=r CONTROL BUS 161 LCIIU LI I I Il ~ 8251 110 82'2 8214 \10 PRIORITY PERIPHERAL COMMUNICATION 8255 8212 INTERRUPT INTERFACE INTERFACE Figure 1. Microcomputer system (courtesy of Intel Corporation, Santa Clara, California). 123 124 McKENZIE PAc, LSB Table I PA, MCS-80 Component Family* PA2 PA, Part No. Function PA. 8080A CPU MODE0 PAs 8224 Clock Generator (OUTPUTI PAs 12-BIT 8228 System Controller PA., D-A ANALOG OUTPUT CONVERTER r- 8212 Byte I/O pc. (DAel 8251 Communication Interface Pes 8255 Programmable I/O PC, 8253 Programmable Interval Timer 8255 PC, MSB 8257 Programmable DMA Controller 8259 Programmable Interrupt Controller STB DATA PC, OUTPUTEN *MCS-80 uses standard semiconductor memory components. BIT SET/RESET be implemented using a family of bus-compatible, micro­ PC2 SAMPLE EN rPC, STB computer, peripheral components. PB. LSB I/O DEVICE INTERFACE PB, 8-BIT A-D PH, CONVERTER ANALOGINPUT lADe) MODE 0 PB, -- As in any computer-based system, the microprocessor (INPUT) PB. must be able to communicate with devices or structures I'll,; that exist outside of its normal memory array. Devices PB, such as keyboards, switches, displays, floppy disks, ~ MSB printers, A/D-D/A converters, and other control Figure 2. Digital to analog; analog to digital (courtesy of Intel structures are used to input information into the micro­ Corporation, Santa Clara, California. processor and store or display results of the computa­ the data bus is called the control bus. These signals are tional activity (see Figures 2 and 3). precisely generated so that when the transfer occurs, the The basic operation of the I/O structure of a micro­ data is stable and no conflicts occur with other devices computer system can best be viewed as an array of single on the system bus. byte memory locations that can be read from or written The transfer of information over the system bus must into. Generally, there are special instructions within the abide by an established procedure, which is called basic repertoire to handle such transfers (IN, OUT). The protocol. Bus protocol dictates a sequence of events that CPU issues a unique binary code, corresponding to the any device on the system bus must follow for efficient particular I/O port with which it wishes to communi­ data transfer. The timing disciplines of the bus protocol cate. The data bus is made available to the selected establishes "windows" in which the peripheral device device, and the transfer occurs in accordance with the must respond with valid data or be prepared to accept discipline of the bus protocol. An array of switches, for valid data. There are auxiliary functions of the protocol example, can be monitored by the microprocessor by that can insert compensation factors into these timing simply assigning each switch as a single bit of an input windows, such as "wait states." Consequently, the "port." The CPU can then read the value of the switch protocol discipline is designed to contain a limited array under control of the system software. In turn, the degree of flexibility. microprocessor can output the results of its computation The establishment of a standard system bus architec­ to an array of lights so that it can be read and ture greatly simplifies the design of peripheral, semi­ interpreted by the system user. These simple examples conductor components for microcomputer systems. The are, of course, descriptive of only the most primitive I/O interface to the microprocessor-generated data, address, functions of a microcomputer system. More common and control buses remains identical, and only the I/O applications would be driving motors, scanning key­ individual component functions are subject to additional boards, and monitoring analog sensors. Quite often the circuit engineering. Besides timing (ac characteristics), microcomputer is required to communicate with other the system bus also defines de characteristics such as computer systems that are separated by a great distance. leakage, current drive, voltage levels, and capacitance. By converting parallel system data (bytes) to a serial An often underrated feature, inherent in a properly stream of data, the microcomputer system can use voice­ defined standard system bus, is overall system noise grade telephone lines for this communication. Special immunity. The real measure of cost effectiveness of any semiconductor devices are specifically designed to system is the amount of time that such a system can be handle both transmission and reception of serial operated and provide accurate information. By allowing formatted data; such a device is the Intel 8251 for adequate system tolerance to noise in the design of (Figure 4). the system bus, a high-performance, reliable system can The recent advances in MOS/LSI technology, mainly MICROCOMPUTER SYSTEM DESIGN 125 KE':BOARD PRINTER 00 000 DISPLAY 00 " 000 00 c-l.' WEIGHING 000 --- UNIT 00 ~IH11111 ~IHI 000 00 IinuuCiI I LJ I 1 I r------,I I OPTIONAl I INPUT INPUT DUTPUT OUTPU'- I INTERFACE "1 I INTERFACE" 1 INTERFACE "2 INTE RFACE"2 I I ~-- TT--..J I BOBO I~ ~ ItI It: CPU I I I '---- BUS CONTROL UNIT IfI 1: 1 PROGRAM DA'-A MEMORY MEMORY (PROMI (RAMI Figure 3. Data bus (courtesy of Intel Corporation, Santa Clara, California). N-channel MOS, has made dedicated peripheral and I/O comes logical to organize the systems and application device controllers an economic reality. The complex software into a straightforward, modular fashion, almost nature of modem peripheral equipment interface and "building block" software. The modular approach to the resultant software overhead has made the use of such software generation also yields inherent diagnostic equipment unattractive to the small system user. By de­ capabilities and greater responsibility. signing a certain amount of "intelligence" into the semi­ conductor components that interface such equipment to INTERRUPTS the microcomputer system, the amount of software over­ head can be significantly reduced and the number of The real efficiency of the microcomputer is directly chips decreased, often to a single LSI component. proportional to the amount of tasks it can assume with Naturally, all such components would have to be little or no effect on the total system throughput. The designed to the system bus specification for simple inter­ most common method for I/O management is the polled face, but beyond that, each MOS/LSI component be­ approach (Figure 5). Each I/O device in the system is comes a "building block" whose only difference to any periodically tested by the software to ascertain if it other "building block" in the I/O structure is its func­ needs servicing, commonly referred to as "polling" an tional definition. The system software also must undergo I/O device. It is easy to see that a significant portion of a change in philosophy. Each MOS/LSI peripheral com­ ponent can be programmed to support a variety of con­ CPU-DRIVEN MULTIPlEXOR figurations within its major functional definition. The cPU software must initialize such devices and supervise what­ r----- ever maintenance is required for their operation. It be- -);) \ 0 ADDRESS BUS A --" RAM 1/0111 f---- " CON'-ROl BUS DATA BUS ..J'-.. A --" ROM 1/012) r--- -v v v • i ! 8251 r---, g- '.
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