Microprocessors: from Basic Chips to Complete Systems
Total Page:16
File Type:pdf, Size:1020Kb
Load more
Recommended publications
-
Intel® IA-64 Architecture Software Developer's Manual
Intel® IA-64 Architecture Software Developer’s Manual Volume 1: IA-64 Application Architecture Revision 1.1 July 2000 Document Number: 245317-002 THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Intel® IA-64 processors may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800- 548-4725, or by visiting Intel’s website at http://developer.intel.com/design/litcentr. -
Microprocessors History of Computing Nouf Assaid
MICROPROCESSORS HISTORY OF COMPUTING NOUF ASSAID 1 Table of Contents Introduction 2 Brief History 2 Microprocessors 7 Instruction Set Architectures 8 Von Neumann Machine 9 Microprocessor Design 12 Superscalar 13 RISC 16 CISC 20 VLIW 23 Multiprocessor 24 Future Trends in Microprocessor Design 25 2 Introduction If we take a look around us, we would be sure to find a device that uses a microprocessor in some form or the other. Microprocessors have become a part of our daily lives and it would be difficult to imagine life without them today. From digital wrist watches, to pocket calculators, from microwaves, to cars, toys, security systems, navigation, to credit cards, microprocessors are ubiquitous. All this has been made possible by remarkable developments in semiconductor technology enabling in the last 30 years, enabling the implementation of ideas that were previously beyond the average computer architect’s grasp. In this paper, we discuss the various microprocessor technologies, starting with a brief history of computing. This is followed by an in-depth look at processor architecture, design philosophies, current design trends, RISC processors and CISC processors. Finally we discuss trends and directions in microprocessor design. Brief Historical Overview Mechanical Computers A French engineer by the name of Blaise Pascal built the first working mechanical computer. This device was made completely from gears and was operated using hand cranks. This machine was capable of simple addition and subtraction, but a few years later, a German mathematician by the name of Leibniz made a similar machine that could multiply and divide as well. After about 150 years, a mathematician at Cambridge, Charles Babbage made his Difference Engine. -
Appendix D an Alternative to RISC: the Intel 80X86
D.1 Introduction D-2 D.2 80x86 Registers and Data Addressing Modes D-3 D.3 80x86 Integer Operations D-6 D.4 80x86 Floating-Point Operations D-10 D.5 80x86 Instruction Encoding D-12 D.6 Putting It All Together: Measurements of Instruction Set Usage D-14 D.7 Concluding Remarks D-20 D.8 Historical Perspective and References D-21 D An Alternative to RISC: The Intel 80x86 The x86 isn’t all that complex—it just doesn’t make a lot of sense. Mike Johnson Leader of 80x86 Design at AMD, Microprocessor Report (1994) © 2003 Elsevier Science (USA). All rights reserved. D-2 I Appendix D An Alternative to RISC: The Intel 80x86 D.1 Introduction MIPS was the vision of a single architect. The pieces of this architecture fit nicely together and the whole architecture can be described succinctly. Such is not the case of the 80x86: It is the product of several independent groups who evolved the architecture over 20 years, adding new features to the original instruction set as you might add clothing to a packed bag. Here are important 80x86 milestones: I 1978—The Intel 8086 architecture was announced as an assembly language– compatible extension of the then-successful Intel 8080, an 8-bit microproces- sor. The 8086 is a 16-bit architecture, with all internal registers 16 bits wide. Whereas the 8080 was a straightforward accumulator machine, the 8086 extended the architecture with additional registers. Because nearly every reg- ister has a dedicated use, the 8086 falls somewhere between an accumulator machine and a general-purpose register machine, and can fairly be called an extended accumulator machine. -
Historical Perspective and Further Reading 162.E1
2.21 Historical Perspective and Further Reading 162.e1 2.21 Historical Perspective and Further Reading Th is section surveys the history of in struction set architectures over time, and we give a short history of programming languages and compilers. ISAs include accumulator architectures, general-purpose register architectures, stack architectures, and a brief history of ARMv7 and the x86. We also review the controversial subjects of high-level-language computer architectures and reduced instruction set computer architectures. Th e history of programming languages includes Fortran, Lisp, Algol, C, Cobol, Pascal, Simula, Smalltalk, C+ + , and Java, and the history of compilers includes the key milestones and the pioneers who achieved them. Accumulator Architectures Hardware was precious in the earliest stored-program computers. Consequently, computer pioneers could not aff ord the number of registers found in today’s architectures. In fact, these architectures had a single register for arithmetic instructions. Since all operations would accumulate in one register, it was called the accumulator , and this style of instruction set is given the same name. For example, accumulator Archaic EDSAC in 1949 had a single accumulator. term for register. On-line Th e three-operand format of RISC-V suggests that a single register is at least two use of it as a synonym for registers shy of our needs. Having the accumulator as both a source operand and “register” is a fairly reliable indication that the user the destination of the operation fi lls part of the shortfall, but it still leaves us one has been around quite a operand short. Th at fi nal operand is found in memory. -
Computers Shouldn't Be Limitations Advertising & Distribution a Handicap Is a Limitation
.. No. 48 July-August 1989 $3.95 T HE MICRO TECHN I CAL J 0 URN A L Tools For The Physically Impaired What's important to people who have handicaps? We asked them. (Their responses may surprise you.) The Adventure Begins page 8 Dallas Vordahl demonstrates what you can do with a computer, a mouthstick, and a very limited amount of head motion. Writing Software For page 16 The Blind Don' t exclude the blind from your next software package. File Transfer Via The page 20 Parallel Port The LIMBO Project page 28 Build a maze-running robot. And More ... Debugging A Processor page 44 Growing Your Own page 66 Software Business Great SOGs page 83 And Much, Much, More 07 a 7447019388 3 U[J!]£?[jj) J/@[J!]£? !fJ©llfU/5Ju O[jj)(]@ (j] /JJ@r:'.JQ£?fj[J!]O /LfI1@@£?(JJ(]@£?J/ (j][jj)@ @[jj)@]O[jj)QQ£?O[jj)@] (]@@ODDD Introducing ... The PC-LabCard Family Only from HSC Electronic Supply Digital 1/0 and Prototype Development IBM PC/XT/AT and it's Counter Card compatible models are moving into Card Industrial/Laboratory applications at • 32 Digital Input Channels • Large breadboard area (3290 holes) - TTL compatible an increasing rate. The reasons for • Independent memory and I/O address - Low loading: 0.2 rnA at O.4V input this include their price/performance decoders built-in • 32 Digital Output Channels ratio and short user learning curve. • Memory and I/O ports are jumper - TTL compatible PC-based data acquisition boards selectable - Driving capacity: Sink 24 rnA, are now taking the place of the • All bus signals are buffered, marked, source 15 rnA and ready for use • Intel 8253 Timer/Counter traditional data loggers or recorders - 3 channels of timer/counter which cost several times more. -
Appendix A: Microprocessor Data Sheets
Appendix A: Microprocessor Data Sheets Intel8085 Zilog Z80 MOS Technology 6502 Motorola 6809 Microcontrollers (Single-chip Microcomputers) Intel 8086 ( & 80186 & 80286) Zilog Z8000 Motorola 68000 32-bit Microprocessors lnmos Transputer 184 Appendix A 185 Intel 8085 Followed on from the 8080, which was a two-chip equivalent of the 8085. Not used in any home computers, but was extremely popular in early (late 1970s) industrial control systems. A15-A8 A B c D E Same register AD7-ADO H L set is used in SP 8080 PC ALE Flags Multiplexed d ata bus and lower half of address bus (require 8212 to split data and address buses) Start addresses of Interrupt P/Os Service Routines: 8155- 3 ports, 256 bytes RAM RESET-()()()(J 8255 - 3 ports TRAP- 0024 8355 - 2 ports, 2K ROM RST5.5- 002C 8755 - 2 ports, 2K EPROM RST6.5 - ()(J34 RST7.5- <XJ3C INTR - from interrupting device Other 8251- USART 8202 - Dynamic RAM controller support 8253- CTC (3 counters) 8257 - DMA controller devices: 8271 - FDC 8257 - CRT controller Intel DMA Control System Character CPU buses de-multiplexed Video signal to CRT 186 Microcomputer Fault-finding and Design Zilog Z80 Probably the most popular 8-bit microprocessor. Used in home computers (Spectrum, Amstrad, Tandy), office computers and industrial controllers. A F A' F' B c B' C' D E D' E' H L H' L' 8 data Interrupt Memory lines vector I refresh R Index register IX Index register IY (to refresh dynamic RAMI Stack pointer Based on the Intel 8085, but possesses second set of registers. -
8253/8253·5 Programmable Interval Timer
TABLE OF CONTENTS HOW TO CONFIGURE YOUR SYSTEM SUPPORT 1 IN UNDER 5 MINUTES, WITHOUT READING THE MANUAL • • •• 5 Other options and jumpers ••••• 6 Important note about system memory 6 ABOUT SYSTEM SUPPORT 7 Technical overview • 7 CONFIGURING THE SYSTEM SUPPORT 1 9 Setting I/O address 9 Setting memory address •• 10 Other memory options • • • • • • • • • 11 Disabling the memory • • 11 Global/extended address selection 11 Phantom* response options •••• 12 Battery back-up for CMOS RAM • • 12 Wait states ••••••••••• 12 Using higher speed 9511A or 9512 • 13 Interrupt jumpers and options 13 Using a 9511 or 9512 with interrupts 15 Interval timer options • • • • • • • 15 Configuring the serial channel • • • • 16 Other miscellaneous hardware options 17 Connecting the battery • • • • 18 Mounting the battery holder 18 Replacing the battery • • • • • 18 I/O port map • • • • • • • • 19 PROGRAMMING CONSIDERATIONS FOR THE SYSTEM SUPPORT 1 20 Power-up initialization • • • • 20 Programming the serial channel 20 UART initialization • • • • • • • • • • 25 Sample UART program • • • • • 25 Programming the real time clock • • • • 26 Clock programming sequence • • • • 28 Sample clock program • • • • • • • • • • 29 Programming the interrupt controllers 35 Important note about using DDT to debug interrupts 35 "INTEL 8259A Programmable Interrupt Controller". 36 Initializing the 8259A • • • • • • • • • • • 56 Routine for initializing master/slave 8259As 56 Disabling the 8259As •••••••••••• 57 Programming the interval timer. • • • • • • •••• 58 "INTEL 8253/8253-5 -
15 Pecision System Clock Architecture
Pecision System Clock Architecture 15 Pecision System Clock Architecture “Time iz like money, the less we hav ov it teu spare the further we make it go.” Josh Billing Encyclopedia and Proverbial Philosophy of Wit and Humor, 1874 225 Pecision System Clock Architecture Limitations of the Art Over the almost three decades that NTP has evolved, accuracy expectations have improved from 100 ms to less than 1 ms on fast LANs with multiple segments interconnected by switches and less than a few milliseconds on most campus and corporate networks with multiple subnets interconnected by routers. Today the practical expectations with a GPS receiver, PPS signal and precision kernel support are a few microseconds. In principle the ultimate expectations are limited only by the 232-ps resolution of the NTP timestamp format or about the time light travels three inches. Improving accuracy expectations below the PPS regime is proving intricate and tricky. In this chapter we turn to the most ambitious means available to minimize errors in the face of hardware and software not designed for extraordinary timekeeping. First we examine the hardware and software components for a precision system clock and evolve an optimal design. Next we survey timestamping techniques using both hardware, driver and software methods to minimize errors due to media, device and operating system latencies. Finally, we explore the IEEE 1588 Precision Time Protocol (PTP), how it is used in a high speed LAN, and how it and NTP can sail in the same boat. The parting shots section proposes a hardware assisted design which provides performance equivalent to PTP with only minimal modifications to the Unix operating system kernel. -
Programmable Digital Microcircuits - a Survey with Examples of Use
- 237 - PROGRAMMABLE DIGITAL MICROCIRCUITS - A SURVEY WITH EXAMPLES OF USE C. Verkerk CERN, Geneva, Switzerland 1. Introduction For most readers the title of these lecture notes will evoke microprocessors. The fixed instruction set microprocessors are however not the only programmable digital mi• crocircuits and, although a number of pages will be dedicated to them, the aim of these notes is also to draw attention to other useful microcircuits. A complete survey of programmable circuits would fill several books and a selection had therefore to be made. The choice has rather been to treat a variety of devices than to give an in- depth treatment of a particular circuit. The selected devices have all found useful ap• plications in high-energy physics, or hold promise for future use. The microprocessor is very young : just over eleven years. An advertisement, an• nouncing a new era of integrated electronics, and which appeared in the November 15, 1971 issue of Electronics News, is generally considered its birth-certificate. The adver• tisement was for the Intel 4004 and its three support chips. The history leading to this announcement merits to be recalled. Intel, then a very young company, was working on the design of a chip-set for a high-performance calculator, for and in collaboration with a Japanese firm, Busicom. One of the Intel engineers found the Busicom design of 9 different chips too complicated and tried to find a more general and programmable solu• tion. His design, the 4004 microprocessor, was finally adapted by Busicom, and after further négociation, Intel acquired marketing rights for its new invention. -
Operating RISC: UNIX Standards in the 1990S
Operating RISC: UNIX Standards in the 1990s This case was written by Will Mitchell and Paul Kritikos at the University of Michigan. The case is based on public sources. Some figures are based on case-writers' estimates. We appreciate comments from David Girouard, Robert E. Thomas and Michael Wolff. The note "Product Standards and Competitive Advantage" (Mitchell 1992) supplements this case. The latest International Computerquest Corporation analysis of the market for UNIX- based computers landed on three desks on the same morning. Noel Sharp, founder, chief executive officer, chief engineer and chief bottle washer for the Superbly Quick Architecture Workstation Company (SQAWC) in Mountain View, California hoped to see strong growth predicted for the market for systems designed to help architects improve their designs. In New York, Bo Thomas, senior strategist for the UNIX systems division of A Big Computer Company (ABCC), hoped that general commercial markets for UNIX-based computer systems would show strong growth, but feared that the company's traditional mainframe and mini-computer sales would suffer as a result. Airborne in the middle of the Atlantic, Jean-Helmut Morini-Stokes, senior engineer for the UNIX division of European Electronic National Industry (EENI), immediately looked to see if European companies would finally have an impact on the American market for UNIX-based systems. After looking for analysis concerning their own companies, all three managers checked the outlook for the alliances competing to establish a UNIX operating system standard. Although their companies were alike only in being fictional, the three managers faced the same product standards issues. How could they hasten the adoption of a UNIX standard? The market simply would not grow until computer buyers and application software developers could count on operating system stability. -
143847-003.Pdf
iSBC® 88/25 SINGLE BOARD COMPUTER 8-Bit 8088 Microprocessor Operating at Programmable Synchronousl • 5 MHz • Asynchronous RS232C Compatible One Megabyte Addressing Range Serial Interface with Software • Selectable Baud Rates Two iSBXTM Bus Connectors • 24 Programmable Parallel I/O Lines Optional Numeric Data Processor with • • iSBC® 337 MUL TIMODULETM Processor Two Programmable 16-Bit BCD or • Binary Timers/Event Counters 4K Bytes of Static RAM; Expandable • On-Board to 16K Bytes 9 Levels of Vectored Interrupt Control, • Expandable to 65 Levels Sockets for up to 64K Bytes of JEDEC • 24/28-Pin Standard Memory Devices; • MUL TIBUS® Interface for Multimaster Expandable On-Board to 128K Bytes Configurations and System Expansion Development Support with Intel's iPDS, • Low Cost Personal Development System, and EMV-88 Emulator The iSBC 88/25 Single Board Computer is a member of Intel's complete line of OEM microcomputer systems which take full advantage of Intel's technology to provide economical, self-contained, computer-based solu tions for OEM applications. The iSBC 88/25 board is complete computer system on a single 6.75 x 12.00-in. printed circuit card. The CPU, system clock, read/write memory, nonvolatile read only memory, I/O ports and drivers, serial communications interface, priority interrupt logic and programmable timers, all reside on the board. The large control storage capacity makes the iSBC 88/25 board ideally suited for control-oriented applications such as process control, instrumentation, industrial automation and many others. 143847-1 September 1987 3-63 Order Number: 143847-003 infef iSBC® 88/25 FUNCTIONAL DESCRIPTION ASCII data, and iterative word and byte string manip ulation functions. -
APPLICATION NOTE Ap·113
APPLICATION Ap·113 NOTE February 1981 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein. Intel software products are copyrighted by and shall remain the property of Intel Corporation. Use, duplication or disclosure is subjectto restrictions stated in Intel's software license, or as defined in ASPR 7-104.9 (a) (9). Intel Corporation a!=;sumes no resDonsibilitv for the use of anv circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Intel Corporation. The following are trademarks of Intel Corporation and may only be used to identify Intel products: BXP Intelevision MULTIBUS* CREDIT Intellec MULTIMODULE i iSBC Plug-A-Bubble ICE iSBX PROMPT ICS Library Manager Promware im MCS RMX Insite Megachassis UPI Intel Micromap ~Scope System 2000 and the combinations of ICE, iCS, iSBC, MCS or RMX and a numerical suffix. MDS is an ordering code only and is not used as a product name or trademark. MDS® is a registered trademark of Mohawk Data Sciences Corporation. *MULTIBUS is a patented Intel bus. Additional copies of this manual or other Intel literature may be obtained from: Intel Corporation Literature Department SV3-3 3065 Bowers Avenue Santa Clara, CA 95051 © INTEL CORPORATION, 1981 AFN-013008-1 Ap·113 Getting Started With Contents the Numeric Data INTRODUCTION Processor iAPX 86,88 Base .............................