REVERSE COSTING® – STRUCTURAL, PROCESS & COST REPORT
3D NAND FLASH MEMORIES Comparison of Leading Edge 3D NAND Memories TOSHIBA-SanDisk /SAMSUNG/SK HYNIX/INTEL- MICRON Memory report by Belinda Dube December 2018
22 Bd. Benoni Goullin 44200 NANTES - FRANCE +33 2 40 18 09 16 [email protected] www.systemplus.fr Table of Contents
Overview / Introduction 4 o SK Hynix 80 o Executive Summary Synthesis o Reverse Costing Methodology Die design Company Profile 8 Cross-Section o Toshiba/SanDisk Patents o Samsung o SK Hynix o Intel/ Micron 110 o Micron/Intel Synthesis Die design Cross-Section Technology & Market 8 o NAND Roadmap Patents o NAND Revenue Manufacturing Process Flow 146 o Global Overview Physical Analysis 14 o Wafer Fabrication Unit o Toshiba Synthesis of the Physical Analysis o Front-End Process o Toshiba Physical Analysis Methodology o Toshiba Physical analysis Cost Analysis 179 Die o Synthesis of the cost analysis Cross-Section Yields Explanation & Hypotheses o Toshiba Patents NAND wafer and die cost o Samsung Synthesis of the Physical Analysis 53 Front-End Cost o Samsung Physical Analysis Methodology Component Cost o Samsung Physical analysis Die Estimated Price and Manufacturer Gross Margin 228 Cross-Section Company services 239 o Samsung Patents Executive Summary
Overview / Introduction o Executive Summary The memory semiconductor industry continues to grow due to higher memory demand in consumer electronics and o Reverse Costing Methodology mass storage. Remarkable investments are channeled into the memory manufacturing business. IoT escalates this o Glossary demand and hence manufacturers continue to increase the die density of memories at the same time aiming on Company Profile reduction of the NAND die. The manufacturing process is complex compared to most semiconductor products. Each manufacturer proposes different manufacturing techniques with each generation in order to lower the wafer Physical Analysis manufacturing by reducing the patterning count and cost. Manufacturing Process Flow This report details each process and features found in the latest NAND Memories. This full reverse costing study has
Cost Analysis been conducted to provide insight on technology data, detailed analysis of microstructural features, wafer manufacturing cost and die selling price of the latest LEADING EDGE 3D NAND MEMORIES produced by the four top Estimated Price Analysis manufacturers in the NAND memory industry. Related Reports Toshiba/SanDisk, Samsung , Micron/Intel have produced 64 Layers in their latest 3D NAND and SK Hynix have the About System Plus highest number of layers in their NAND Memory having 72 layers in their latest 3D NAND.
Based on complete teardown analyses of the 3D, the reports provide the physical analysis and detailed manufacturing methods and cost estimation of each 3D NAND wafer. Comparison is made on the technology used, feature differences and the wafer fabrication technics used by each manufacturer and their estimated cost.
Moreover, the report proposes a comparison of the four different NAND memories, highlights the differences in design and manufacturing process.
All the 3D NAND memory manufacturers use the 12 inch wafer (300mm). Executive Summary
Overview / Introduction o Executive Summary o Reverse Costing Methodology o Glossary
Company Profile
Physical Analysis
Manufacturing Process Flow
Cost Analysis
Estimated Price Analysis
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About System Plus Toshiba NAND- Packaging (with mesurements) Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus Toshiba NAND - Multiple Layer Etch Overview / Introduction Company Profile Technology and market Physical Analysis Dielectric support pillar : o NAND Synthesis o Toshiba/SanDisk Synthesis • o Toshiba/SanDisk Package High Aspect Ratio etching is perfomed o Toshiba/SanDisk Physical through dielectric material oxide and Analysis alternating stack o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis • The opening extending through the o Samsung Package o Samsung Physical Analysis terrace is filled with SiO2 o Samsung Patent o Samsung Outline o SK Hynix Synthesis • This support pillar is useful in providing o SK Hynix Package mechanical support to the terrace o SK Hynix Physical Analysis o SK Hynix Patent structure to avoid collapse during SiN wet o SK Hynix Outline etching. o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Channel Hole Analysis o Intel/Micron Patent • High Aspect Ratio etch is also perfomed in o Intel/Micron outline creation, of channel hole and memory o Comparison slits. Manufacturing Process Flow Cost Analysis Estimated Price Analysis Cell Vertical structure (full view) –SEM ©2018 by System Plus Consulting Related Reports About System Plus Toshiba NAND- Logic Area : Transistor Technology Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package 620nm o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis 320nm o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent 620nm o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus Samsung Memory- Memory Cross section- staircase Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus NAND Memory Staircase ©2018 by System Plus Consulting Samsung Memory- Memory Cross section- staircase Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus SK Hynix Memory- Effective unit Area Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus Intel/Micron Memory- Double stack technic Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus Die comparison Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus Physical analysis summary Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus Physical analysis summary -staircase Overview / Introduction Company Profile Technology and market Physical Analysis o NAND Synthesis o Toshiba/SanDisk Synthesis o Toshiba/SanDisk Package o Toshiba/SanDisk Physical Analysis o Toshiba/SanDisk Patent o Toshiba Outline o Samsung Synthesis o Samsung Package o Samsung Physical Analysis o Samsung Patent o Samsung Outline o SK Hynix Synthesis o SK Hynix Package o SK Hynix Physical Analysis o SK Hynix Patent o SK Hynix Outline o Intel/Micron Synthesis o Intel/Micron Package o Intel/Micron Physical Analysis o Intel/Micron Patent o Intel/Micron outline o Comparison Manufacturing Process Flow Cost Analysis Estimated Price Analysis Related Reports About System Plus SK Hynix- Bit line contact and bit line Overview / Introduction
Company Profile
Technology and market
Physical Analysis
Manufacturing Process Flow o Toshiba Overview o Toshiba Front-End Process o Samsung Overview o Samsung Front End process o SK Hynix Overview o SK Hynix Front End Process o Intel/Micron Overview o Intel/Micron Front End Process o Comparison
Cost Analysis
Estimated Price Analysis
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About System Plus Intel/Micron – First deck: channel hole and slit formation Overview / Introduction
Company Profile
Technology and market
Physical Analysis
Manufacturing Process Flow o Toshiba Overview o Toshiba Front-End Process o Samsung Overview o Samsung Front End process o SK Hynix Overview o SK Hynix Front End Process o Intel/Micron Overview o Intel/Micron Front End Process o Comparison
Cost Analysis
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About System Plus Memory – CMOS and Last Metal Layers Front End Cost Overview / Introduction Company Profile Technology and market Physical Analysis Manufacturing Process Flow Cost Analysis o Synthesis o Toshiba/SanDisk Supply Chain/Yield o Toshiba/SanDisk Wafer & Die Cost o Toshiba/ SanDisk Package Cost o Toshiba/SanDisk Back-End Cost o Toshiba/SanDisk Component Cost o Synthesis o Samsung Supply Chain/Yield o Samsung Wafer & Die Cost o Samsung Package Cost o Samsung Back-End Cost o Samsung Component Cost o Synthesis o SK Hynix Supply Chain/Yield o SK Hynix Wafer & Die Cost o SK Hynix Package Cost o SK Hynix Back-End Cost o SK Hynix Component Cost o Synthesis o Intel/Micron Supply Chain/Yield o Intel/Micron Wafer & Die Cost o Intel/Micron Package Cost o Intel/Micron Back-End Cost o Intel/Micron Component Cost
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About System Plus Memory 3D Front-End Cost Overview / Introduction Company Profile Technology and market Physical Analysis Manufacturing Process Flow Cost Analysis o Synthesis o Toshiba/SanDisk Supply Chain/Yield o Toshiba/SanDisk Wafer & Die Cost o Toshiba/ SanDisk Package Cost o Toshiba/SanDisk Back-End Cost o Toshiba/SanDisk Component Cost o Synthesis o Samsung Supply Chain/Yield o Samsung Wafer & Die Cost o Samsung Package Cost o Samsung Back-End Cost o Samsung Component Cost o Synthesis o SK Hynix Supply Chain/Yield o SK Hynix Wafer & Die Cost o SK Hynix Package Cost o SK Hynix Back-End Cost o SK Hynix Component Cost o Synthesis o Intel/Micron Supply Chain/Yield o Intel/Micron Wafer & Die Cost o Intel/Micron Package Cost o Intel/Micron Back-End Cost o Intel/Micron Component Cost
Estimated Price Analysis
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About System Plus Memory Wafer & Die Cost Overview / Introduction Company Profile Technology and market Physical Analysis Manufacturing Process Flow Cost Analysis o Synthesis o Toshiba/SanDisk Supply Chain/Yield o Toshiba/SanDisk Wafer & Die Cost o Toshiba/ SanDisk Package Cost o Toshiba/SanDisk Back-End Cost o Toshiba/SanDisk Component Cost o Synthesis o Samsung Supply Chain/Yield o Samsung Wafer & Die Cost o Samsung Package Cost o Samsung Back-End Cost o Samsung Component Cost o Synthesis o SK Hynix Supply Chain/Yield o SK Hynix Wafer & Die Cost o SK Hynix Package Cost o SK Hynix Back-End Cost o SK Hynix Component Cost o Synthesis o Intel/Micron Supply Chain/Yield o Intel/Micron Wafer & Die Cost o Intel/Micron Package Cost o Intel/Micron Back-End Cost o Intel/Micron Component Cost
Estimated Price Analysis
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About System Plus Memory : Packaging Cost Overview / Introduction Company Profile Technology and market Physical Analysis Manufacturing Process Flow Cost Analysis o Synthesis o Toshiba/SanDisk Supply Chain/Yield o Toshiba/SanDisk Wafer & Die Cost o Toshiba/ SanDisk Package Cost o Toshiba/SanDisk Back-End Cost o Toshiba/SanDisk Component Cost o Synthesis o Samsung Supply Chain/Yield o Samsung Wafer & Die Cost o Samsung Package Cost o Samsung Back-End Cost o Samsung Component Cost o Synthesis o SK Hynix Supply Chain/Yield o SK Hynix Wafer & Die Cost o SK Hynix Package Cost o SK Hynix Back-End Cost o SK Hynix Component Cost o Synthesis o Intel/Micron Supply Chain/Yield o Intel/Micron Wafer & Die Cost o Intel/Micron Package Cost o Intel/Micron Back-End Cost o Intel/Micron Component Cost
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About System Plus Wafer Cost Comparison- Medium Yield
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About System Plus Die Cost Comparison- Medium Yield
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Cost Comparison o Wafer Cost o Die Cost o CMOS o NAND Memory Cells o Top metallization o Cost/Gb
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About System Plus CMOS Cost Comparison
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Cost Comparison o Wafer Cost o Die Cost o CMOS o NAND Memory Cells o Top metallization o Cost/Gb
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About System Plus Related Reports
Overview / Introduction
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Technology and market REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING MARKET AND TECHNOLOGY REPORTS - YOLE DÉVELOPPEMENT
Physical Analysis IC MEMORY • Toshiba-SanDisk 3D NAND Flash • Emerging Non-Volatile Memory 2018 Manufacturing Process Flow
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About System Plus REVERSE COSTING® – STRUCTURE, PROCESS & COST REPORT
Leading-edge 3D NAND Memory Comparison 2018 A deep technology analysis and cost comparison report on cutting edge 3D NAND memory chips from Toshiba/SanDisk, Samsung, SK Hynix and Intel/Micron.
The ever-growing markets for consumer We also identify the different participants electronics and data centers are in the supply chain. These two activities accelerating the demand for higher- allow us to simulate the cost of the capacity, reliable storage. This explains memory wafers and dies. the impressive revenue growth in the memory industry from $77 billion to $177 The report contains a detailed study of billion between 2016 and 2018. the latest NAND dies. The analysis also features a detailed study of die cross Manufacturers of flash memory that uses section and processes. The report details 3D NAND gates find it a challenge to meet the physical analysis, highlighting the cell this demand for higher storage capacity design and memory storage type. It and reliability while lowering the cost per matches the process description with the bit. Each manufacturer therefore applicable patent. The report also implements different techniques. They includes the manufacturing cost analysis change the storage type and memory cell and estimation of the manufacturers design and stack more layers with each Gross Margin. generation to increase bit density and reduce die sizes. The technological Finally, it features an exhaustive changes in the cell architecture and comparison between the studied samples, modification of the fundamental memory highlighting the similarities and Title: Leading-edge features add complexity to the differences and their impact on cost. manufacturing process. However these 3D NAND Memory l Comparison 2018 techniques do lower the cost per COMPLETE TEARDOWN WITH gigabyte. • Detailed optical and scanning Pages: 245 We present a technological and electron microscope photos and Date: December economical comparison of latest cross-sections 2018 generation of 3D NAND flash memory • Precise measurements Format: available on the market today from four • Material analysis different manufacturers. These are the PDF & Excel file • 64-layer designs from Toshiba/SanDisk, Manufacturing process flow Price: Samsung and Intel/Micron and the 72- • Supply chain evaluation EUR 4,990 layer 3D NAND by SK Hynix. We base our • Manufacturing cost analysis analysis on full teardowns of the packages • and the 3D NAND dies to unveil the Comparison technology choices used by the • Estimated sales price manufacturers.
IC – LED – RF – MEMS – IMAGING – PACKAGING – SYSTEM – POWER - MEMORY - DISPLAY LEADING-EDGE 3D NAND MEMORY COMPARISON 2018
TABLE OF CONTENTS
Overview/Introduction • SK Hynix • Executive Summary o Overview • Reverse Costing Methodology o Die design • Analysed Device Comparison o Cross-section Company Profile o Patents • Toshiba/SanDisk/Samsung/SK • Micron/Intel Hynix/Intel/Micron o Overview Technology and Market o Die design • NAND Roadmap o Cross-section • NAND Revenue o Patents Physical Analysis Manufacturing Process Flow • Toshiba/SanDisk • Overview o Overview • Wafer Fabrication Unit o Die design • Front-End Process o Cross-section Cost Analysis o Patents • Summary of the Cost Analysis • Samsung • Yield Explanations and Hypotheses o Overview • 3D NAND Wafer and Die Cost o Die design o Cross-section o Wafer front-end cost o Patents o Die cost o Component cost Estimated Price and Gross Margin Analysis AUTHORS
Belinda Dube is working for System Véronique Le Troadec has joined Plus Consulting as Analyst in System Plus Consulting as a Semiconductor Memories and laboratory engineer. Coming from Integrated Circuits. She holds a Atmel Nantes, she has extensive Masters degree in Nano Science knowledge in failure analysis of and Nanotechnologies from Ecole components and in deprocessing of Central Lyon and INSA Lyon. integrated circuits.
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