Nanotechnology 101 Series

Transistors 101

Mark Lundstrom Purdue University Network for Computational Nanotechnology West Lafayette, IN USA

NCN www.nanohub.org 1 what to transistors do?

2 Field-Effect Transistor Lillienfield, 1925 Heil, 1935

Bardeen, Schockley, and Brattain, 1947

“The transistor was probably the most important invention of the 20th century,”

Ira Flatow, Transistorized! www.pbs.org/transistor 3 transistors integrated circuit Intel 4004

Kilby and Noyce (1958, 1959) Hoff (1971)

• junction transistor, 1951 • commercial IC’s, 1961 • silicon BJT, 1954 • PMOS IC’s, 1963 ~2000 transistors • MOSFET, 1960 • CMOS invented, 1963 • NMOS IC’s, 1970

4 silicon microelectronics

Silicon wafer (300 mm)

Silicon “chip” (~ 2 cm x 2 cm)

MPU ROM

DSP Control logic RAM analog

Intel TI cell phone chip 5 Transistor scaling

~ L

Each technology generation: (scaling) L " L 2 A " A 2

Number of transistors per chip doubles (Moore’s Law)

! ! 6 Moore’s Law

http://public.itrs.net/ > - - ) > -

10 10000 s - r ) e s t n e o r m c o i

1 1000 n m a (

n ( e z e i z s i

s e 0.1

100 r e u r t u a t e nanoelectronics a F 0.01 10 e F 70 80 90 00 10 20

Year-->

L = 6 nm (IBM, 2002) L = 5 nm (NEC, 20703) applications

symbol switch amplifier

D D

D

G G G S

S S

8 EE fundamentals

1) Voltage 2) Current 3) Resistance 4) I-V characteristics resistor voltage source current source

5) Metals, insulators, and semiconductors

9 voltage

potential energy = mgh

h FG

ground

10 voltage

+ + + + + + + + + + + + + + ++ V = E d Volts d electric field, E force F = qE

------ground: V = 0

potential energy: E = qE d Joules

11 voltage

+

V = 1.5 V I

-

12 current I

+ + + + + + + + + ++

I

------

Q I = C/sec = amperes "

13

! resistance

R I resistance (ohms W)

14 current-voltage characteristic

decreasing R I

increasing R

V

V Ohm’s Law: I = R 15

! ideal voltage source

I I

+ V LOAD V 0- 0 V

16 ideal current source

+ I I 0

+ LOAD V I0 - V

-

17 transistor

I D + ?

VDS G V VGS S -

18 metal

I

• good conductors Au Ag • resistance low

Cu • conduction by electrons

19 insulator

I

glass • very poor conductors quartz • resistance very high SiO2

20 semiconductor

I

Si resistance greater than a Ge metal (~ 1 W) but less than an insulator (~ 106 W) GaAs

21 semiconductor doping

I intrinsic semiconductor: e.g. pure Si

doped semiconductor: < 1% ‘impurities’ Si p-type: boron impurities conduction by + charges

n-type: phosphorus impurities

conduction by - charges22 EE fundamentals

√ 1) Voltage √ 2) Current √ 3) Resistance √ 4) I-V characteristics resistor voltage source current source

√ 5) Metals, insulators, and semiconductors

23 building a transistor

n+ poly Si

SiO2

p-type silicon

24 building a transistor source gate drain

n+ poly Si

n+ Si

p-type silicon

25 S G D

26 transistor

- + VDS I D VG < VT source gate drain

n+ Si

p-type silicon 27 transistor

I D

VDS

28 transistor

- + VDS I D VG > VT source gate drain

n+ Si - -

p-type silicon 29 transistor

I D

VDS

30 transistor

- + VDS I D VG > VT source gate drain

+ - - n Si -- -

p-type silicon 31 transistor: a voltage controlled resistor?

I D increasing VG

VDS

32 real transistors

VGS

G + + + + - - - - ID S D

VDS VDS

33 real transistors

VGS ID ID VGS

VDS VDS

34 real transistors

V ID GS

G

S D

VDS

VDS

why does the current saturate? 35 MOSFET energy band diagrams

electron energy vs. position

S G D VD≈ 0V

VD= VDD E = -q V

36 low VDS

I1 I2 I1, I2 ~ VG

ID = I1 - I2

VD = 0: I1 = 12 ID = 0

ID VD > 0: VG2 I1 > 12 V G1 ID > 0

37 VDS high VDS

I1 I2 I1, ~ VG I2 ~ 0

I D I = I ~ V VG2 D 1 G

VG1

38 VDS complementary CMOS

VDD

P-channel MOSFET

VOUT VIN

N-channel MOSFET

39 CMOS

G G S D S D n+ Si p+ Si

p-type silicon n-type silicon

n-MOS: VGS > 0 p-MOS: VGS < 0

40 CMOS inverter

VDD

VDD

P > - -

T

V U

OUT O

VIN V

V N DD VIN-->

“transfer characteristic”

41 CMOS inverter

ID

VDD > - -

T U O V

VDD V --> IN VDS flatter characteristic sharp transition (small dependence of I on V ) separates zero and one D DS gives sharp transition 42 Two input CMOS NAND gate

V AND dd A B C 0 0 0

0 1 0 P1 P2 1 0 0 V 1 1 1 Cout V A N1 in1 NAND A B C

V 0 0 1 Bin2 N2 0 1 1 1 0 1 1 1 0 43 CMOS Amplifier

VDD

gain VDD >

- v

- out

VOUT T U

VIN O V

VDD

VIN--> vin

44 transistors

terminal 1 point contact transistor bipolar transistor I1 MOSFET JFET SOI MOSFET FinFET control MODFET (HEMT) heterojunction bipolar transistor velocity modulation transistor terminal 2

45