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Compact High Performance Analog Cmos Baseband Design Solutions for Multistandard Wireless Transceivers

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Compact High Performance Analog Cmos Baseband Design Solutions for Multistandard Wireless Transceivers COMPACT HIGH PERFORMANCE ANALOG CMOS BASEBAND DESIGN SOLUTIONS FOR MULTISTANDARD WIRELESS TRANSCEIVERS DISSERTATION Presented in Partial Fulfillment of the Requirements for the Degree Doctor of Philosophy in the Graduate School of The Ohio State University By Seok-Bae Park, B.S., M.S. ***** The Ohio State University 2006 Dissertation Committee: Approved by Mohammed Ismail El-Naggar, Adviser Patrick Roblin Adviser Steven B. Bibyk Graduate Program in Electrical and Computer Engineering c Copyright by Seok-Bae Park 2006 ABSTRACT In this dissertation, a novel compact wireless radio transceiver architecture reusing a baseband chain so as to significantly reduce the die area is proposed. The proposed architecture employs a direct conversion architecture with a shared base- band chain and is suitable for wireless standards based on time-division duplexing air interface. In direct conversion architectures, baseband channel selection filters and variable gain amplifiers are placed in the receive path as well as in the transmit path. Here, it is proposed to use the same baseband filters and variable gain amplifiers in both the receive path and the transmit path to reduce the die area. To realize a high performance direct conversion receiver for multistandard wireless communications, the limiting factors in the direct conversion receiver should be identified and removed. In this dissertation, among many problems in direct conversion receivers, the DC offset problem is addressed. The origins of the DC offset are summarized, and three self-mixing mechanisms generating the DC offset are modeled to understand how the static and dynamic DC offsets are produced from the mechanisms. A DC offset cancellation scheme consisting of a static DC offset canceller and a dynamic DC offset canceller is proposed. For the static DC offset canceller, a DC feedback loop is proposed to use and verified through simulation, fabrication, and measurement. A novel dynamic DC offset canceller utilizing an adaptive filtering technique is also proposed and verified through simulation. ii An analog baseband chain for the proposed compact wireless transceiver is designed in this dissertation. A fully balanced differential difference amplifier is de- signed as a core amplifier to be used in both a baseband filter and a variable gain amplifier. A fully differential Sallen-Key channel selection filter and a fully differential variable gain amplifier using attenuators which can be shared for both the transmit path and the receive path are designed. A DC feedback loop is designed to cancel the static DC offset. This baseband chain is realized in a 0.5 μm standard CMOS process and verified through simulation, fabrication, and measurement. iii This is dedicated to my parents and my wife . iv ACKNOWLEDGMENTS First of all, I deeply thank Prof. Mohammed Ismail, my advisor, for giving me a chance to join the Analog VLSI Lab., for his invaluable advice on my research and my future, for his constant guidance and numerous discussions on my dissertation research, and for all the support and opportunities. I heartily thank Prof. Patrick Roblin and Prof. Steven Bibyk for being on my dissertation committee. I greatly appreciate their kindness and their precious time for me. I thank Eisenhower National Clearinghouse (ENC) and Semiconductor Re- search Corporation (SRC) for their financial support throughout my graduate stud- ies. I express my special thanks to Karen Abhari and Roger Cunningham at ENC for their giving me opportunities. I also thank many members of the Analog VLSI Lab. for numerous technical discussions, inspiration, and help. From the bottom of my heart, I thank my parents, my sisters, and my wife, Yonghee, for their love, encouragement, guidance, and support. v VITA May 1967 ...................................Born- Pusan,Korea February 1991 ..............................B.S.ElectricalEngineering, Seoul National University, Seoul, Korea August 1994 . .............................M.S.ElectricalEngineering, Seoul National University, Seoul, Korea December 2000 .............................M.S.ComputerEngineering, Ohio State University, Columbus, Ohio April 1998 - September 2005 ................GraduateResearchAssociate, Ohio State University, Columbus, Ohio PUBLICATIONS Research Publications Mohammed Ismail, Seok-Bae Park, Ayman A. Fayed, and R. F. Wassenaar, “Op- erational Transconductance Amplifiers”, Chapter 22, The VLSI Handbook,2ndEd., CRC Press, 2006. Seok-Bae Park and Mohammed Ismail, “A Reconfigurable CMOS Analog Baseband for Compact TDD Wireless Radio Transceivers”, Proc. of IEEE International Mid- west Symposium on Circuits and Systems (MWSCAS ’05), pp. 1386–1389, August 2005. Seok-Bae Park and Mohammed Ismail, “DC Offset Cancellation in Direct Conversion Multistandard Wireless Receivers”, Proc. of International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES ’05), pp. 947–951, June 2005. Seok-Bae Park, Hyang-Beom Lee, Il-Han Park, and Song-Yop Hahn, “Stator Slot Shape Design of Induction Motors for Iron Loss Reduction”, IEEE Transactions on Magnetics, Vol. 31, No. 3, pp. 2004–2007, May 1995. vi FIELDS OF STUDY Major Field: Electrical Engineering Studies in: Analog VLSI Prof. Mohammed Ismail El-Naggar RF and Microwave Prof. Patrick Roblin vii TABLE OF CONTENTS Page Abstract....................................... ii Dedication...................................... iv Acknowledgments.................................. v Vita......................................... vi ListofTables.................................... xi ListofFigures................................... xii Chapters: 1. Introduction.................................. 1 1.1MotivationandObjectives....................... 1 1.2OrganizationoftheDissertation................... 3 2. Wireless Receiver Architectures ....................... 4 2.1Introduction.............................. 4 2.2 Heterodyne Receiver Architecture . ................. 4 2.3 Direct Conversion Receiver Architecture ............... 5 2.4 Low-IF Receiver Architecture ..................... 7 2.5 Digital-IF Receiver Architecture . ................. 7 2.6Summary................................ 8 viii 3. CompactTDDWirelessTransceiverArchitecture............. 9 3.1Introduction.............................. 9 3.2TransceiverArchitectureDescriptionandDesignIssues....... 12 3.3Summary................................ 16 4. DC Offset Problem in Direct Conversion Receivers ............ 17 4.1Introduction.............................. 17 4.2DCOffsetModeling.......................... 19 4.2.1 DCOffsetGeneration..................... 19 4.2.2 DCOffsetModel........................ 21 4.3 DC Offset Cancellation for Multistandard Receivers . ...... 27 4.3.1 StaticDCOffsetCancellation................. 29 4.3.2 DynamicDCOffsetCancellation............... 31 4.4DynamicDCOffsetCancellationUsingAdaptiveFiltering..... 32 4.4.1 AdaptiveFilteringTechniques................. 32 4.4.2 AdaptiveDynamicDCOffsetCancellation.......... 35 4.4.3 SimulationStudies....................... 37 4.5Summary................................ 40 5. DesignofAnalogBasebandPrototype................... 46 5.1Introduction.............................. 46 5.2FullyBalancedDifferentialDifferenceAmplifier........... 46 5.2.1 CircuitImplementation.................... 49 5.2.2 SimulationResults....................... 53 5.3ChannelSelectionFilter........................ 60 5.3.1 FullyDifferentialSallen-KeyLowPassFilter........ 60 5.3.2 SimulationResults....................... 62 5.3.3 MeasurementResults..................... 72 5.4StaticDCOffsetCancellationusingDCFeedbackLoop...... 78 5.4.1 DCFeedbackLoopDesign................... 78 5.4.2 SimulationResults....................... 80 5.4.3 MeasurementResults..................... 81 5.5VariableGainAmplifiers........................ 88 5.5.1 Fully Differential Variable Gain Amplifier Using Attenuators 89 5.5.2 SimulationResults....................... 91 5.5.3 MeasurementResults..................... 93 5.6Summary................................ 104 ix 6. Conclusion................................... 105 6.1ContributionoftheDissertation.................... 105 6.2FutureWork.............................. 107 Appendices: A. WirelessCommunicationStandards..................... 108 B. MatLabCodes................................ 112 Bibliography.................................... 117 x LIST OF TABLES Table Page 4.1MaximumDopplershift......................... 25 5.1 Performance of the fully balanced differential difference amplifier . 60 5.2 Performance of the fully differential sixth-order Sallen-Key low pass filter 65 5.3Performanceofthefullydifferentialvariablegainamplifier...... 93 A.13GStandards............................... 109 A.2WirelessLANStandards......................... 110 xi LIST OF FIGURES Figure Page 2.1Heterodynearchitecture......................... 5 2.2Directconversionarchitecture...................... 6 2.3Low-IFarchitecture............................ 7 2.4Digital-IFarchitecture.......................... 8 3.1Diephotoexamplefrom[1]....................... 10 3.2Diephotoexamplefrom[2]....................... 11 3.3Directconversiontransceiverarchitecture................ 13 3.4CompactTDDwirelessradiotransceiverarchitecture......... 13 3.5 Reconfigurable compact TDD wireless radio transceiver architecture . 14 4.1Spectrumfordirectconversion...................... 18 4.2GenerationofDCoffsetsduetoself-mixing............... 20 4.3 I-branch of direct conversion receivers . ................. 22 4.4 Self-mixing models in direct conversion receivers ............ 24 4.5MultistandardDCRwithDCoffsetcancellation...........
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