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Information to Users INFORMATION TO USERS This manuscript has been reproduced from the microfilm master. UMI films the text directly from the original or copy submitted. Thus, some thesis and dissertation copies are in typewriter face, while others may be from any type of computer printer. The quality of this reproduction is dependent upon the quality of the copy subm itted. Broken or indistinct print, colored or poor quality illustrations and photographs, print bleedthrough, substandard margins, and improper alignment can adversely affect reproduction. In the unlikely event that the author did not send UMI a complete manuscript and there are missing pages, these will be noted. Also, if unauthorized copyright material had to be removed, a note will indicate the deletion. Oversize materials (e.g., maps, drawings, charts) are reproduced by sectioning the original, beginning at the upper left-hand comer and continuing from left to right in equal sections with small overlaps. Photographs included in the original manuscript have been reproduced xerographicaliy in this copy. Higher quality 6” x 9" black and white photographic prints are available for any photographs or illustrations appearing in this copy for an additional charge. Contact UMI directly to order. ProQuest Information and Learning 300 North Zeeb Road, Ann Arbor, Ml 48106-1346 USA 800-521-0600 UMI* CMOS DIGITALLY PROGRAMMABLE ANALOG FRONT-ENDS FOR THIRD GENERATION WIRELESS APPLICATIONS DISSERTATION Presented in Partial Fulfillment of the Requirements for the Degree Doctor of Philosophy in the Graduate School of The Ohio State University By Hassan Elwan, B.S., M.S. ***** The Ohio State University 2001 Dissertation Committee: Approved by Mohammed Ismail, Adviser Patrick Roblin Adviser George Valeo Department of Electrical Engineering UMI Number 3022479 UMI UMI Microform 3022479 Copyright 2001 by Bell & Howell Information and Learning Company. All rights reserved. This microform edition Is protected against unauthorized copying under Title 17, United States Code. Bell & Howell Information and Leaming Company 300 North Zeeb Road P.O. Box 1346 Ann Arbor, Ml 48106-1346 ABSTRACT The wireless communication market has experienced rapid growth over the past few years. The introduction of digital data communication with digital signal pro­ cessing created the base for the development of numerous wireless standards and apphcations ranging from cellular and cordless phones to short range Home RF and bluetooth technologies. The demand for low power, low cost, universal wireless devices calls for the development of a single-chip third-generation (3G) receiver capable of adapting to the various communications standards in a low cost CMOS technology. However, fully integrated receiver architectures require the elimination of discrete high-Q image-rejection and IF filters. Thus the received signal is down-converted to baseband without channel filtering which most frequently results in the presence of strong adjacent channel blockers along with the desired signal. Therefore, it is required that the baseband filter and amplifier design exhibit high-dynamic range, programmable bandwidth to accommodate different standards, precise tuning to se­ lect the desired channel within a standard, low power and small chip area. The work presented in this thesis focuses on the reafization of a digitally programmable base­ band analog front end for use in various integrated multi-standard third generation wireless receivers. In chapter 2 a baseband chain for a receiver designed to support both the GSM and DECT standards is developed.The chain offers a digitally con­ trollable filter bandwidth, VGA gain setting as well as DC-offset compensation. A ii new low power low noise CMOS buffer circuit is used to realize the programmable anti aliasing filter section. The use of a single class AB buffer to realize a third order filter leads to a power efficient realization that exhibits good linearity and noise per­ formance. The work also investigates the potential use of a Norton transresistance amplifier to realize digitally controlled variable gain amplifiers for integrated wireless receivers. A new low voltage CMOS realization for the Norton amplifier is proposed. The circuit utilizes class AB techniques to provide controllable low power standby current consumption. It is shown that the extension of the Norton amplifier to han­ dle fully differential signals reduces errors resulting from the finite input resistance of the virtual ground nodes and does not require accurate matching in the current follower. The VGA circuit offers digitally controlled offset trimming by utilizing a compact current division network. Experimental results from test chips fabricated through MOSIS indicate that the proposed baseband chain meets the requirements for the multi-standard receiver. The use of class AB digitally programmable circuits leads to a power efficient flexible circuit solution. Chapter 3 investigates the design of a CMOS low power baseband chain for an in­ tegrated Bluetooth receiver. The chain is designed using a new fully differential buffer (FDB) circuit that can effectively implement filters with gain/filtering interleaved op­ erations. The baseband chain utilizes five FDB circuits to implement a 6th order low noise high linearity pre-filter, a 6th order MOS-C tunable filter and a variable gain amplifier (VGA). The distribution of gain and filtering between the various blocks simplifies the design of the VGA stages and allows a good compromise between the input referred noise and the overall linearity. The chain is fabricated using a regular 1.2/xm CMOS process and occupies an area of 1.7mmX1.7mm. Measurement results 111 indicate that the total standby current consumption is less than 2.4mA whUe provid­ ing a gain control range from 12dB to 30dB in 6dB step. The chain achieves an input referred noise less than 44nV/Vfl^ and an out of band IIP3 of more than 12dBm. Chapter 4 discusses modular 3G baseband building blocks with a focus on the design of a reconfigurable baseband chain that precedes the analog-to-digital converter (ADC) of a multi-standard fully integrated wireless receiver. The circuits proposed retain flexibility and simplicity of design and are designed using the same active element. Using those circuits a baseband chain that can be digitally reconfigured is implemented. The baseband chain is adapted to accommodate the GSM, IS-95 and WCDMA wireless standards. The proposed approach enables the development of highly programmable, flexible and upgradable baseband circuits with a short design cycle. Finally, in chapter 5, the development of low power switched capacitor circuits is investigated. Those circuits are essential for the design of low power data converters used in almost every wireless receiver. New techniques and circuits for designing low power switched capacitor circuits are investigated. The limitations of regular OTA based switched capacitor circuits are highlighted. A number of new low voltage class AB CMOS OTA realizations are then given. The first proposed circuit utilizes a new class AB input stage to achieve low power consumption and high current drive capa­ bility. Focus is then set to develop a programmable OTA circuit that can be utilized in multi-standard data converters and amplifiers. The OTA is digitally programmable and can oflfer non slew rate limited performance with low power consumption. By ap­ propriately programming the OTA, a constant settling time and power consumption can be achieved for a wide variation of the load capacitance value. Finally the design IV of low noise, low power OTA circuits is investigated. A new power efficient slew rate enhancing technique is proposed. The technique can be applied to any operational transconductance amplifier and allows the slew rate to be controlled independently of the linear settling characteristics of the OTA. The added circuitry does not affect the noise performance or the open loop gain of the original OTA. Experimental and simulation results are included. ACKNOWLEDGMENTS First I praise and thank Allah the all mighty who provided me with patience and provision to complete my PH.D. successfully. I would like to thank all my family members for their tolerance, support encouragement and patience. It is my honor to acknowledge the support of my advisor Dr. Mohammed Ismail. His suggestions and constructive comments proved invaluable. Throughout the preparation of this work I have enjoyed the close collaboration with a number of people who I feel fortunate to count both as colleagues and friends. I would like to Thank Hussein A1 Zaher for all the useful discussions and help he provided. Special thanks also to all my friends at Cairo University, Egypt. Although we are separated by thousands of miles their encouragement, support and comments were very much useful. I would hke to particularly thank Dr. Ahmed Soliman for all his efforts and help. His remarks inspired and continue to inspire many useful ideas. VI VITA January 20, 1971 .................................................Born - Cairo, Egypt 1994 ....................................................................... B.S. Electrical Engineering {Magna Cum Laude) Cairo University, Egypt. 1997 ....................................................................... M.S. Electrical Engineering Cairo university, Egypt. 1997-present .........................................................Graduate Research Associate, The Ohio State University. PUBLICATIONS Research Publications H. Elwan,
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