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Investigating CMOS Amplifier Design Using The Investigating CMOS Amplifier Design Using the Degrees of Design Freedom Method Euisoo Yoo Department of Electrical and Computer Engineering McGill University Montr´eal, Qu´ebec May 2009 A thesis submitted to McGill University in partial fulfilment of the requirements of the degree of Master of Engineering c Euisoo Yoo, 2009 ACKNOWLEDGEMENTS I’d like to start by thanking my supervisor, Professor Gordon Roberts, for the opportunity to conduct my research and design with him and the group in the MACS lab. With his enthusiasm, his inspiration, and his great efforts to explain things clearly and simply, he helped to make research fun for me. I learned a great deal under his supervision, which to me is so incredibly valuable. For this, I am eternally grateful. To all my friends at McGill, I thank you all for such a memorable experience. I will truly miss all of the interesting discussions, the all-nighters, and the pranks you pulled on me. They were certainly great times that I will never forget. I wish to thank my parents, my sister, my uncle, my aunt, my two cousins in Montr´eal for always being there. Finally, I thank the McGill staff for their support with departmental matters, keeping the servers alive and running, and for awards and financial support. - ii - ABSTRACT A design methodology based on generating the performance space of amplifiers by sweeping independent control variables has been investigated. The method is used to optimize the performance of CMOS amplifiers with respect to gain, bandwidth, noise, distortion and power directly in SPICE without the aid of mathematical mod- els or external software routines. The method works in all SPICE programs from Cadence to the student version of PSPICE. The technique is based on tuning the voltage of specific nodes of the amplifier using a self-biasing current source technique in conjunction with a replica amplifier circuit to span the entire performance space with a resolution of choice. The method has been tested with discrete implemen- tation of the design. Both single-stage and multi-stage amplifiers are considered in this work. The method is generic, and it can be easily extended onto any amplifier topology for any performance measure. - iii - ABREG´ E´ Une m´ethodologie de conception originale bas´ee sur la production de l’espace des performances des amplificateurs en balayant les variables de contrˆole ind´ependantes est examin´ee. Cette m´ethodologie peut optimiser des amplificateurs de CMOS par rapport au gain, `ala bande passante, au bruit, `ala d´eformation et `ala puissance. L’espace des performances est recherch´edirectement dans les logiciels SPICE sans l’aide d’aucun mod`ele math´ematique ou des logiciels externes. Cette m´ethode fonc- tionne dans tous les logiciels SPICE, allant de Cadence `ala version d’´etudiant de PSPICE. La technique est bas´ee sur la variation de tension dans des noeuds sp´ecifiques de l’amplificateur en utilisant une source de courante d´ependente et, en parrall`ele, un circuit d’amplificateur copie pour cr´eer l’espace des performances com- plet avec une r´esolution de choix. Cette m´ethodologie a ´et´etest´eavec les composantes s´epar´ees. Des amplificateurs `a´etage unique et `a´etages multiples sont consid´er´es dans ce travail. Cette m´ethode est g´en´erique, et elle peut ˆetre facilement appliqu´ee sur n’importe quelle topologie d’amplificateur pour n’importe quelle mesure de perfor- mance. - iv - CLAIMS OF ORIGINALITY This thesis contain the following original work • Investigation of the design by degrees of freedom method in the following am- plifier structures: common-source, common-gate, common-drain, differential amplifier dicussed in Chapter 4. • Separation of the node Vx in 1st and 2nd stage in master circuit of a multi-stage amplifier, using a different self-biased current source for each, to do DC biasing for each of the amplifier topologies in Chapter 5. • Partial space exploration approach to multi-stage amplifier design (cascaded amplifier) and MATLAB program to do semi-automated partial space explo- ration discussed in subsection 5.1.1. • Divide and conquer approach to multi-stage amplifier design (two-stage opamp) discussed in subsection 5.1.2. • Control variable reduction approach to multi-stage amplifier design (folded cascode op amp) discussed in subsection 5.1.3. • Extension of design by degrees of freedom method to a fully-differential ampli- fiers discussed in section 5.5. • Design verification using discrete electronics described in Chapter 6. -v- TABLE OF CONTENTS ACKNOWLEDGEMENTS ............................ ii ABSTRACT .................................... iii ABREG´ E......................................´ iv CLAIMSOFORIGINALITY ........................... v LISTOFTABLES ................................. viii LISTOFFIGURES ................................ xi 1 Introduction.................................. 1 1.1 Motivation............................... 1 1.2 ThesisStructure............................ 3 2 Background on CMOS Amplifier Design . 5 2.1 Classical Analog Design Overview . 5 2.1.1 CMOStechnology ....................... 7 2.1.2 WhyIntegrated?........................ 7 2.1.3 WhatisanAmplifier?..................... 8 2.1.4 PerformanceMetrics . 9 2.2 Stateoftheart ............................ 21 2.2.1 gm/ID SynthesisApproach . 22 2.2.2 Computer-Aided Design based on Geometric Programming 27 2.2.3 Limitations........................... 29 2.3 Summary ............................... 31 3 Design by Degrees of Freedom . 32 3.1 Design by Degrees of Freedom Method . 32 3.2 Independent Control Variables . 33 3.3 Self-Biased Current Source Circuit . 38 3.4 Master-SlaveArrangement . 44 - vi - 3.5 Performance Simulation and Data Mining . 46 3.6 Summary ............................... 49 4 Single-StageAmplifierDesign . 51 4.1 Common-SourceAmplifier . 51 4.2 Common-GateAmplifier ....................... 67 4.3 Common-DrainAmplifier. 69 4.4 DifferentialAmplifier ......................... 70 4.5 Summary ............................... 72 5 Multi-StageAmplifierDesign . 73 5.1 DesignHeuristics ........................... 73 5.1.1 Partial Space Exploration Approach . 74 5.1.2 Divide and Conquer Approach . 75 5.1.3 Control Variable Reduction Approach . 77 5.2 Cascaded Amplifier Configuration . 77 5.3 Two-StageOpAmpConfiguration. 82 5.4 Folded Cascode Op Amp Configuration . 90 5.5 Fully-Differential Design . 95 5.6 Comparisonofthethreemethods . 99 5.7 Summary ............................... 102 6 DesignVerification .............................. 103 6.1 Self-BiasedCurrentSource . 104 6.2 Common-SourceAmplifier . 107 6.3 Two-StageAmplifier ......................... 115 6.4 Summary ............................... 126 7 Conclusion................................... 127 A OCEANcode: ControlVariableSweep. 129 B MATLABcode: PartialSpaceExploration . 132 C MATLABcode:ProcessingWaveform . 139 References...................................... 140 - vii - LIST OF TABLES Table page 2–1 Node voltages and NMOS transistor’s region of operation. 12 3–1 Number of design variables in different amplifier topologies. 37 4–1 Trade-offsfortheCSAmplifier.. 67 4–2 Performance results for CS, CG, CD and DIFF amplifiers in CMOSP18 technology ................................ 67 4–3 Trade-offsfortheCGAmplifier. 69 4–4 Performance results for Vx=1.3V VoQ=1.1V Vp=0.7V Wn3=40µm Wp3=20µm Wp2=40µm Amplitude=100µV. .................... 69 4–5 Trade-offsfortheCDamplifier.. 69 4–6 Trade-offsfortheDIFFamplifier. 70 5–1 Trade-offs for the cascaded amplifier using partial space exploration method. ................................. 81 5–2 Performance results for Cascaded, Folded Cascode, and Fully Differen- tial Folded Cascode amplifiers in CMOSP18 technology . 82 5–3 Performance comparison between divide and conquer approach and traditionalsimulationapproach. 87 5–4 Performance comparison between compensated divide and conquer ap- proach and traditional simulation approach. 89 5–5 Trade-offs for the 1st stage of the 2-stage operational amplifier using divideandconquermethod. 90 5–6 Trade-offs for the 2nd stage of the 2-stage operational amplifier using divideandconquermethod. 90 - viii - 5–7 Trade-offs for the 2-stage operational amplifier using divide and con- quermethod. .............................. 91 5–8 Controlvariablereductionmethod.. 94 5–9 Trade-offs for the folded cascode amplifier using control variable reduc- tionmethod................................ 94 5–10 Trade-offs for the 1st stage of the fully-differential two-stage operational amplifierusingdivideandconquermethod. 97 5–11 Trade-offs of the fully-differential two-stage operational amplifier using divideandconquermethod. 98 5–12 Trade-offs for the fully-differential folded cascode amplifier using con- trolvariablereductionmethod.. 99 6–1 Performance measures for changing Vg for VoQ=0.6 N=1 P=1 VDD=4V.108 6–2 Performance measures for changing Vg for VoQ=0.6 N=1 P=1 VDD=1.2V.108 6–3 Performance measures for changing VoQ for Vg=2.97 N=1 P=1 VDD=1.2V.109 6–4 Performance measures for changing N for Vg=2.8 VoQ=0.5 P=1 VDD=4V.113 6–5 Performance measures for changing N for Vg=2.8 VoQ=0.5 P=1 VDD=1.2V.114 6–6 Performance measures for changing P for Vg=2.8 VoQ=0.7 N=1 VDD=4V.114 6–7 Performance measures for changing P for Vg=2.8 VoQ=0.7 N=1 VDD=1.2V.115 6–8 Performance measures for changing Vgd for VoQ=1.5 Vmid=2.825 Md=1 Mg=1Mp=1Mp2=1Mn2=1. 121 6–9 Performance measures for changing Md for Vgd=1 VoQ=1.5 Vmid=2.825 Mg=1Mp=1Mp2=1Mn2=1. 121 6–10 Performance measures for changing Mg for Vgd=1 VoQ=1.5 Vmid=2.825 Md=1Mp=1Mp2=1Mn2=1. 124 6–11 Performance measures for changing Mp for Vgd=1 VoQ=1.5 Vmid=2.825 Mg=1Md=1Mp2=1Mn2=1. 125 6–12 Performance measures for changing Mn2 for Vgd=1 VoQ=1.5 Vmid=2.825 Mg=1Mp=1Mp2=1Md=1.. 125 - ix - 6–13 Performance measures for changing Mp2 for Vgd=1 VoQ=1.5 Vmid=2.825 Mg=1Mp=1Md=1Mn2=1.. 126 -x- LIST OF FIGURES Figure page 2–1 Technology usage comparison. (Reference : Toshiba) . ... 8 2–2 Technology scaling down and integration of components onto a single chip.[1] ................................. 9 2–3 Performancetrade-off.[2]. 10 2–4 ID vs VDS for different VGS [3]....................... 12 2–5 Common-Source amplifier with Vgn and Vgp forbias..........
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