Cadence Design Systems, Inc

Cadence Design Systems, Inc. 2011 Annual Report Cadence is the global technology leader in software, hardware, IP, and services for electronic design automation (EDA) that is leading the transformation of the industry. By delivering crucial design technology for creating, integrating, and optimizing designs, Cadence enables customers to realize silicon chips, systems-on-chip devices, and complete systems at lower costs with higher quality. Lip-Bu Tan President and Chief Executive Offi cer DEAR SHAREHOLDERS: Last year I indicated that Cadence had turned the corner and was poised for success in 2011. I am proud to report that the Cadence team executed well in 2011 and achieved excellent results. Revenue grew 23% to $1.15 billion, operating profi tability signifi cantly improved, and operating cash fl ow increased 21% to $240 million. Growth was driven by expanded adoption of our existing products, introduction of exciting new products, and successful collaboration with industry leaders that demonstrated the increasing power of our strategy and technology. We continue to gain momentum, and I look forward to Cadence achieving even more success in 2012. This is an exciting time to be in the SoC Realization today is based on selecting leading fabless semiconductor companies, electronics industry. Dynamic markets like and integrating components of intellectual foundries, and IP providers. A great those for mobile devices, video, and cloud property (IP). In this area, Cadence offers example was the collaboration between computing are experiencing rapid growth. differentiated, high-performance IP for Cadence and the leading IP company and An explosion in the number of devices that memory, storage, and connectivity – the leading foundry on the fi rst run “apps” such as smart phones and serving the high-growth mobile, video, 20-nanometer test chip for a new tablet computers is driving an application- and network markets, in particular. For embedded processor design. The success driven approach to design, as described in example, we offer proven, reliable IP for of this project was a testament to both the the EDA360 vision for the industry that we DDR and Flash memory, Ethernet, and PCI increased capabilities of our technology published nearly two years ago. To serve Express interfaces. In 2011 we introduced and our strong customer focus. the increasingly complex design needs and IP for several emerging standards, Our fi nancial results and position ever-shrinking time-to-market including Wide I/O memory, which will be strengthened in 2011. We ended the year requirements of these application-driven used in the 3D integrated circuits that will with $602 million of cash, an increase of designs, we strengthened our Silicon populate next-generation mobile devices. $44 million after funding increased Realization solutions in core EDA and Our System Realization solutions span the investment in R&D, acquisitions, capital expanded our offerings in SoC (system-on- system design cycle, from early expenditures, and the retirement of $150 chip) Realization and System Realization – architectural level software development million of convertible notes. With an all delivering on the vision of EDA360. through system validation, prototyping ongoing focus on effi ciency, we made In the Silicon Realization area Cadence is and circuit board layout. These solutions excellent progress in 2011 towards well-positioned to benefi t from high- help customers develop software and reaching the longer-term profi tability growth end markets, as we provide the hardware concurrently to meet aggressive goals we have set for ourselves. We will leading solutions for mixed-signal and time-to-market objectives. During 2011 continue to make investments in R&D and low-power design, which are vital for we introduced two new products for acquired technology to meet our mobile devices. Our digital implementation virtual system modeling and FPGA-based customers’ needs and to drive our growth. solution has proven highly effective for rapid prototyping; both are quickly The foundation for many of the business designing the largest and fastest chips at gaining traction with early adopters. improvements mentioned above is a more the most advanced process nodes. In 2011 These build on the continuing success of fundamental change at Cadence – a it was adopted by several of the largest the Cadence Verifi cation Computing transformed corporate culture. Working semiconductor companies and used by Platform, which speeds verifi cation of together, we are nurturing a challenging, industry leaders to design chips for the today’s increasingly complex systems. And rewarding, customer-focused corporate latest 20-nanometer semiconductor our solutions for designing chip packages culture that I believe will drive our processes. Together with our market- and circuit boards serve a wide spectrum continuing success in 2012 and beyond. leading custom/analog design solution, of customers in mil/aero, networking, these tools form the industry’s leading medical, automotive, consumer, and other Sincerely, integrated mixed-signal design platform. growing market segments. Our solutions for functional verifi cation, Modern electronic design increasingly which ensure that designs meet product relies on an ecosystem of partners for requirements before they are success. Cadence made great strides in manufactured, experienced broader and 2011 to strengthen collaboration with deeper customer adoption in 2011. Lip-Bu Tan UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 FORM 10-K (Mark One) È ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the fiscal year ended December 31, 2011 ‘ TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the transition period from to . Commission file number 0-15867 CADENCE DESIGN SYSTEMS, INC. (Exact name of registrant as specified in its charter) Delaware 77-0148231 (State or Other Jurisdiction of (I.R.S. Employer Incorporation or Organization) Identification No.) 2655 Seely Avenue, Building 5, San Jose, California 95134 (Address of Principal Executive Offices) (Zip Code) (408) 943-1234 (Registrant’s Telephone Number, including Area Code) Securities registered pursuant to Section 12(b) of the Act: Title of Each Class Names of Each Exchange on which Registered Common Stock, $0.01 par value per share NASDAQ Global Select Market Securities registered pursuant to Section 12(g) of the Act: None Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes [ X ] No [ ] Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes [ ] No [ X ] Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes [ X ] No [ ] Indicate by check mark whether the registrant has submitted electronically and posted on its corporate Web site, if any, every Interactive Data File required to be submitted and posted pursuant to Rule 405 of Regulation S-T (§ 232.405 of this chapter) during the preceding 12 months (or for such shorter period that the registrant was required to submit and post such files). Yes [ X ] No [ ] Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. [ ] Indicate by check mark whether the registrant is a large accelerated filer, an accelerated filer, a non-accelerated filer, or a smaller reporting company. See the definitions of “large accelerated filer,” “accelerated filer,” and “smaller reporting company” in Rule 12b-2 of the Exchange Act. (check one): Large accelerated filer [ X ] Accelerated filer [ ] Non-accelerated filer [ ] Smaller reporting company [ ] (Do not check if a smaller reporting company) Indicate by check mark whether the registrant is a shell company (as defined in Rule 12b-2 of the Act). Yes [ ] No [ X ] The aggregate market value of the voting and non-voting common equity held by non-affiliates computed by reference to the price at which the common equity was last sold as of the last business day of the registrant’s most recently completed second fiscal quarter ended July 2, 2011 was $2,874,022,123. On February 4, 2012, approximately 273,972,723 shares of the Registrant’s Common Stock, $0.01 par value, were outstanding. DOCUMENTS INCORPORATED BY REFERENCE Portions of the definitive proxy statement for Cadence Design Systems, Inc.’s 2012 Annual Meeting of Stockholders are incorporated by reference into Part III hereof. CADENCE DESIGN SYSTEMS, INC. ANNUAL REPORT ON FORM 10-K FOR THE FISCAL YEAR ENDED DECEMBER 31, 2011 Table of Contents Page PART I. Item 1. Business ............................................................... 1 Item 1A. Risk Factors ............................................................ 9 Item 1B. Unresolved Staff Comments ................................................ 23 Item 2. Properties .............................................................. 23 Item 3. Legal

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