HD3SS214 8.1Gbps Displayport 1.4 2:1/1:2
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Product Order Technical Tools & Support & Folder Now Documents Software Community HD3SS214 SLAS907B –DECEMBER 2015–REVISED JUNE 2017 HD3SS214 8.1 Gbps DisplayPort 1.4 2:1/1:2 Differential Switch 1 Features 3 Description HD3SS214 is a high-speed passive switch capable of 1• Compatible with DisplayPort 1.4 Electrical Standard switching two full DisplayPort 4 lane ports from one of two sources to one target location in an application. It • 2:1 and 1:2 Switching Supporting Data Rates up will also switch one source to one of two sinks. For to 8.1 Gbps DisplayPort Applications, the HD3SS214 supports • Supports HPD, AUX and DDC Switching switching of the Auxiliary (AUX), Display Data • Wide Differential BW of 8 GHz Channel (DDC) and Hot Plug Detect (HPD) signals in the ZQE package. • Excellent Dynamic Electrical Characteristics • V Operating Range 3.3 V ±10% One typical application would be a mother board that DD includes two GPUs that need to drive one DisplayPort • Extended Industrial Temperature Range of sink. The GPU is selected by the Dx_SEL pin. -40°C to 105°C Another application is when one source needs to • 5 mm x 5 mm, 50-Ball ųBGA Package switch between one of two sinks, example would be a • Output Enable (OE) Pin Disables Switch to Save side connector and a docking station connector. The Power switching is controlled using the Dx_SEL and AUX_SEL pins. The HD3SS214 operates from a • Power Consumption single supply voltage of 3.3 V over extended – Active < 2 mW Typical industrial temperature range -40°C to 105°C. – Standby < 10 µW Typical (When OE = L) Device Information(1) 2 Applications PART NUMBER PACKAGE BODY SIZE (NOM) HD3SS214 • Notebook PCs µBGA (50) 5.00 mm x 5.00 mm HD3SS214I • Desktops/All-in-Ones (1) For all available packages, see the orderable addendum at • Docking Station the end of the data sheet. • Digital Television Simplified Schematic 5Ax(p) 4 5Cx(p) 5Ax(n) 4 4 5Cx(n) 4 Source A AUXAx 2 55CA 2 55CC DP Sink It5A 2 AUXCx 2 AUXBx It5C 2 55C. 2 It5. hE Source B 5x_SEL Control 5.x(p) AUX_SEL 4 5.x(n) 4 I53SS214 2:1 Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. HD3SS214 SLAS907B –DECEMBER 2015–REVISED JUNE 2017 www.ti.com Table of Contents 1 Features .................................................................. 1 7.3 Feature Description................................................... 9 2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 10 3 Description ............................................................. 1 8 Application and Implementation ........................ 11 4 Revision History..................................................... 2 8.1 Application Information............................................ 11 5 Pin Configuration and Functions ......................... 3 8.2 Typical Application ................................................. 11 6 Specifications......................................................... 5 9 Power Supply Recommendations...................... 16 6.1 Absolute Maximum Ratings ...................................... 5 10 Layout................................................................... 16 6.2 ESD Ratings.............................................................. 5 10.1 Layout Guidelines ................................................. 16 6.3 Recommended Operating Conditions....................... 5 10.2 Layout Example .................................................... 17 6.4 Thermal Information.................................................. 5 11 Device and Documentation Support ................. 19 6.5 Electrical Characteristics........................................... 6 11.1 Device Support .................................................... 19 6.6 Electrical Characteristics, Device Parameters .......... 6 11.2 Receiving Notification of Documentation Updates 19 6.7 Timing Requirements................................................ 7 11.3 Community Resources.......................................... 19 6.8 Typical Characteristics.............................................. 7 11.4 Trademarks ........................................................... 19 7 Detailed Description .............................................. 8 11.5 Electrostatic Discharge Caution............................ 19 7.1 Overview ................................................................... 8 11.6 Glossary ................................................................ 19 7.2 Functional Block Diagram ......................................... 9 12 Mechanical, Packaging, and Orderable Information ........................................................... 19 4 Revision History Changes from Revision A (July 2016) to Revision B Page • Changed Title and Feature From: DisplayPort 1.3 To: DisplayPort 1.4................................................................................. 1 Changes from Original (December 2015) to Revision A Page • Changed DC2(p) to DC2(n) in Pin Functions ......................................................................................................................... 4 • Changed DC2(n) to DC2(p) in Pin Functions ......................................................................................................................... 4 2 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated Product Folder Links: HD3SS214 HD3SS214 www.ti.com SLAS907B –DECEMBER 2015–REVISED JUNE 2017 5 Pin Configuration and Functions ZQE Package 50-ball (µBGA) Top View 1 2 3 4 5 6 7 8 9 A Dx_SEL VDD DA0(n) DA1(n) DA2(n) DA3(p) DA3(n) B DC0(n) DC0(p) GND DA0(p) DA1(p) DA2(p) OE DB0(p) DB0(n) C AUX_SEL GND D DC1(n) DC1(p) DB1(p) DB1(n) E DC2(n) DC2(p) DB2(p) DB2(n) F DC3(n) DC3(p) DB3(p) DB3(n) G GND GND H AUXC(n) AUXC(p) HPDB GND DDCCLK_B AUXB(p) GND DDCCLK_A AUXA(p) J HPDC HPDA DDCCLK_C VDD DDCDAT_B AUXB(n) DDCDAT_C DDCDAT_A AUXA(n) Not to scale Pin Functions PIN I/O DESCRIPTION(1) NO. NAME A1 Dx_SEL Control I High Speed Port Selection Control Pins A2,J4 VDD Supply 3.3 V Positive power supply voltage A4 DA0(n) I/O Port A, Channel 0, High Speed Negative Signal A5 DA1(n) I/O Port A, Channel 1, High Speed Negative Signal (1) The high speed data ports incorporate 20-kΩ pull down resistors that are switched in when a port is not selected and switched out when the port is selected. Copyright © 2015–2017, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: HD3SS214 HD3SS214 SLAS907B –DECEMBER 2015–REVISED JUNE 2017 www.ti.com Pin Functions (continued) PIN I/O DESCRIPTION(1) NO. NAME A6 DA2(n) I/O Port A, Channel 2, High Speed Negative Signal A8 DA3(p) I/O Port A, Channel 3, High Speed Positive Signal A9 DA3(n) I/O Port A, Channel 3, High Speed Negative Signal B1 DC0(n) I/O Port C, Channel 0, High Speed Negative Signal B2 DC0(p) I/O Port C, Channel 0, High Speed Positive Signal B3,C8,G2,G GND Supply Ground 8,H4,H7 B4 DA0(p) I/O Port A, Channel 0, High Speed Positive Signal B5 DA1(p) I/O Port A, Channel 1, High Speed Positive Signal B6 DA2(p) I/O Port A, Channel 2, High Speed Positive Signal Output Enable: B7 OE I OE = VIH: Normal Operation OE = VIL: Standby Mode B8 DB0(p) I/O Port B, Channel 0, High Speed Positive Signal B9 DB0(n) I/O Port B, Channel 0, High Speed Negative Signal C2 AUX_SEL Control I AUX/DDC Selection Control Pin in Conjunction with Dx_SEL Pin D1 DC1(n) I/O Port C, Channel 1, High Speed Negative Signal D2 DC1(p) I/O Port C, Channel 1, High Speed Positive Signal D8 DB1(p) I/O Port B, Channel 1, High Speed Positive Signal D9 DB1(n) I/O Port B, Channel 1, High Speed Negative Signal E1 DC2(n) I/O Port C, Channel 2, High Speed Negative Signal E2 DC2(p) I/O Port C, Channel 2, High Speed Positive Signal E8 DB2(p) I/O Port B, Channel 2, High Speed Positive Signal E9 DB2(n) I/O Port B, Channel 2, High Speed Negative Signal F1 DC3(n) I/O Port C, Channel 3, High Speed Negative Signal F2 DC3(p) I/O Port C, Channel 3, High Speed Positive Signal F8 DB3(p) I/O Port B, Channel 3, High Speed Positive Signal F9 DB3(n) I/O Port B, Channel 3, High Speed Negative Signal H1 AUXC(n) I/O Port C AUX Negative Signal H2 AUXC(p) I/O Port C AUX Positive Signal H3 HPDB I/O Port B Hot Plug Detect H6 AUXB(p) I/O Port B AUX Positive Signal H5 DDCCLK_B I/O Port B DDC Clock Signal H8 DDCCLK_A I/O Port A DDC Clock Signal H9 AUXA(p) I/O Port A AUX Positive Signal J1 HPDC I/O Port C Hot Plug Detect J2 HPDA I/O Port A Hot Plug Detect J3 DDCCLK_C I/O Port C DDC Clock Signal J5 DDCDAT_B I/O Port B DDC Data Signal J6 AUXB(n) I/O Port B AUX Negative Signal J7 DDCDAT_C I/O Port C DDC Data Signal J8 DDCDAT_A I/O Port A DDC Data Signal J9 AUXA(n) I/O Port A AUX Negative Signal 4 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated Product Folder Links: HD3SS214 HD3SS214 www.ti.com SLAS907B –DECEMBER 2015–REVISED JUNE 2017 6 Specifications 6.1 Absolute Maximum Ratings(1)(2) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT (3) Supply voltage range VDD –0.5 4 V Differential I/O –0.5 4 Voltage range V Control pin –0.5 VDD + 0.5 Continuous power dissipation See Thermal Information (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these