Integrated Variable Resistor Using Switched Capacitor Circuit and Voltage-Controlled Capacitor
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Switched-Capacitor Circuits
Switched-Capacitor Circuits David Johns and Ken Martin University of Toronto ([email protected]) ([email protected]) University of Toronto 1 of 60 © D. Johns, K. Martin, 1997 Basic Building Blocks Opamps • Ideal opamps usually assumed. • Important non-idealities — dc gain: sets the accuracy of charge transfer, hence, transfer-function accuracy. — unity-gain freq, phase margin & slew-rate: sets the max clocking frequency. A general rule is that unity-gain freq should be 5 times (or more) higher than the clock-freq. — dc offset: Can create dc offset at output. Circuit techniques to combat this which also reduce 1/f noise. University of Toronto 2 of 60 © D. Johns, K. Martin, 1997 Basic Building Blocks Double-Poly Capacitors metal C1 metal poly1 Cp1 thin oxide bottom plate C1 poly2 Cp2 thick oxide C p1 Cp2 (substrate - ac ground) cross-section view equivalent circuit • Substantial parasitics with large bottom plate capacitance (20 percent of C1) • Also, metal-metal capacitors are used but have even larger parasitic capacitances. University of Toronto 3 of 60 © D. Johns, K. Martin, 1997 Basic Building Blocks Switches I I Symbol n-channel v1 v2 v1 v2 I transmission I I gate v1 v p-channel v 2 1 v2 I • Mosfet switches are good switches. — off-resistance near G: range — on-resistance in 100: to 5k: range (depends on transistor sizing) • However, have non-linear parasitic capacitances. University of Toronto 4 of 60 © D. Johns, K. Martin, 1997 Basic Building Blocks Non-Overlapping Clocks I1 T Von I I1 Voff n – 2 n – 1 n n + 1 tTe delay 1 I fs { --- delay V 2 T on I Voff 2 n – 32e n – 12e n + 12e tTe • Non-overlapping clocks — both clocks are never on at same time • Needed to ensure charge is not inadvertently lost. -
Switched Capacitor Concepts & Circuits
Switched Capacitor Concepts & Circuits Outline • Why Switched Capacitor circuits? – Historical Perspective – Basic Building Blocks • Switched Capacitors as Resistors • Switched Capacitor Integrators – Discrete time & charge transfer concepts – Parasitic insensitive circuits • Signal Flow Graphs • Switched Capacitor Filters – Comparison to Active RC filters – Advantages of Fully Differential filters • Switched Capacitor Gain Circuits • Reducing the Effects of Charge Injection • Tradeoff between Speed and Charge Injection Why Switched Capacitor Circuits? • Historical Perspective – As MOS processes came to the forefront in the late 1970s and early 1980s, the advantages of integrating analog blocks such as active filters on the same chip with digital logic became a driving force for inovation. – Integrating active filters using resistors and capacitors to acturately set time constants has always been difficult, because of large process variations (> +/- 30%) and the fact that resistors and capacitors don’t naturally match each other. – So, analog engineers turned to the building blocks native to MOS processes to build their circuits, switches & capacitors. Since time constants can be set by the ratio of capacitors, very accurate filter responses became possible using switched capacitor techniques Æ Mixed-Signal Design was born! Switched Capacitor Building Blocks • Capacitors: poly-poly, MiM, metal sandwich & finger caps • Switches: NMOS, PMOS, T-gate • Op Amps: at first all NMOS designs, now CMOS Non-Overlapping Clocks • Non-overlapping clocks are used to insure that one set of switches turns off before the next set turns on, so that charge only flows where intended. (“break before make”) • Note the notation used to indicate time based on clock periods: ... (n-1)T, (n-½)T, nT, (n+½)T, (n+1)T .. -
Modelling and Characterization of DCO Using Pass Transistors
2833 E.Kanniga et al./ Elixir Power Elec. Engg. 35 (2011) 2833-2835 Available online at www.elixirpublishers.com (Elixir International Journal) Power Electronics Engineering Elixir Power Elec. Engg. 35 (2011) 2833-2835 Modelling and characterization of DCO using Pass Transistors E.Kanniga 1 and M.Sundararajan 2 1Department of ECE, Bharath University, Chennai-73 2Gojan School of Business & Technology, Chennai-52. ARTICLE INFO ABSTRACT Article history: In the field of simulation work, it could proceed to an extent that, simulate with arbitrary Received: 6 April 2011; values of the passive component and the voltage sources. The simulation results recorded Received in revised form: various strategic points in the circuit indicate and validate the fact that the circuit is working 19 May 2011; in the expected lines with regard to the energy transfer in the expected lines with regard to Accepted: 26 May 2011; the energy transfer in the tank circuit and sustenance in DC transient Analysis. Also in this proposed experimental work, it is observed that for an arbitrary load, the voltage obtained is Keywords agreeing with the theoretically computed DC-Voltage levels. The scope of the work can be Digital controlled oscillator, extended to the actual calculation of the passives, the initial voltages across the capacitors Steady state transient response, and inductors. In addition to the exciting DC levels of the sources employed. The small Simulation LTSPICE, signal analysis can also be done with due regard to the desired behavioural properties of Varactors. switching devices used. © 2011 Elixir All rights reserved. ntroduction In the digital world there is an increased requirement for Fig1 shows that NMOS transistors configured as a Varactor Digitally Controlled Oscillator (DCO). -
Switched Capacitor Instrumentation Amplifier
LTC1043 Dual Precision Instrumentation Switched Capacitor Building Block FEATURES DESCRIPTIO U ■ Instrumentation Front End with 120dB CMRR The LTC®1043 is a monolithic, charge-balanced, dual ■ Precise, Charge-Balanced Switching switched capacitor instrumentation building block. A pair ■ Operates from 3V to 18V of switches alternately connects an external capacitor to ■ Internal or External Clock an input voltage and then connects the charged capacitor ■ Operates up to 5MHz Clock Rate across an output port. The internal switches have a ■ Low Power break-before-make action. An internal clock is provided ■ Two Independent Sections with One Clock and its frequency can be adjusted with an external capacitor. The LTC1043 can also be driven with an external APPLICATIOU S CMOS clock. The LTC1043, when used with low clock frequencies, ■ Precision Instrumentation Amplifiers provides ultra precision DC functions without requiring ■ Ultra Precision Voltage Inverters, Multipliers precise external components. Such functions are and Dividers differential voltage to single-ended conversion, voltage ■ V–F and F–V Converters inversion, voltage multiplication and division by 2, 3, 4, 5, ■ Sample-and-Hold etc. The LTC1043 can also be used for precise V–F and ■ Switched Capacitor Filters F–V circuits without trimming, and it is also a building block for switched capacitor filters, oscillators and modulators. The LTC1043 is manufactured using Linear Technology’s enhanced LTCMOSTM silicon gate process. , LTC and LT are registered trademarks of Linear Technology -
Commissioning of the Mice Rf System* A
5th International Particle Accelerator Conference IPAC2014, Dresden, Germany JACoW Publishing ISBN: 978-3-95450-132-8 doi:10.18429/JACoW-IPAC2014-WEPME020 COMMISSIONING OF THE MICE RF SYSTEM* A. Moss, A. Wheelhouse, T. Stanley, C. White, STFC, Daresbury Laboratory, Warrington, UK K. Ronald, C.G. Whyte, A.J. Dick, D.C. Speirs, SUPA, Dept.of Physics, University of Strathclyde, Glasgow, UK S. Alsari, Imperial College of Science and Technology, London, UK on behalf of the MICE Collaboration Abstract feature adjustable sections to change the response of the cavity to both input line and resistive load. On the output The Muon Ionisation Cooling Experiment (MICE) is of the amplifier, the cavity length and hence its resonant being constructed at Rutherford Appleton Laboratory in frequency can be adjusted, whilst a stub tuner is located in the UK. The muon beam will be cooled using multiple the output coax section to alter the coupling factor into hydrogen absorbers then reaccelerated using an RF cavity the output coax so that the amplifier may be used to drive system operating at 201MHz. This paper describes recent a range of different load conditions. For use in the MICE progress in commissioning the amplifier systems at their system the 4616 operates in long pulse mode using grid design operation conditions, installation and operation as pulsed operation and can provide up to 250kW RF output part of the MICE project. power. INTRODUCTION 4616 Power Supply The muon ionisation cooling experiment is a The power supply for the tetrode amplifier consists of a demonstration of practical cooling for future muon TDK-Lambda 500A capacitor charger power supply acceleration schemes. -
Switched-Capacitor Integrator
EE247 Lecture 10 • Switched-capacitor filters (continued) – Switched-capacitor integrators • DDI & LDI integrators – Effect of parasitic capacitance – Bottom-plate integrator topology – Switched-capacitor resonators – Bandpass filters – Lowpass filters – Switched-capacitor filter design considerations • Termination implementation • Transmission zero implementation • Limitations imposed by non-idealities EECS 247 Lecture 10 Switched-Capacitor Filters © 2008 H. K. Page 1 Switched-Capacitor Integrator C φ φ I φ 1 2 1 Vin - φ 2 Cs Vo + T=1/fs C C φ I φ I 1 2 Vin Vin - - C C s s Vo Vo + + φ High φ 1 2 High Æ C Charged to Vin s ÆCharge transferred from Cs to CI EECS 247 Lecture 10 Switched-Capacitor Filters © 2008 H. K. Page 2 Switched-Capacitor Integrator Output Sampled on φ1 φ φ 1 2 Vin CI φ - 1 Cs Vo Vo1 + φ φ φ φ φ Clock 1 2 1 2 1 Vin VCs Vo Vo1 EECS 247 Lecture 10 Switched-Capacitor Filters © 2008 H. K. Page 3 Switched-Capacitor Integrator ( (n-1)T n-3/2)Ts s (n-1/2)Ts nTs (n+1/2)Ts (n+1)Ts φ φ φ φ φ Clock 1 2 1 2 1 Vin Vs Vo Vo1 Φ 1 Æ Qs [(n-1)Ts]= Cs Vi [(n-1)Ts] , QI [(n-1)Ts] = QI [(n-3/2)Ts] Φ 2 Æ Qs [(n-1/2) Ts] = 0 , QI [(n-1/2) Ts] = QI [(n-1) Ts] + Qs [(n-1) Ts] Φ 1 _Æ Qs [nTs ] = Cs Vi [nTs ] , QI [nTs ] = QI[(n-1) Ts ] + Qs [(n-1) Ts] Since Vo1= - QI /CI & Vi = Qs / Cs Æ CI Vo1(nTs) = CI Vo1 [(n-1) Ts ] -Cs Vi [(n-1) Ts ] EECS 247 Lecture 10 Switched-Capacitor Filters © 2008 H. -
Practical Issues Designing Switched-Capacitor Circuit
Practical Issues Designing Switched-Capacitor Circuit ECEN 622 (ESS) Fall 2011 Practical Issues Designing Switched-Capacitor Circuit Material partially prepared by Sang Wook Park and Shouli Yan ELEN 622 Fall 2011 1 / 27 Switched-Capacitor practical issues Practical Issues Designing Switched-Capacitor Circuit MOS switch G G S Cov Cox Cov D S D Ron o Excellent Roff o Non-idea Effect Charge injection, Clock feed-through Finite and nonlinear Ron ELEN 622 Fall 2011 2 / 27 Switched-Capacitor practical issues Practical Issues Designing Switched-Capacitor Circuit Charge Injection G Qch1 Qch2 C VS o During TR. is turned on, Qch is formed at channel surface Qch = WLC OX (VGS −Vth ) When TR. is off, Qch1 is absorbed by Vs, but Qch2 is injected to C o Charge injected through overlap capacitor o Appeared as an offset voltage error on C ELEN 622 Fall 2011 3 / 27 Switched-Capacitor practical issues Practical Issues Designing Switched-Capacitor Circuit Charge Injection Effect CLK Ideal sw. Vout MOS sw. 0.1pF 1V CLK o When clock changes from high to low, Qch2 is injected to C o Compared to ideal sw., MOS sw. creates voltage error on Vout ELEN 622 Fall 2011 4 / 27 Switched-Capacitor practical issues Practical Issues Designing Switched-Capacitor Circuit Decrease Charge Injection Effect (1) CLK Vout W/L = 1/0.4 0.1pF 1V W/L = 10/0.4 o Decrease the effect of Qch o Use either bigger C or small TR. (small ratio of Cox/C) o Increased Ron ELEN 622 Fall 2011 5 / 27 Switched-Capacitor practical issues Practical Issues Designing Switched-Capacitor Circuit Decrease Charge Injection Effect (2) CLK CLKb 10/0.4 3.1/0.4 Vout With dummy sw. -
Lecture 3 Switched-Capacitor Circuits
ECE1371 Advanced Analog Circuits Lecture 3 Switched-Capacitor Circuits Trevor Caldwell [email protected] Circuit of the Day: Schmitt Trigger Problem: Input is noisy or slowly varying How do we turn this into a clean digital output? 2 ECE1371 Lecture Plan Date Lecture (Wednesday 2-4pm) Reference Homework 2020-01-07 1 MOD1 & MOD2 PST 2, 3, A 1: Matlab MOD1&2 2020-01-14 2 MODN + Toolbox PST 4, B 2: Toolbox 2020-01-21 3 SC Circuits R 12, CCJM 14 2020-01-28 4 Comparator & Flash ADC CCJM 10 3: Comparator 2020-02-04 5 Example Design 1 PST 7, CCJM 14 2020-02-11 6 Example Design 2 CCJM 18 4: SC MOD2 2020-02-18 Reading Week / ISSCC 2020-02-25 7 Amplifier Design 1 2020-03-03 8 Amplifier Design 2 2020-03-10 9 Noise in SC Circuits 2020-03-17 10 Nyquist-Rate ADCs CCJM 15, 17 Project 2020-03-24 11 Mismatch & MM-Shaping PST 6 2020-03-31 12 Continuous-Time PST 8 2020-04-07 Exam 2020-04-21 Project Presentation (Project Report Due at start of class) 3 ECE1371 What you will learn… • Motivation for SC Circuits • Basic sampling switch and charge injection errors • Fundamental SC Circuits Sample & Hold, Gain and Integrator • Other Circuits Bootstrapping, SC CMFB 4 ECE1371 Why Switched-Capacitor? • Used in discrete-time or sampled-data circuits Alternative to continuous-time circuits • Capacitors instead of resistors Capacitors won’t reduce the gain of high output impedance OTAs No need for low output impedance buffer to drive resistors • Accurate frequency response Filter coefficients determined by capacitor ratios (rather than RC time constants and clock frequencies) Capacitor matching on the order of 0.1% - when the transfer characteristics are a function of only a capacitor ratio, it can be very accurate RC time constants vary by up to 20% 5 ECE1371 Basic Building Blocks • Opamps Ideal usually assumed Some important non-idealities to consider include: 1. -
Analysis of Performance of Switched Capacitor Circuits E
et International Journal on Emerging Technologies 11 (2): 863-869(2020) ISSN No. (Print): 0975-8364 ISSN No. (Online): 2249-3255 Analysis of Performance of Switched Capacitor Circuits E. Sreenivasa Rao 1, S. Aruna Deepthi 2 and M. Satyam 3 1Professor and HOD, Department of Electronics and Communications, Vasavi College of Engineering (Telangana), India. 2Assistant Professor, Department of Electronics and Communications Vasavi College of Engineering (Telangana), India. 3Professor, Department of Electronics and Communications Vasavi College of Engineering (Telangana), India. (Corresponding author: S. Aruna Deepthi) (Received 04 January 2020, Revised 03 March 2020, Accepted 05 March 2020) (Published by Research Trend, Website: www.researchtrend.net) ABSTRACT: In switched capacitor circuits, it is quite common to use MOSFET switches, integrated capacitors (IC) and non-overlapping clocks for carrying out switching operations. MOSFET switches are far from ideal switches mainly when they are operated with small operating voltages. Some investigations have been carried out on the performance of switched capacitor resistors (SCRs) with the switches operated under varied conditions. Further, an attempt has been made to find out how closely SCR represents conventional resistors. It has been found that the SCRs with ideal components satisfy the properties of series and parallel connected conventional resistors. Further, the energy dissipation in SCR is the same as that in conventional resistors when operated under fixed voltage difference. FET based SCRs exhibit higher resistance values, compared to SCRs with ideal switches depending on the operating conditions. When SCRs are loaded with conventional resistors or capacitors, their output is entirely different from those, where only conventional components are used. -
Eimac Care and Feeding of Tubes Part 3
SECTION 3 ELECTRICAL DESIGN CONSIDERATIONS 3.1 CLASS OF OPERATION Most power grid tubes used in AF or RF amplifiers can be operated over a wide range of grid bias voltage (or in the case of grounded grid configuration, cathode bias voltage) as determined by specific performance requirements such as gain, linearity and efficiency. Changes in the bias voltage will vary the conduction angle (that being the portion of the 360° cycle of varying anode voltage during which anode current flows.) A useful system has been developed that identifies several common conditions of bias voltage (and resulting anode current conduction angle). The classifications thus assigned allow one to easily differentiate between the various operating conditions. Class A is generally considered to define a conduction angle of 360°, class B is a conduction angle of 180°, with class C less than 180° conduction angle. Class AB defines operation in the range between 180° and 360° of conduction. This class is further defined by using subscripts 1 and 2. Class AB1 has no grid current flow and class AB2 has some grid current flow during the anode conduction angle. Example Class AB2 operation - denotes an anode current conduction angle of 180° to 360° degrees and that grid current is flowing. The class of operation has nothing to do with whether a tube is grid- driven or cathode-driven. The magnitude of the grid bias voltage establishes the class of operation; the amount of drive voltage applied to the tube determines the actual conduction angle. The anode current conduction angle will determine to a great extent the overall anode efficiency. -
Hybrid Switched-Capacitor Converters for High- Performance Power Conversions
Hybrid Switched-Capacitor Converters for High- Performance Power Conversions Wen Chuen Liu Electrical Engineering and Computer Sciences University of California, Berkeley Technical Report No. UCB/EECS-2021-25 http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-25.html May 1, 2021 Copyright © 2021, by the author(s). All rights reserved. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission. Acknowledgement I would like to express my sincere gratitude to my advisor, Professor Robert Pilawa. Without his support and guidance throughout the years, all of my hard work might not lead to today’s success. Besides that, I am grateful to get professional and insightful advice with the Professor Van Carey, Professor Ali Niknejad, and Professor Seth Sanders. Last but not least, it was my pleasure to be part of Pilawa’s team. Everyone in the team not only has a very high passion for their work but also with high engineering curiosity. I have learned a lot from them, not only as an engineer but also as a person! Thank you very much. Hybrid Switched-Capacitor Converters for High-Performance Power Conversions by Wen Chuen Liu A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Engineering | Electrical Engineering and Computer Sciences in the Graduate Division of the University of California, Berkeley Committee in charge: Associate Professor Robert C. -
Stacked Switched Capacitor Energy Buffer Architecture
Stacked Switched Capacitor Energy Buffer Architecture by Minjie Chen B.S., Tsinghua University (2009) Submitted to the Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering at the MASSACHUSETTS INSTITUTE OF TECHNOLOGY February 2012 © Massachusetts Institute of Technology 2012. All rights reserved. Author.............................................................. Department of Electrical Engineering and Computer Science December 29, 2011 Certified by. David J. Perreault Professor Thesis Supervisor Certified by. Khurram K. Afridi Visiting Associate Professor Thesis Supervisor Accepted by . Professor Leslie A. Kolodziejski Chairman, Department Committee on Graduate Students Department of Electrical Engineering and Computer Science 2 Stacked Switched Capacitor Energy Buffer Architecture by Minjie Chen Submitted to the Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology on December 29, 2011, in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering Abstract Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited and their reli- ability is a major concern. This thesis presents a series of stacked switched capaci- tor (SSC) energy buffer architectures which overcome this limitation while achieving comparable effective energy density without electrolytic capacitors. The architectural approach is introduced along with design and control techniques which enable this energy buffer to interface with other circuits. A prototype SSC energy buffer using film capacitors, designed for a 320 V dc bus and able to support a 135 W load has been built and tested with a power factor correction circuit.