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Processor Design：System-On-Chip Computing For Processor Design Processor Design System-on-Chip Computing for ASICs and FPGAs Edited by Jari Nurmi Tampere University of Technology Finland A C.I.P. Catalogue record for this book is available from the Library of Congress. ISBN 978-1-4020-5529-4 (HB) ISBN 978-1-4020-5530-0 (e-book) Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springer.com Printed on acid-free paper All Rights Reserved © 2007 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. To Pirjo, Lauri, Eero, and Santeri Preface When I started my computing career by programming a PDP-11 computer as a freshman in the university in early 1980s, I could not have dreamed that one day I’d be able to design a processor. At that time, the freshmen were only allowed to use PDP. Next year I was given the permission to use the famous brand-new VAX-780 computer. Also, my new roommate at the dorm had got one of the first personal computers, a Commodore-64 which we started to explore together. Again, I could not have imagined that hundreds of times the processing power will be available in an everyday embedded device just a quarter of century later. Little by little I delved into the design of digital circuits, and computer architecture. I finally learned my lessons in RISC philosophy when I was teaching computer architecture classes in early 1990s according to the famous groundbreaking book by Hennessy and Patterson. At that time, I had already started to design processors, first some simple configurable fil- ters and then straightforward DSP cores. The story continued in a number of different kinds of design projects purely in academia, as academia- industry cooperation projects and as commercial developments in industry. For me, this decade has meant the time to be back in academia, where I have taught processor-design courses since 1999. A characteristic feature to these courses has been the lack of a good course textbook. I have tried out a few books, and used a scattered set of my own material trying bridge the gaps that I perceived. Year after year I got more annoyed with the absence of a textbook, until, after gaining some editor experience in an- other book project, I decided that the book needed to be written. I would like to thank my contact person at Springer, Mark de Jongh, who believed in me right from the start, and all the contributors of this book. A big part of the success of this project was that I knew some good people and asked for their contribution. I had worked with many of them previously in the annual International Symposium on System-on-Chip since 1999, without realizing what kind of assets they represented. Thanks also to all the people who used their valuable time to review the book chapters. vii viii Preface I hope that you will find this book to be beneficial to you whether you are a student, engineer, teacher or engineering manager. This book defi- nitely fills the gap that I had recognized, so I hope that we shared the same gap. In Tampere, April 2007 Jari Nurmi Table of Contents List of Contributing Authors..................................................................xv 1 Introduction ..........................................................................................1 2 Embedded Computer Architecture Fundamentals ...........................7 Components of (an embedded) computer...............................................7 Architecture organization .....................................................................12 Ways of parallelism..............................................................................15 Memory ................................................................................................19 I/O operations and peripherals..............................................................26 3 Beyond the Valley of the Lost Processors: Problems, Fallacies, and Pitfalls in Processor Design ........................................................27 Designing a high-level computer instruction-set architecture (ISA) to support a specific language or language domain..............................28 Use of intermediate ISAs to allow a simple machine to emulate its betters...............................................................................................32 Stack machines .....................................................................................35 Extreme CISC and extreme RISC ........................................................39 Very long instruction word (VLIW).....................................................43 Overly aggressive pipelining ................................................................45 Unbalanced processor design ...............................................................47 Omitting pipeline interlocks .................................................................50 Non-power-of-2 data-word widths for general-purpose computing .............................................................................................53 Too small an address space...................................................................55 Memory segmentation ..........................................................................58 Multithreading ......................................................................................60 Symmetric multiprocessing ..................................................................63 4 Processor Design Flow........................................................................69 Capturing requirements ........................................................................69 Instruction coding.................................................................................74 Exploration of architecture organizations.............................................79 ix x Table of Contents Hardware and software development ...................................................80 Software tools and libraries ..................................................................82 5 General-Purpose Embedded Processor Cores – The COFFEE RISC Example.....................................................................................83 Introduction ..........................................................................................83 Implications of RISC design philosophy..............................................84 The COFFEE RISC Core instruction set architecture..........................86 Software view of the COFFEE RISC Core ..........................................88 Hardware view of the COFFEE RISC Core .........................................90 The COFFEE RISC Core pipeline structure.........................................92 The COFFEE RISC Core implementation ...........................................95 The COFFEE RISC Core characteristics..............................................97 Conclusions ........................................................................................100 6 The DSP and Its Impact on Technology.........................................101 Introduction ........................................................................................101 Why a DSP is different.......................................................................105 The evolving architecture of a DSP....................................................113 What is next in the evolution of the DSP ...........................................115 Summary.............................................................................................119 7 VLIW DSP Processor for High-End Mobile Communication Applications.......................................................................................121 Trends in mobile communication .......................................................122 DSP-specific requirements .................................................................124 Microarchitectural concepts................................................................126 VLIW and SW programmability ........................................................128 3a, an application specific adaptable core architecture ......................130 Benchmarking: kernel versus application benchmarking...................139 Design space exploration....................................................................142 The complexity of configurability......................................................145 Summary.............................................................................................147 Acknowledgment................................................................................148 8 Customizable Processors and Processor Customization...............149 Introduction ........................................................................................149 A benefits analysis of processor customization..................................150 Using microprocessor cores in SOC design .......................................153 Benefiting from microprocessor extensibility ....................................154 How microprocessor use differs between SOC and board-level design .......................................................................157 Table of Contents xi Tensilica’s extensible Xtensa processor core .....................................162
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