Quick viewing(Text Mode)

NTSC-PAL Video I/O Interface

NTSC-PAL Video I/O Interface

TECHNICAL NOTE

Video/Audio Interfaces for TV and DVD Recorders NTSC-PAL

I/O Interface BH7625KS2

●Description BH7625KS2 is a video signal selector with two built-in sync separation circuits, and two sync detector circuits. It includes 5-composit, 5-Y, 5-C, and 1- signal inputs that can be selected freely for each output. Additionally, The existance of the signal outputted from outside can be judged by only this chip.

●Features 1) Built-in 5-video, 5-Y, 5-C and 1-component inputs 2) Input terminal of the S2 standard suitability 3) I2C-BUS control (High impedance when power supply off) 4) Built-in 0/3dB switch AMP(CVBS OUT, C OUT) 5) Built-in 0/6dB switch AMP(Y/CVBS OUT) 6) Built-in sync separation circuit(2 circuits SYNC OUT, V SYNC OUT) 7) Built-in sync detector circuit(2 circuits) 8) Built-in 3 LPF circuits(4 order + TRAP)

●Applications DVD-Recorder, visual instrument, etc

●Absolute maximum ratings (Ta=25°C) Parameter Symbol Limits Unit Power Supply Voltage V 7.0 V Power dissipation Pd 1300 *1 mW Operating temperature range Topr -25~+75 °C Storage temperature range Tstg -55~+125 °C *1 Reduced by 13 mW/°C at 25°C or higher.

●Operating range (Ta=25°C) Parameter Symbol Limits Unit VCC1 VCC2 VCC3 Supply voltage 4.5~5.5 V DVCC SYNC VCC VCC

Ver.B Oct.2005

●Electrical characteristics (Unless otherwise specified, Vcc1, Vcc2, Vcc3, DVCC, SYNC VCC, VCC=5V, Ta=25°C)

Limit Item Symbol Unit Conditions MIN. TYP. MAX. <Whole>

VCC Circuit Current ICC 71 95 128 mA Normal Condition

VCC STBY Circuit Current ICCST 9.38 12.5 16.9 mA Standby Condition

VCC PD Circuit Current ICCPD - 0 10 µA Power Down Condition

<SW Part> CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain H G 2.4 2.9 3.4 dB Cb OUT V1H LPF OFF CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain L G -0.7 -0.2 0.3 dB Cb OUT V1L LPF OFF

Y/CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain H G 5.5 6.0 6.5 dB Cy OUT V2H LPF OFF

Y/CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain L G -0.7 -0.2 0.3 dB Cy OUT V2L LPF OFF

C OUT Vin=1.0Vpp , f=100kHz, Voltage Gain H G 2.4 2.9 3.4 dB Cr OUT V3H LPF OFF

C OUT Vin=1.0Vpp , f=100kHz, Voltage Gain L G -0.7 -0.2 0.3 dB Cr OUT V3L LPF OFF

CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain H G 2.2 2.7 3.2 dB Cb OUT V4H LPF ON

CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain L G -0.9 -0.4 0.1 dB Cb OUT V4L LPF ON

Y/CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain H G 5.3 5.8 6.3 dB Cy OUT V5H LPF ON

Y/CVBS OUT Vin=1.0Vpp , f=100kHz, Voltage Gain L G -0.9 -0.4 0.1 dB Cy OUT V5L LPF ON

C OUT Vin=1.0Vpp , f=100kHz, Voltage Gain H G 2.2 2.7 3.2 dB Cr OUT V6H LPF ON

C OUT Vin=1.0Vpp , f=100kHz, Voltage Gain L G -0.9 -0.4 0.1 dB Cr OUT V6L LPF ON

CVBS OUT Maximum Output V 2.6 3.0 - Vpp f=100kHz(10kHz), THD=1% Cb OUT Level OM1

Y/CVBS OUT Maximum Output V 2.6 3.0 - Vpp f=100kHz(10kHz), THD=1% Cy OUT Level OM2

C OUT Maximum Output V 2.6 3.0 - Vpp f=100kHz(10kHz), THD=1% Cr OUT Level OM3

<SW Part> Vin=1.0Vpp Gain=3dB CVBS OUT G -1.5 -0.5 0.5 dB Vin=2.0Vpp Gain=0dB Cb OUT Characteristic 1 F11 f=6.75MHz/100kHz(LPF ON) Vin=1.0Vpp Gain=3dB CVBS OUT Frequency G - -38 ―27 dB Vin=2.0Vpp Gain=0dB Cb OUT Characteristic 2 F12 f=27MHz/100kHz (LPF ON)

2/16 Limit Item Symbol Unit Conditions MIN. TYP. MAX. Vin=1.0Vpp Gain=3dB CVBS OUT Frequency G -1.0 0 1.0 dB Vin=2.0Vpp Gain=0dB Cb OUT Characteristic 3 F13 f=7MHz/100kHz (Through) Vin=1.0Vpp Gain=6dB Y/CVBS OUT Frequency G -1.5 -0.5 0.5 dB Vin=2.0Vpp Gain=0dB Cy OUT Characteristic 1 F21 f=6.75MHz/100kHz (LPF ON) Vin=1.0Vpp Gain=6dB Y/CVBS OUT Frequency G - -38 -27 dB Vin=2.0Vpp Gain=0dB Cy OUT Characteristic 2 F22 f=27MHz/100kHz (LPF ON) Vin=1.0Vpp Gain=6dB Y/CVBS OUT Frequency G -1.0 0 1.0 dB Vin=2.0Vpp Gain=0dB Cy OUT Characteristic 3 F23 f=7MHz/100kHz (Through) Vin=1.0Vpp Gain=3dB C OUT Frequency G -1.5 -0.5 0.5 dB Vin=2.0Vpp Gain=0dB Cr OUT Characteristic 1 F31 f=6.75MHz/100kHz (LPF ON) Vin=1.0Vpp Gain=3dB C OUT Frequency G -1.0 0 1.0 dB Vin=2.0Vpp Gain=0dB Cr OUT Characteristic 3 F33 f=7MHz/100kHz (Through) V-SW Difference In Switch ⊿G -0.5 0.0 0.5 dB f=100kHz, Vin=1.0Vpp Voltage Gain V

Y-SW Difference In Switch ⊿G -0.5 0.0 0.5 dB f=100kHz, Vin=1.0Vpp Voltage Gain Y

C-SW Difference In Switch ⊿G -0.5 0.0 0.5 dB f=100kHz, Vin=1.0Vpp Voltage Gain C

V-SW Switch Crosstalk CTSV - -60 -55 dB f=4.43MHz, Vin=1.0Vpp

Y-SW Switch Crosstalk CTSY - -60 -55 dB f=4.43MHz, Vin=1.0Vpp

C-SW Switch Crosstalk CTSC - -60 -55 dB f=4.43MHz, Vin=1.0Vpp

V⇔Y⇔C C - -60 -55 dB f=4.43MHz, Vin=1.0Vpp Channel Crosstalk TCH

C IN Input Impedance ZCIN 12.5 18.0 23.5 kΩ

<SYNC DETECTOR Part>

Minimum sync separation level SLMIN - 0.08 0.15 Vpp LPF Condition“111”

Vcc Vcc V SYNC OUT Output Voltage H V Vcc V No Load VSH -0.5 -0.1

V SYNC OUT Output Voltage L VVSL - 0.1 0.5 V No Load

Vin=1.0Vpp, VD Pulse Width TWV1 - 185 - µsec Standard staircase signal LPF Condition“111” Vin=1.0Vpp, HD Pulse Width TWH1 - 4.5 - µsec Standard staircase signal LPF Condition“111” Vcc Vcc C SYNC OUT Output Voltage H V Vcc V No Load VCH -0.5 -0.1

C SYNC OUT Output Voltage L VVCL - 0.1 0.5 V No Load

3/16

Limit Item Symbol Unit Conditions MIN. TYP. MAX. Vcc Vcc SYNC DET OUT Output Voltage H V Vcc V No Load SDH -0.5 -0.1

SYNC DET OUT Output Voltage L VSDL - 0.1 0.5 V No Load

<I2C-BUS Control>

S1/S2 DET Detection Level H DLH 3.4 - Vcc V 16:9 Squeeze Signal

S1/S2 DET Detection Level DLM 1.3 1.9 2.5 V 4:3 Letter Box Signal

S1/S2 DET Detection Level L DLL 0.0 - 0.7 V 4:3 Video Signal, No Signal

<ADR>

Input Voltage H VIHADR 2.0 - Vcc V

Input Voltage L VILADR 0.0 - 1.0 V

Input Impedance ZINADR 65 100 135 kΩ Pull Down Resistance

<SCL、SDA>

Input Voltage H VIHIIC 2.0 - Vcc V

Input Voltage L VILIIC 0.0 - 1.0 V

Input Bias Current IBIIC 0 -1 -10 µA

<PD>

Input Voltage H VIHPD 2.0 - Vcc V

Input Voltage L VILPD 0.0 - 0.7 V

Input Impedance ZINPD 65 100 135 kΩ Pull Down Resistance

<Guaranteed design parameter>

CVBS OUT, Y/CVBS OUT, D - 0.5 - % G C OUT

CVBS OUT, Y/CVBS OUT, D - 0.5 - deg P C OUT CVBS OUT, Y/CVBS OUT Y S/N SNY - -70 - dB 50% White signal Filter : 100kHz~6MHz C OUT C S/N SNC - -70 - dB 100% Chroma signal Filter : 100Hz~500kHz

4/16 ●Block diagram

Synctip 0.01μF Clamp CVBS1 11

0.01μF CVBS2 Synctip 13 Clamp

INSEL1 INSEL2 INSEL3 VREF VREF 8 0.01μF CVBS3 Synctip 10μF

15 COMPONENT Clamp LPF ON/OFF

0.01μF CVBS4 L 17 Synctip H Clamp LPF 0/3dB 25 CVBS/Cb OUT 0.01μF CVBS5 19 H Synctip L Clamp 14 GND1 0.01μF Cb 0/3dB 38 Pedestal CLP H Clamp L 10 GND2

SYNC GND 22 0dB L H 6 GND3

0dB GND 49 51 GND4 Y OUT SEL

Synctip COMPONENT Clamp 20 VCC1 0.01μF Y1/Cy 40

INSEL4 INSEL5 Synctip 12 VCC2 0.01μF Y2 Clamp 42 H

Y OUT SEL 3 VCC3 Synctip 0.01μF Y3 44 Clamp L H COMPONENT H 0.01μF Y4 21 Y/CVBS/Cy OUT 46 Synctip LPF 0/6dB Clamp L L 0.01μF Y5 47 VCC 48 Synctip 0/6dB Clamp

18

LPF ON/OFF TEST1 INSEL1 INSEL2 INSEL3 Pedestal CLP TEST Clamp 16 TEST2 COMPONENT 0.01μF C1/Cr LPF ON/OFF 50 BIAS

INSEL1 INSEL2 INSEL3 H H 0.01μF C2 LPF 23 C/Cr OUT 2 BIAS 0/3dB L L 0.01μF C3 4 BIAS 0/3dB 24 SYNC VCC 0.01μF C4 7 BIAS SSC1 26 0.01μF C5 0.033μF 9 BIAS SYNC DET1 CLP Clamp Pulse C.Sync 29 CSYNCOUT Sync Sync DVCC 37 LPF Sepa V.Sepa 30 VSYNCOUT DAGND 34 S1/S2 DET1 52 M.M DET 150k 41 SDETOUT1 S1/S2 DET2 1 28 DETC1 150k 0.1μF 390k S1/S2 DET3 5 Logic 27 100pF 150k MMT1 PD 43 SYNC DET2

SCL 36 Sync Sync 35 SDA LPF Sepa M.M DET 39 SDETOUT2 ADR 45

31 DETC2 0.1μF 390k 32 MMT2 100pF

33 SSC2 0.033μF

Blocks inside the dotted line operate at a standby mode

Fig.1

5/16 ●Equivalent circuit

Input Pin NO./Pin Name Range(V) Function Equivalent Circuit (Input/Output) Terminal Voltage (V)

14. GND1 10. GND2 GND terminal 0 6. GND3 51. GND4

11. CVBS1 13. CVBS2 15. CVBS3 17. CVBS4 Signal input terminal 19. CVBS5 1.4 40. Y1_Cy The video signal input pins is a 42. Y2 sync-tip-clamp. 44. Y3 46. Y4 48. Y5

2. C2 Signal input terminal 4. C3 2.9 7. C4 The video signal input pins is a 9. C5 resistance bias.

Signal input terminal

50. C1_Cr This pin is input of chroma signal1 2.9 (C1) and Cr. Change resistor bias and pedestal clamp.

Signal output terminal 25. CVBS/Cb OUT 0.7 21. Y/CVBS/Cy OUT The gain can be selected by 23. C/Cr OUT 2 2.1 I C-BUS.

Signal input terminal

38. Cb - The video signal input pin (Cb) is a pedestal clamp.

Signal input terminal 52. S1/S2 DET1

1. S1/S2 DET2 - The state of inputted signal can be 5. S1/S2 DET3 read by I2C-BUS.

PD terminal 43. PD 0 Sets power down mode.

18. TEST1 TEST terminal 0 16. TEST2 Shorts to GND.

6/16

SSC terminal 26. SSC1 - 33. SSC2 Makes reference voltage for sync separation.

C, V sync signal output terminal 29. C SYNC OUT 5.0 30. V SYNC OUT Outputs sync separation signal.

Generate DET voltage terminal 28. DETC1 - 31. DETC2 Turns the MM duty pulse into the DC voltage.

MM adjusting terminal

27. MMT1 Determines the MM time constant - 32. MMT2 by the outside capacitor and resister.

Signal output terminal 41. SDET OUT1 0 39. SDET OUT2 These pins output sync detecting signal.

Reference voltage terminal

8. VREF 2.8 A capacitor is connected to opposite GND.

ADR terminal

25. ADR 0 The pin to set slave address 90H (91H) or 92H (93H).

I2C-BUS Clock input terminal

36. SCL 2 - The pin is input clock of I C-BUS. Uses pull up resistor.

I2C-BUS Data terminal

35. SDA 2 - The pin is data of I C-BUS. Uses pull up resistor.

7/16 ●Description of operations

CLP・Clamp Pulse CLP is pedestal clamp pulse of component input, It is the same timing as C-SYNC.

Video signal input SYNC LPF Detection The input signal is different in sync det1 The high frequency of the input signal The smoothing voltage by DET block is compared with block and in sync det2 block for is shut out. Cut off frequency can be chosen inside threshold voltage. And the existance of the video selecting inside selecter. by I2C-BUS from 8 steps. signal is judged.

SSC1 26 SYNC DET1 0.033uF

CLP Clamp Pulse C.SyncC.Sync 29 C SYNC OUT Sync Sync LPF Sepa V.SepaV.Sepa 30 V SYNC OUT

M.M DET 41 SYNCOUT1

DETC1 28 0.1uF 390k

27 MMT1 100pF

DET The output from MM, it's smoothing by about 100kΩ and outside capacitor. (Smoothing means turning the duty of MM output into the DC voltage.)

Input to the MM block SYNC DET1 block is the same as C SYNC OUT signal.

※ Compose the outside application MM1 terminal Comparator level so that duty may become VCC/2 Fixation 50%~60% when a video signal is inputted normally.

Output to the MM block (Input to the DET block) This is able to monitor DETC terminal in the OPEN state (removed capacitor)

Fig.2

※ The detection sensitivity level of this LSI can be different depending on the used. Therefore, change the detection level setting by selecting LPF cut off and the outside part value of MMT (27 pin, 32 pin) for each tuner when using this feature.

8/16 ●Description of operations

■I2C-BUS Control input specifications

・I2C-BUS Format (WRITE MODE) SLAVE S ADATA1ADATA2AP ADDRESS

S : Start Condition A : Acknowledge P: Stop Condition

b7 b6 b5 b4 b3 b2 b1 B0 Slave 1 0 0 1 0 0 ADR R/W address 5 4 3 2 1 DATA1 L2 L1 L0 INSEL Y-OUT LPF GAIN DATA2 Component STBY T2 T1 T0 SEL ON/OFF 0/6dB #(Don’t Care)

* At power on, BH7625KS2 becomes “ * ”condition. * ADR and S1/S2 DET terminal inputs value’s must be set between start and stop condition and must be consistent, as a change in value may result in poor operation.

○ SELECT INPUT SWITCH・SETTING MODE Explanation Explanation Slave Address (write mode) set by ADR pin SYNC DET2 input setting 0 : Address is “90H”, when ADR 00 : Y1/Cy * ADR pin input is set to L INSEL5~4 01 : Y1/Cy 1 : Address is “92H”, when ADR pin input is 10 : CVBS2 set to H 11 : Y2 Change setting of input selector READ/WRITE Setting Mode SW. R/W 0 : WRITE INSEL3~1 Refer to the next page SW 1 : READ correspondence table. Component SEL SW output Y-OUT SEL SW output setting setting Y-OUT SEL 0 : L * Component 0 : L (Composit) * 1 : H 1 : H (Component) LPF ON/OFF setting AMP GAIN setting LPF 0 : L (OFF) * GAIN0/6dB 0 : L (0dB) * ON/OFF 1 : H (ON) 1 : H (6dB or 3dB) Stand-By Mode setting Stand-By 0 : L (move) 1 : H(standby) ※In standby condition, activate only the circuits in the block diagram.

○ INPUT SW CONTROL table Y-OUT CVBS CSYNC INSEL 3 INSEL 2 INSEL 1 Component Y OUT C OUT SEL OUT etc. 0 0 0 1 0 CVBS1 CVBS1 C1 CVBS1 0 0 1 1 0 CVBS2 CVBS2 C2 CVBS2 0 1 0 1 0 CVBS3 CVBS3 C3 CVBS3 0 1 1 1 0 CVBS4 CVBS4 C4 CVBS4 1 0 0 1 0 CVBS5 CVBS5 C5 CVBS5 0 0 0 0 0 CVBS1 Y1 C1 Y1 0 0 1 0 0 CVBS2 Y2 C2 Y2 0 1 0 0 0 CVBS3 Y3 C3 Y3 0 1 1 0 0 CVBS4 Y4 C4 Y4 1 0 0 0 0 CVBS5 Y5 C5 Y5 - - - 0 1 Cb Y1(Cy) C1(Cr) Y1(Cy) - - - 1 1 Cb Cb C1(Cr) Y1(Cy)

9/16 Explanation Explanation DET Output decision comparator threshold SYNC SEPA LPF Cut-off conditioning conditioning. 000 : LOW (Normal) 000 : LOW (Normal) 001 : ↓ 001 : ↓ 010 : ↓ 010 : ↓ L2-L0 011 : ↓ T2-T0 011 : ↓ * 100 : ↓ 100 : ↓ 101 : ↓ 101 : ↓ 110 : ↓ 110 : ↓ 111 : High * 111 : High

○ I2C-BUS Format (READ MODE) SLAVE S A DATA1 A/N P ADDRESS S : Start Condition A : Acknowledge A/N : NO acknowledge P: Stop Condition B7 b6 b5 b4 b3 b2 b1 b0 Slave 1 0 0 1 0 0 ADR R/W address DATA1 SD1 SD2 SD3 V-DET2 V-DET1 #(Don’t Care)

* ADR and S1/S2 DET terminal inputs value’s must be set between start and stop condition and must be consistent, as a change in value may result in poor operation.

Explanation Explanation Slave Address (read mode) Set by ADR pin. The state of S1/S2 DET1~S1/S2 DET3 is 0 : Address is “91H”, when ADR pin input is SD1 read out. ADR set to L SD2 00 : 4:3Video signal (0~0.7V) 1 : Address is “93H”, when ADR pin input is SD3 01 : 4:3Letter Box signal (1.3~2.5V) set to H 11 : 16:9Squeeze signal (3.4V~Vcc) The signal SDET OUT is read out. V-DET1, 0 : H (VIDEO signal ON) V-DET2 1 : L (VIDEO signal OFF)

■Power down state Power down state occurs when PD terminal is LOW. Internal circuit becomes non-active in this state. LOW :Power down state HI :Active state

10/16 ●Application circuit

Synctip 0.01μF CVBS1 Clamp 11 Synctip 0.01μF CVBS2 13 Clamp

INSEL1 INSEL2 INSEL3 VREF VREF 8 0.01μF CVBS3 Synctip 10μF

15 COMPONENT Clamp LPF ON/OFF 0.01μF CVBS4 L 17 Synctip H Clamp LPF 0/3dB 25 CVBS/Cb OUT 0.01μF CVBS5 19 H Synctip L Clamp 14 0.01μF 0/3dB GND1 Cb 38 Pedestal CLP H Clamp L 10 GND2 SYNC GND 22 0dB L H 6 GND3 0dB GND 49 51 GND4

Y OUT SEL

Synctip COMPONENT Clamp 20 VCC1 0.01μF Y1/Cy 40 INSEL4 INSEL5 Synctip 12 VCC2 0.01μF Y2 Clamp H 42

YOUTSEL 3 VCC3 0.01μF Y3 Synctip 44 Clamp L H COMPONENT H 0.01μF Y4 Synctip 0/6dB 21 Y/CVBS/Cy OUT 46 Clamp LPF L L 0.01μF Y5 47 VCC 48 Synctip 0/6dB Clamp

18

LPF ON/OFF TEST1 INSEL1 INSEL2 INSEL3 Pedestal CLP TEST Clamp 16 TEST2 COMPONENT 0.01μF C1/Cr LPF ON/OFF 50 BIAS

INSEL1 INSEL2 INSEL3 H H 0.01μF C2 LPF 23 C/Cr OUT 2 BIAS 0/3dB L L 0.01μF C3 4 BIAS 0/3dB 24 SYNC VCC 0.01μF C4 7 BIAS 26 SSC1 0.01μF C5 0.033μF 9 BIAS SYNC DET1 CLP Clamp Pulse C.Sync 29 C SYNC OUT Sync Sync DVCC 37 LPF Sepa V.Sepa 30 V SYNC OUT DAGND 34 S1/S2 DET1 52 M.M DET 150k 41 SDETOUT1 S1/S2 DET2 1 28 DETC1 150k 0.1μF 390k S1/S2 DET3 5 Logic 27 MMT1 100pF 150k PD 43 SYNC DET2

SCL 36 Sync Sync 35 SDA LPF Sepa M.M DET 39 SDETOUT2 ADR 45

31 DETC2 0.1μF 390k

32 MMT2 100pF

33 SSC2 0.033μF

Fig.3

11/16 ●Description of external components ① Video signal terminal(Clamp terminal) Use a capacitor above 0.01µF. If a capacitor is too small, a video signal may become distorted.

② Video signal input terminal(Bias terminal) Input impedance is 20kΩ(TYP) with this terminal. Therefore, set so that a chroma signal may pass fully.

③ S1/S2 DET terminal

Chroma signal input Chrsignal input terminal

75Ω Static electricity breakdown Add countermeasure diode

R2Ω LPF

R1 Set up higher than 100kΩ S terminal standard.

Fig.4

R2: Overvoltage transient can affect the static electricity protection diode connected to the VCC side. Therefore, add a limit current resistor (R2).

④ SSC terminal This terminal sets the sensitivity of the sync-tip level detection. When a capacitor is large, sensitivity becomes low, but becomes too sensitive when the capacitor is small. But, when it is too small, it becomes poor at the noise.

⑤ MMT Adjusting the value of the outside RC, and duty of the pulse output in DETC is set. (Pulse can be monitored when the capacitor of DETC is removed.) Set duty to 50%~60% in the state so that there is no noise in the input signal. The duty is not equal to the same time constant (RC=constant) when R is small.

⑥ DETC When a capacitor is small, detection reaction becomes fast, When it is large, detection reaction becomes slow. Pulse is smoothed by the output impedance of 100kΩ and a capacitor connected to this terminal. The status of the video signal is monitored by this DC voltage value.

12/16 ●Reference data 3 2 -55

2.5 -60

2 -65 1.5 1

Y S/N[dB] -70 1

DIFFERENTIAL GAIN[%] DIFFERENTIAL 0.5 -75

PHASE[deg] DIFFERENTION

0 0 -80 -50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100 TEMPERATURE[℃] TEMPERATURE[℃] TEMPERATURE[℃] Fig.5 Differential Gain Fig.6 Differential Phase Fig.7 Y S/N ratio 150 -55 4

3.8 -60 125 3.6

3.4 -65 100 3.2

C S/N[dB] -70 3 75 2.8 -75 CIRCUIT CURRENT[mA] 2.6 MAXIMUM OUTPUT VOLTAGE[V] OUTPUT MAXIMUM 50 -80 2.4 4.4 4.6 4.8 5 5.2 5.4 5.6 -50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100 POWER SUPPLY VOLTAGE[V] TEMPERATURE[℃] TEMPERATURE[℃] Fig.9 Maximum output voltage Fig.10 VCC Circuit current Fig.8 C S/N ratio (Temperature dependence) (Supply voltage dependence)

15 0.1 150 0.08 140

12.5 0.06 130

0.04 120 10 0.02 110

7.5 0 100

-0.02 90 5 -0.04 PD CURRENT[uA] 80 STBY CURRENT[mA] -0.06 CIRCUITCURRENT[mA] 2.5 70 -0.08 60 0 -0.1 50 4.4 4.6 4.8 5 5.2 5.4 5.6 4.4 4.6 4.8 5 5.2 5.4 5.6 -50 0 50 100 POWER SUPPLY VOLTAGE[V] POWER SUPPLY VOLTAGE[V] TEMPERATURE[℃]

Fig.11 VCC Circuit current (STBY) Fig.12 VCC Circuit current (PD) Fig.13 VCC Circuit current (Supply voltage dependence) (Supply voltage dependence) (Temperature dependence)

15 0.1 4 14.5

14 3.8 0.05 13.5 3.6

13 3.4

12.5 0 3.2 12 3 11.5 PD CURRENT[uA]

STBY CURRENT[mA] -0.05 11 2.8

10.5 2.6 MAXIMUM OUTOUT VOLTAGE[Vpp] OUTOUT MAXIMUM 10 -0.1 2.4 -50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100 4.4 4.6 4.8 5 5.2 5.4 5.6 TEMPERATURE[℃] ℃ TEMPERATURE[ ] POWER SUPPLY VOLTAGE[V]

Fig.14 VCC Circuit current Fig.15 VCC Circuit current PD Fig.16 Maximum output voltage (Temperature dependence) (Temperature dependence) (Supply voltage dependence)

13/16

p 90 90 30

85 85 ]

Ω 25

80 80

75 75 20

70 70 15

[k IMPEDANCE INPUT 65 65

MINIMUM SYNC SEPERATION LEVEL[Vp MINIMUM SYNC SEPERATION 60 60 10 LEVEL[Vpp] SEPERATION SYNC MINIMUM -50-250 255075100 4.4 4.6 4.8 5 5.2 5.4 5.6 4.4 4.6 4.8 5 5.2 5.4 5.6 TEMPERATURE[℃] POWER SUPPLY VOLTAGE[V] POWER SUPPLY VOLTAGE[V]

Fig.17 Min synchronous isolation level Fig.18 Min synchronous isolation level Fig.19 CIN input impedance (Temperature dependence) (Supply voltage dependence) (Supply voltage dependence)

30 10 180 10 180 GAIN 3dB GAIN 3dB 135 135 0 0

] GAIN 0dB GAIN 0dB

Ω 25 90 90 5.6V 100C -10 -10 5.0V 5.6V 45 25C 45 4.4V PHASE 3dB 5.0V PHASE 3dB -50C 20 -20 0 -20 0 4.4V PHASE 6dB PHASE 6dB GAIN [dB] GAIN [dB] -45 -45 -30 -30 100C 25C 15 -90 -90 INPUT IMPEDANCE[k INPUT -50C -40 -40 CVBS/Cb OUT -135 CVBS/Cb OUT -135 TEMP=25℃ ,LPF=OFF VCC=5V ,LPF=OFF 10 -50 -180 -50 -180 -50 -25 0 25 50 75 100 100E+03 1E+06 10E+06 100E+06 100E+03 1E+06 10E+06 100E+06 TEMPERATURE[℃] FREQUENCY [Hz] FREQUENCY [Hz] Fig.20 CIN input impedance Fig.21 Frequency characteristic Fig.22 Frequency characteristic (Temperature dependence) (Supply voltage dependence) (Temperature dependence) 10 180 10 10

GAIN 3dB GAIN 3dB GAIN 6dB 135 0 0 0 GAIN 0dB GAIN 0dB GAIN 0dB 90

-10 -10 5.6V -10 100C 5.6V 45 5.0V 25C PHASE 0dB 5.0V -20 0 -20 4.4V -20 -50C PHASE 6dB 4.4V GAIN [dB]

GAIN [dB] YCVBSCy OUT -45 GAIN [dB] -30 TEMP=25℃ ,LPF=OFF -30 -30 -90 5.6V CVBS/Cb OUT CVBS/Cb OUT -40 -40 TEMP=25℃ ,LPF=ON -40 VCC=5V ,LPF=ON 5.0V -135 4.4V -50 -180 -50 -50 100E+03 1E+06 10E+06 100E+06 100E+03 1E+06 10E+06 100E+06 100E+03 1E+06 10E+06 100E+06 FREQUENCY [Hz] FREQUENCY [Hz] FREQUENCY [Hz] Fig.23 Frequency characteristic Fig.24 Frequency characteristic Fig.25 Frequency characteristic (Supply voltage dependence) (Temperature dependence) (Supply voltage dependence)

10 180 10 10 GAIN 6dB GAIN 6dB 135 GAIN 6dB 0 0 GAIN 0dB GAIN 0dB 0 100C 90 GAIN 0dB 5.6V

-10 25C -10 5.0V 45 -10 -50C 4.4V 100C -20 PHASE 6dB 0 -20 25C PHASE 0dB -20 -50C GAIN [dB] GAIN GAIN [dB] GAIN 100C -45 -30 -30 [dB] GAIN 25C YCVBSCy OUT -30 YCVBSCy OUT -90 TEMP=25℃ ,LPF=ON -50C VCC=5.0V ,LPF=ON -40 -40 -40 YCVBSCy OUT -135 VCC=5.0V ,LPF=OFF -50 -180 -50 -50 100E+03 1E+06 10E+06 100E+06 100E+03 1E+06 10E+06 100E+06 100E+03 1E+06 10E+06 100E+06 FREQUENCY [Hz] FREQUENCY [Hz] FREQUENCY [Hz] Fig.26 Frequency characteristic Fig.27 Frequency characteristic Fig.28 Frequency characteristic (Temperature dependence) (Supply voltage dependence) (Temperature dependence)

14/16 ●Cautions on use

1. Numbers and data in entries are representative design values and are not guaranteed values of the items. 2. Although ROHM is confident that the example application circuit reflects the best possible recommendations, be sure to verify circuit characteristics for your particular application. Modification of constants for other externally connected circuits may cause variations in both static and transient characteristics for external components as well as this Rohm IC. Allow for sufficient margins when determining circuit constants. 3. Absolute maximum ratings Use of the IC in excess of absolute maximum ratings, such as the applied voltage or operating temperature range (Topr), may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure, such as a fuse, should be implemented when using the IC at times where the absolute maximum ratings may be exceeded. 4. GND potential Ensure a minimum GND pin potential in all operating conditions. Make sure that no pins are at a voltage below the GND at any time, regardless of whether it is a transient signal or not. 5. Thermal design Perform thermal design, in which there are adequate margins, by taking into account the permissible dissipation (Pd) in actual states of use. 6. Short circuit between terminals and erroneous mounting Pay attention to the assembly direction of the ICs. Wrong mounting direction or shorts between terminals, GND, or other components on the circuits, can damage the IC. 7. Operation in strong electromagnetic Using the ICs in a strong electromagnetic field can cause operation malfunction. 8. Supply voltage of operation Although basic circuit function is guaranteed under normal voltage operation (4.75V~5.25V), ensure each parameter complies with appropriate electrical characteristics, when using this device. 9. The outside parts must be layout nearest to the IC and lines from must be short. 10. The coupling capacitor must be layout nearest to the IC and each pin. 11. VCC for this IC should use the same power source. Impedance should be connected as low as possible for each VCC pin and for each GND pin.

●Thermal derating characteristics

1400

1200

1000

800

600

400

200

POWER DISSIPATION : Pd[mW] 0 -50 -25 0 25 50 75 100 125 150

AMBIENT TEMPERATURE [℃]

Fig. 29

15/16

●Selection of order type

B H 7 6 2 5 K S 2

TYPE

BH7625KS2

SQFP-T52 Container Tray(with dry pack)

12.0 ± 0.3 Quantity 1000pcs 10.0 ± 0.2 39 27 Direction Direction of product is fixed in a tray. 40 26 0.3 0.2 of feed ± ±

52 14 0.5 12.0 10.0 113 0.125 ± 0.1 1pin 1pin 0.1 ± 0.65 0.3 ± 0.1 0.1 1.4 ± 0.15 0.1

(Unit:mm) ※Orders are available in complete units only.

The contents described herein are correct as of October, 2005 The contents described herein are subject to change without notice. For updates of the latest information, please contact and confirm with ROHM CO.,LTD. Any part of this application note must not be duplicated or copied without our permission. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams and information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. The products described herein utilize silicon as the main material. The products described herein are not designed to be X ray proof.

Published by Application Engineering Group Catalog NO.05T394Be '05.10 ROHM C 2000 TSU Appendix

Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document are no antiradiation design.

The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of which would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM cannot be held responsible for any damages arising from the use of the products under conditions out of the range of the specifications or due to non-compliance with the NOTES specified in this catalog.

Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact your nearest sales office.

ROHM Customer Support System THE / EUROPE / ASIA / www.rohm.com Contact us : webmaster@ rohm.co.jp

Copyright © 2008 ROHM CO.,LTD. 21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan TEL : +81-75-311-2121 : +81-75-315-0172 Appendix1-Rev2.0