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A Circuit-Based Approach for the Compensation of Self-Heating-Induced

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A Circuit-Based Approach for the Compensation of Self-Heating-Induced A Circuit-Based Approach for the Compensation of Self-Heating-Induced Errors in Bipolar Integrated-Circuit Comparators by KYLE WEBB A.B., Dartmouth College, 1997 B.E., Thayer School of Engineering, Dartmouth College, 1998 M.S., Oregon State University, 2005 A dissertation submitted to the Graduate Faculty of the University of Colorado Colorado Springs in partial fulfillment of the requirements for the degree of Doctor of Philosophy Department of Electrical and Computer Engineering 2013 ii © Copyright By Kyle Webb 2013 All Rights Reserved iii This dissertation for the Doctor of Philosophy degree by Kyle Webb has been approved for the Department of Electrical and Computer Engineering By T.S. Kalkur, Chair Andrew Ketsdever Anatoliy Pinchuk Heather Song Charlie Wang Date iv ABSTRACT Webb, Kyle (Ph.D., Engineering) A Circuit-Based Approach for the Compensation of Self-Heating-Induced Errors in Bipolar Integrated-Circuit Comparators Dissertation directed by Professor T.S. Kalkur Voltage comparator circuits are common integrated circuit (IC) building blocks found in ICs used in a variety of applications, including test and measurement instruments, wireline communication systems, and data converters. High-performance comparators are often fabricated in high-bandwidth bipolar processes, which are typically very susceptible to the effects of self- heating. Self-heating in comparator circuits manifests itself as signal-dependent propagation delay variation, which appears at the comparator output as data-dependent jitter. For comparators used in applications where precise timing measurements of threshold crossings are sought, self- heating is an issue that must be addressed. A circuit-based self-heating compensation scheme applicable to asynchronous comparator circuits has been designed, simulated, and implemented on a test chip fabricated in IBM’s BiCMOS8HP SiGe HBT IC process. This compensation scheme differs from prior work addressing self-heating-induced errors in comparator circuits, in that it is applicable to asynchronous, i.e., non-clocked, comparator circuits. It also represents an improvement over simpler compensation schemes commonly applied to non-clocked comparators, in that it is insensitive to input signal swing and common-mode variation. The central element of the self- heating compensation circuitry is a power-to-voltage converter (PVC) circuit that enables the generation of a feedback signal to provide self-heating compensation. Initial measurements of the test chip indicated that the comparator was over-compensated for the effects of self-heating. It is suspected that the excess compensation is due to differential v thermal resistance mismatch between the amplifier transistors being compensated and those in the compensation circuitry. It is believed that the thermal resistance mismatch is due to the effects of different metal-layer interconnects for the two pairs of transistors. A work-around was identified to reduce compensation path gain below its minimum designed-for value, allowing the self- heating compensation circuitry to be calibrated, even in the presence of the unexpected thermal resistance mismatch. Measurements of the comparator, both with the compensation circuitry enabled and with it disabled, showed that the self-heating compensation circuitry presented here provides effective compensation of self-heating-induced timing errors over a wide range of input signal conditions. vi ACKNOWLEDGEMENTS I am extremely grateful to the MOSIS Service for funding the fabrication of the test chip for this research through a MOSIS Educational Program Research grant. I would also like to thank Agilent Technologies in Colorado Springs for use of the test equipment for the characterization of the test chip. Thanks also to Jeff Riggs and Robert Greene at Spectrum LASER in Colorado Springs for their help with the mounting of the test chip onto the printed circuit board. Thanks also to Francisco Torres-Reyes and Sean Staples in the EAS IT department for their endless help keeping the Cadence toolset up and running. Finally, I’d like to thank my advisor, Professor T.S. Kalkur, as well as the College of Engineering and Applied Science, for their support of this research. vii TABLE OF CONTENTS ABSTRACT .................................................................................................................................... iv ACKNOWLEDGEMENTS ............................................................................................................ vi CHAPTER 1 .................................................................................................................................... 1 Introduction and Motivation ........................................................................................................ 1 Comparators ............................................................................................................................. 1 Self-Heating ............................................................................................................................. 3 Contributions of this Research ................................................................................................. 4 Organization of this Dissertation Proposal .............................................................................. 5 CHAPTER 2 .................................................................................................................................... 7 Self-Heating ................................................................................................................................. 7 Modeling Self-Heating Effects ................................................................................................ 7 Accounting for Self-Heating in Simulation ........................................................................... 13 Compensating for Self-Heating Effects ................................................................................. 14 CHAPTER 3 .................................................................................................................................. 16 Self-Heating Effects and Compensation in Analog Circuits ...................................................... 16 Self-Heating in Linear Differential Pair Amplifiers .............................................................. 16 Compensation of Self-Heating Effects in Linear Amplifiers ................................................. 23 CHAPTER 4 .................................................................................................................................. 30 Self-Heating Effects and Compensation in Digital Circuits ...................................................... 30 Self-Heating in Digital Differential Pair Amplifiers .............................................................. 30 Compensation of Self-Heating Effects in Digital Circuits ..................................................... 36 Assessing Self-Heating Effects and Compensation in Digital Circuits ................................. 37 viii CHAPTER 5 .................................................................................................................................. 43 Self-Heating Effects and Compensation in Comparators .......................................................... 43 Compensation of Self-Heating Effects in Comparators ......................................................... 45 Prior Works Addressing Self-Heating in Comparators .......................................................... 46 Feedback of a Self-Heating Compensation Signal ................................................................. 49 Assessing the Effectiveness of Comparator Self-Heating Compensation .............................. 56 CHAPTER 6 .................................................................................................................................. 57 Test Chip Circuit Design............................................................................................................ 57 Top-Level Comparator Design .............................................................................................. 58 Input Amplifier ...................................................................................................................... 59 Output Amplifier .................................................................................................................... 61 Comparator Core .................................................................................................................... 62 Self-Heating Compensation Circuitry .................................................................................... 63 Calibration Procedure ............................................................................................................ 76 Power Supplies ....................................................................................................................... 78 Layout .................................................................................................................................... 80 Package .................................................................................................................................. 83 CHAPTER 7 .................................................................................................................................. 84 Simulation Results ..................................................................................................................... 84 BiCMOS8HP
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