DOCSLIB.ORG

Non-Volatile Memory: Emerging Technologies and Their Impacts on Memory Systems

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Non-Volatile Memory: Emerging Technologies and Their Impacts on Memory Systems Pontifícia Universidade Católica do Rio Grande do Sul Faculdade de Informática Pós-Graduação em Ciência da Computação Non-Volatile Memory: Emerging Technologies And Their Impacts on Memory Systems Taciano Perez, César A. F. De Rose Technical Report Nº 060 Porto Alegre,PPGCC September 2010 Abstract For almost 30 years, computer memory systems have been essentially the same: volatile, high speed memory technologies like SRAM and DRAM used for cache and main memory; magnetic disks for high-end data storage; and persistent, low speed ash memory for storage with low capacity/low energy consumption requirements such as embedded/mobile devices. Today we watch the emergence of new non-volatile memory technologies, such as Phase- Change RAM (PCRAM), Magnetoresistive RAM (MRAM) and Resistive RAM (RRAM), that promise to radically change the landscape of memory systems. This paper summarizes the current state of memory system design, presents these new memory technologies and surveys the current proposals on how to apply these technologies to improve memory hierarchies. We conclude that the introduction of these new technologies will probably result in more complex memory hierarchies, but is likely to allow the construction of memory chips that are non-volatile, low-energy and have density and latency close to or better than current DRAM chips, improving performance/eciency and allowing memory systems to continue to scale up. 2 Contents ABSTRACT 2 Chapter 1: Introduction 5 Chapter 2: Memory Systems: Current Landscape 6 2.1 Processor Cache: SRAM . .7 2.2 Main Memory: DRAM . .9 2.3 Persistent Storage: Disk, Flash . 11 2.4 Limitations of Current Memory Technologies . 13 2.4.1 A Note on Energy-Proportional Computing . 15 Chapter 3: Emerging Memory Technologies 17 3.1 Phase-Change RAM (PCRAM) . 17 3.2 Resistive RAM (RRAM) . 18 3.2.1 Memristor . 19 3.3 Magnetoresistive RAM (MRAM) . 21 3.3.1 STT-RAM . 22 3.4 Comparison Between Memory Technologies . 23 Chapter 4: Impacts on Memory Systems 25 4.1 Cache . 25 4.1.1 MRAM as L2 and L3 cache . 25 4.1.2 Hybrid SRAM/MRAM and SRAM/PCRAM as L2 and L3 caches . 26 4.1.3 Fault-tolerant architecture for NVM caches . 27 4.2 Main Memory . 27 4.2.1 Pioneer work: ash-based main memory . 27 4.2.2 PCRAM as main memory . 28 4.2.2.1 Improving latency, energy and endurance through buer organization and partial writes . 28 3 4.2.2.2 Improving endurance and energy consumption through 3D stacking . 29 4.2.2.3 Combining both approaches . 30 4.2.3 Hybrid PCRAM-DRAM main memory . 30 4.2.3.1 Qureshi et al. hybrid approach . 30 4.2.3.2 FLAM hybrid approach . 31 4.2.3.3 BPRAM hybrid approach . 32 4.3 Persistent Storage . 33 4.3.1 PCRAM as a disk replacement . 33 4.3.2 PCRAM or STT-MRAM as disk replacement . 34 4.4 Other Memory Systems . 36 4.4.1 PCRAM for MPP checkpointing . 36 4.4.2 MRAM in GPU. 37 4.5 Operating System . 37 4.5.1 OS improvements to support FLAM. 37 4.5.2 BPFS le system . 38 Chapter 5: Conclusion 40 BIBLIOGRAPHY 42 4 1 Introduction For almost 30 years the memory hierarchy used in computer design has been essentially the same: volatile, high speed memory technologies like SRAM and DRAM used for cache and main memory; magnetic disks for high-end data storage; and persistent, low speed ash memory for storage with low capacity/low energy consumption requirements, such as embedded/mobile devices [13]. Today we watch the emergence of new memory technologies under research that promise to change signicantly the landscape of memory systems. Non-Volatile Memory (NVM) technologies such as Phase-Change RAM (PCRAM), Magnetic RAM (MRAM) and Re- sistive RAM (RRAM) will possibly enable memory chips that are non-volatile, require low-energy and have density and latency closer to current DRAM chips [4]. Even though most of these technologies are still in early prototyping stages, their ex- pected properties in terms of density, latency, energy and endurance are already estimated. Based on these estimations, several papers have been published proposing practical appli- cations for these new NVM technologies. These papers provide initial insight on what the impacts on memory systems should be if such technologies evolve to be competitive in the market. The memory system is one of the most critical components of modern computers. It has attained a high level of complexity due to the many layers involved in memory hierarchy: application software, operating system, cache, main memory and disk. Any relevant change in one level of the memory hierarchy (such as the introduction of the aforementioned NVM technologies) can potentially impact several other layers and overall system behavior. For this reason, it is essential to consider the dierent possible scenarios for using these new memory technologies from a broad perspective. There are several studies that explore the impact of new NVM technologies on specic parts of the memory system, but we are not aware of any comprehensive survey of the literature on potential applications of new NVM technologies. The intention of the present work is to provide such comprehensive survey. To attain this goal, it is divided in four sections: 1. A review of the current technologies used in memory systems. 2. A presentation of the most relevant NVM technologies currently under research: PCRAM, RRAM and MRAM. 3. A survey of the practical applications proposed so far for these technologies. 4. A discussion of their implications for memory system design. 5 2 Memory Systems: Current Landscape In order to discuss the emergent NVM technologies, we need to start by summarizing the current state of memory systems. This is a well-known subject, and we have extracted most of the information present in this section from the comprehensive textbook Memory Systems: Cache, DRAM, Disk by Bruce Jacob, Spencer W. Ng and David T. Wang [13] and Ulrich Drepper's online paper What Every Programmer Should Know About Memory [9]. An ideal memory system would be fast, cheap, persistent and big (highly dense). Until now, all known memory/storage technologies address only some of these characteristics. Static RAM (SRAM) is very fast, but it's expensive, has low density and is not persistent. Dynamic RAM (DRAM) has better densities and is cheaper (but still expensive) at the cost of being a little slower, and it's not persistent as well. Disks are cheap, highly dense and persistent, but very slow. Flash memory is between DRAM and disk; it is a persistent solid-state memory with higher densities than DRAM, but its write latency is much higher than the latter. Fortunately, it is possible to design a memory system that incorporates all these dier- ent technologies in a single memory hierarchy. Such hierarchy allows the creation of a system that approaches the performance of the fastest component, the cost of the cheapest component and energy consumption of the most power-ecient component. This is pos- sible due to a phenomenon known as locality of reference, so named because memory references tend to be localized in time and space. This can be so summarized: If you use something once, you are likely to use it again (temporal locality). If you use something once, you are likely to use its neighbor (spatial locality) [13]. This phenomenon can be exploited by creating dierent memory levels; the rst levels are smaller and more expensive, but have fastest access, and the other layers are progressively bigger and cheaper, but have slower access times. Appropriate heuristics are then applied to decide which data will be accessed more often and place them at the rst levels, and move the data down on the hierarchy as it ceases to be used frequently. Figure 2.1 depicts the concept of memory hierarchy. For at least the last 30 years, we have been building memory hierarchies that rely on SRAM for caches, DRAM for main memory and disk or ash as persistent storage. In the next sections we will describe these technologies in more detail. 6 Figure 2.1: Diagram illustrating the concept of memory hierarchy. 2.1 Processor Cache: SRAM Caches are used to store frequently used information close to who needs it. They are used at several layers of computer architecture, but probably the most important are processor caches. In order to explore locality of reference, we need to place memory with very fast access close to the processor. The result is that processor caches reside between the processor and main memory, as depicted in Figure 2.2a. Processor caches usually are transparent caches, meaning that the same addressing space is shared between the cache and the backing storage. When the processor asks for the contents of a specic memory address, these contents are rst searched in the cache. If they are found (a cache hit), they are immediately returned. If they are not found (a cache miss), the memory system goes on to the next hierarchy level (e.g., main memory) and fetches the result. If there is a high probability that the returned result will be used again in the future, it is stored in the cache as well. Diverse heuristics can be used to manage cache content [13]. The speed of a cache is typically in inverse proportion to its size. This happens because the more addresses a cache can contain, more search needs to be done in order to determine whether there is a cache hit or miss. For this reason, modern computers have more than one cache level, frequently up to 3 levels.
Load more

Recommended publications
  • Multilevel-Cell Phase-Change Memory - Modeling and Reliability Framework
    MULTILEVEL-CELL PHASE-CHANGE MEMORY - MODELING AND RELIABILITY FRAMEWORK THÈSE NO 6801 (2016) PRÉSENTÉE LE 14 JANVIER 2016 À LA FACULTÉ DES SCIENCES ET TECHNIQUES DE L'INGÉNIEUR LABORATOIRE DE SYSTÈMES MICROÉLECTRONIQUES PROGRAMME DOCTORAL EN GÉNIE ÉLECTRIQUE ÉCOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE POUR L'OBTENTION DU GRADE DE DOCTEUR ÈS SCIENCES PAR Aravinthan ATHMANATHAN acceptée sur proposition du jury: Prof. G. De Micheli, président du jury Prof. Y. Leblebici, Dr M. Stanisavljevic, directeurs de thèse Dr E. Eleftheriou, rapporteur Dr R. Bez, rapporteur Dr J. Brugger, rapporteur Suisse 2016 All birds find shelter during a rain . But eagle avoids rain by flying above the clouds . Problems are common, but attitude makes the difference . — Dr. A. P.J. Abdul Kalam To my parents and wife. Acknowledgements This accomplishment would not have been possible without the wonderful people who have inspired me on my journey towards the PhD. This PhD challenge would have been more of an academic title than a great adventure if not for them. I consider myself fortunate to have spent the last four years of my life in a great research atmosphere for learning, and also working with some exceptional individuals during the course of my doctoral studies. I am greatly indebted to my supervisor, Prof. Yusuf Leblebici, who gave me the independence to pursue my ideas freely, while at the same time mentoring by example. I am especially grateful to my manager, Dr. Evangelos Eleftheriou, for giving me this wonderful opportunity to pursue my PhD thesis with IBM Research. His energy and enthusiasm have been an inspiration for me to aim ever higher in my pursuits.
    [Show full text]
  • Class Notes Class: IX Topic: INPUT, OUTPUT, MEMORY and STORAGE DEVICES of a COMPUTER SYSTEM Subject: INFORMATION TECHNOLOGY
    Class Notes Class: IX Topic: INPUT, OUTPUT, MEMORY AND STORAGE DEVICES OF A COMPUTER SYSTEM Subject: INFORMATION TECHNOLOGY Q1. A collection of eight bits is called BYTE Q2. Which of the following is an example of non-volatile memory? a) ROM b)RAM c) LSI d) VLSI Q3. Which of the following is unit of measurement used with computer system? a) Byte b) Megabyte c) Gigabyte d) All of the above Q4. Which of the following statement is false? a) Secondary storage in non-volatile. b) Primary storage is volatile. c) When the computer is turned off, data and instructions stored in primary storage are erased. d) None of the above. Q5. The secondary storage devices can only store data but they cannot perform a) Arithmetic operation b) Logic operation c) Fetch operation d) Either of above Q6. Which of the following does not represent an I/O device a) Speaker which beep b) Plotter C) Joystick d) ALU Q7. Which of the following is a correct definition of volatile memory? a) It loses its content at high temperatures. b) It is to be kept in airtight boxes. c) It loses its contents on failure of power supply d) It does not lose its contents on failure of power supply Q8. One thousand byte represent a a) Megabyte b) Gigabyte c) Kilobyte d) None of these Q9.What does a storage unit provide? a) A place to show data b) A place to store currently worked on information b) A place to store information Q10. What are four basic components of a computer? a) Input devices, Output devices, printing and typing b) Input devices, processing unit, storage and Output devices c) Input devices, CPU, Output devices and RAM Q11.
    [Show full text]
  • The Era of Expeditious Nanoram-Based Computers Enhancement of Operating System Performance in Nanotechnology Environment
    International Journal of Applied Engineering Research ISSN 0973-4562 Volume 13, Number 1 (2018) pp. 375-384 © Research India Publications. http://www.ripublication.com The Era of Expeditious NanoRAM-Based Computers Enhancement of Operating System Performance in Nanotechnology Environment Mona Nabil ElGohary PH.D Student, Computer Science Department Faculty of Computers and Information, Helwan University, Cairo, Egypt. 1ORCID: 0000-0002-1996-4673 Dr. Wessam ElBehaidy Assistant Professor, Computer Science Department, Faculty of Computers and Information, Helwan University, Cairo, Egypt. Ass. Prof. Hala Abdel-Galil Associative Professor, Computer Science Department Faculty of Computers and Information, Helwan University, Cairo, Egypt. Prof. Dr. Mostafa-Sami M. Mostafa Professor of Computer Science Faculty of Computers and Information, Helwan University, Cairo, Egypt. Abstract They announced that by 2018 will produce the first NanoRAM. The availability of a new generation of memory that is 1000 times faster than traditional DDRAM which can deliver This new NanoRam has many excellent properties that would terabytes of storage capacity, and consumes very little power, make an excellent replacement for the current DDRAM: being has the potential to change the future of the computer’s non-volatile, its large capacity, high speed read / write cycles. operating system. This paper studies the different changes that All the properties are introduced in the next section. will arise on the operating system functions; memory By replacing this NanoRAM instead of DDRAM in the CPU, management and job scheduling (especially context switch) this will affect the functionality of the operating system; such when integrating NanoRAM into the computer system. It is as main memory management, virtual memory, job scheduling, also looking forward to evaluating the possible enhancements secondary storage management; and thus the efficiency of the of computer’s performance with NanoRAM.
    [Show full text]
  • Universal Memory
    BRIEFING No.4 ICT UNIVERSAL MEMORY Memory is an integral part of information processing devices and is needed for short‐term stor‐ age such as when computer programs are being executed or text documents are processed. Currently, three main types of memory exist: SRAM offers very high speed at a high cost, DRAM is average in terms of speed and cost, and Flash memory is a low cost, low speed solution for applications that need to retain the data even when power is disconnected. A group of emerg‐ ing memory devices called universal memory aim to combine all these features in a single de‐ vice.1 Developments in universal memory devices may eventually lead to the introduction of novel October 2010 October memory architectures that offer increased performance, enable smaller mobile devices, and offer novel features in traditional products such as cars or domestic appliances. Nanotechnol‐ ogy is an integral part of emerging memory research as it is becoming increasingly difficult to enhance the performance of current devices by scaling the technology further. It is unlikely that a single technology will emerge as the universal memory technology; however, the develop‐ ments in this sector will enhance the energy efficiency and performance of memory devices. Currently, the Integrated Circuit (IC) market is dominated by US and Asia based companies. Uni‐ versal memory and nanotechnology based solutions could provide an opportunity for Europe to gain ground in the sector. Background volatility. Its disadvantage compared to SRAM and DRAM is speed. None of the existing memory technologies provide all of the required properties.
    [Show full text]
  • Let's Talk About Storage & Recovery Methods for Non-Volatile Memory
    Let’s Talk About Storage & Recovery Methods for Non-Volatile Memory Database Systems Joy Arulraj Andrew Pavlo Subramanya R. Dulloor [email protected] [email protected] [email protected] Carnegie Mellon University Carnegie Mellon University Intel Labs ABSTRACT of power, the DBMS must write that data to a non-volatile device, The advent of non-volatile memory (NVM) will fundamentally such as a SSD or HDD. Such devices only support slow, bulk data change the dichotomy between memory and durable storage in transfers as blocks. Contrast this with volatile DRAM, where a database management systems (DBMSs). These new NVM devices DBMS can quickly read and write a single byte from these devices, are almost as fast as DRAM, but all writes to it are potentially but all data is lost once power is lost. persistent even after power loss. Existing DBMSs are unable to take In addition, there are inherent physical limitations that prevent full advantage of this technology because their internal architectures DRAM from scaling to capacities beyond today’s levels [46]. Using are predicated on the assumption that memory is volatile. With a large amount of DRAM also consumes a lot of energy since it NVM, many of the components of legacy DBMSs are unnecessary requires periodic refreshing to preserve data even if it is not actively and will degrade the performance of data intensive applications. used. Studies have shown that DRAM consumes about 40% of the To better understand these issues, we implemented three engines overall power consumed by a server [42]. in a modular DBMS testbed that are based on different storage Although flash-based SSDs have better storage capacities and use management architectures: (1) in-place updates, (2) copy-on-write less energy than DRAM, they have other issues that make them less updates, and (3) log-structured updates.
    [Show full text]
  • Nanotechnology ? Nram (Nano Random Access
    International Journal Of Engineering Research and Technology (IJERT) IFET-2014 Conference Proceedings INTERFACE ECE T14 INTRACT – INNOVATE - INSPIRE NANOTECHNOLOGY – NRAM (NANO RANDOM ACCESS MEMORY) RANJITHA. T, SANDHYA. R GOVERNMENT COLLEGE OF TECHNOLOGY, COIMBATORE 13. containing elements, nanotubes, are so small, NRAM technology will Abstract— NRAM (Nano Random Access Memory), is one of achieve very high memory densities: at least 10-100 times our current the important applications of nanotechnology. This paper has best. NRAM will operate electromechanically rather than just been prepared to cull out answers for the following crucial electrically, setting it apart from other memory technologies as a questions: nonvolatile form of memory, meaning data will be retained even What is NRAM? when the power is turned off. The creators of the technology claim it What is the need of it? has the advantages of all the best memory technologies with none of How can it be made possible? the disadvantages, setting it up to be the universal medium for What is the principle and technology involved in NRAM? memory in the future. What are the advantages and features of NRAM? The world is longing for all the things it can use within its TECHNOLOGY palm. As a result nanotechnology is taking its head in the world. Nantero's technology is based on a well-known effect in carbon Much of the electronic gadgets are reduced in size and increased nanotubes where crossed nanotubes on a flat surface can either be in efficiency by the nanotechnology. The memory storage devices touching or slightly separated in the vertical direction (normal to the are somewhat large in size due to the materials used for their substrate) due to Van der Waal's interactions.
    [Show full text]
  • ROSS: a Design of Read-Oriented STT-MRAM Storage for Energy
    ROSS: A Design of Read-Oriented STT-MRAM Storage for Energy-Efficient Non-Uniform Cache Architecture Jie Zhang, Miryeong Kwon, Chanyoung Park, Myoungsoo Jung, and Songkuk Kim School of Integrated Technology, Yonsei Institute Convergence Technology, Yonsei University [email protected], [email protected], [email protected], [email protected], [email protected] Abstract high leakage power. With increasing demand for larger caches, SRAM is struggling to keep up with the density Spin-Transfer Torque Magnetoresistive RAM (STT- and energy-efficiency requirements set by state-of-the- MRAM) is being intensively explored as a promis- art system designs. ing on-chip last-level cache (LLC) replacement for Thanks to the device-level advantages of STT-MRAM SRAM, thanks to its low leakage power and high stor- such as high-density structure, zero leakage current, and age capacity. However, the write penalties imposed by very high endurance, it comes out as an excellent candi- STT-MRAM challenges its incarnation as a successful date to replace age-old SRAM for LLC design. However, LLC by deteriorating its performance and energy effi- the performance of STT-MRAM is critically sensitive to ciency. This write performance characteristic unfortu- write frequency due to its high write latency and energy nately makes STT-MRAM unable to straightforwardly values. Therefore, an impulsive replacement of SRAM substitute SRAM in many computing systems. with high-density STT-MRAM, simply for increasing In this paper, we propose a hybrid non-uniform cache LLC capacity, can deteriorate cache performance and in- architecture (NUCA) by employing STT-MRAM as a troduce poor energy consumption behavior.
    [Show full text]
  • Non-Volatile Memory Databases
    15-721 ADVANCED DATABASE SYSTEMS Lecture #24 – Non-Volatile Memory Databases Andy Pavlo // Carnegie Mellon University // Spring 2016 @Andy_Pavlo // Carnegie Mellon University // Spring 2017 2 ADMINISTRIVIA Final Exam: May 4th @ 12:00pm → Multiple choice + short-answer questions. → I will provide sample questions this week. Code Review #2: May 4th @ 11:59pm → We will use the same group pairings as before. Final Presentations: May 9th @ 5:30pm → WEH Hall 7500 → 12 minutes per group → Food and prizes for everyone! CMU 15-721 (Spring 2017) 3 TODAY’S AGENDA Background Storage & Recovery Methods for NVM CMU 15-721 (Spring 2017) 4 NON-VOLATILE MEMORY Emerging storage technology that provide low latency read/writes like DRAM, but with persistent writes and large capacities like SSDs. → AKA Storage-class Memory, Persistent Memory First devices will be block-addressable (NVMe) Later devices will be byte-addressable. CMU 15-721 (Spring 2017) 5 FUNDAMENTAL ELEMENTS OF CIRCUITS Capacitor Resistor Inductor (ca. 1745) (ca. 1827) (ca. 1831) CMU 15-721 (Spring 2017) 6 FUNDAMENTAL ELEMENTS OF CIRCUITS In 1971, Leon Chua at Berkeley predicted the existence of a fourth fundamental element. A two-terminal device whose resistance depends on the voltage applied to it, but when that voltage is turned off it permanently remembers its last resistive state. TWO CENTURIES OF MEMRISTORS Nature Materials 2012 CMU 15-721 (Spring 2017) 7 FUNDAMENTAL ELEMENTS OF CIRCUITS Capacitor Resistor Inductor Memristor (ca. 1745) (ca. 1827) (ca. 1831) (ca. 1971) CMU 15-721 (Spring 2017) 8 MERISTORS A team at HP Labs led by Stanley Williams stumbled upon a nano-device that had weird properties that they could not understand.
    [Show full text]
  • Fast Non-Volatile RAM Products Superior Price and Performance from a Source You Can Trust
    Fast Non-Volatile RAM Products Superior price and performance from a source you can trust www.freescale.com/MRAM The Future of Non-Volatile Read/Write Memory is Magnetic Freescale Semiconductor delivers the world’s non-volatile for greater than 20 years. Commercial MRAM Products Selector Guide Freescale MRAM Features first commercial magnetoresistive random SRAM-compatible packaging assures Part Number Density Configuration Voltage Speed Grades Temperature Package RoHS Compliant • 35 ns read/write cycle time access memory (MRAM) products. Our alternate sourcing from other suppliers. MR2A16ATS35C 4 Mb 256 Kb x 16 3.3V 35 ns 0 to 70°C 44-TSOP Type II √ • Unlimited read/write endurance MRAM products store data using magnetic MR1A16AYS35 2 Mb 128 Kb x 16 3.3V 35 ns 0 to 70°C 44-TSOP Type II √ • 3.3V ± 10 percent power supply polarization rather than electric charge. Extended Temperature Range and MR0A16AYS35 1 Mb 64 Kb x 16 3.3V 35 ns 0 to 70°C 44-TSOP Type II √ • Always non-volatile with greater than MRAM stores data for decades while reading Superior Reliability 20-year retention and writing at SRAM speed without wear- MRAM delivers a 3 volt high-density out. MRAM products use small, simple • Magnetically shielded to greater than non-volatile RAM that operates over extended cells to deliver the highest density and best 25 oersted (Oe) temperature. MRAM does not exhibit the price/performance in the non-volatile RAM • Commercial, Industrial and Extended charge storage failure modes that limit the marketplace. With our new expanded product Temperature Options data retention or endurance of line, we serve a growing portion of the other technologies.
    [Show full text]
  • Nanotechnology Trends in Nonvolatile Memory Devices
    IBM Research Nanotechnology Trends in Nonvolatile Memory Devices Gian-Luca Bona [email protected] IBM Research, Almaden Research Center © 2008 IBM Corporation IBM Research The Elusive Universal Memory © 2008 IBM Corporation IBM Research Incumbent Semiconductor Memories SRAM Cost NOR FLASH DRAM NAND FLASH Attributes for universal memories: –Highest performance –Lowest active and standby power –Unlimited Read/Write endurance –Non-Volatility –Compatible to existing technologies –Continuously scalable –Lowest cost per bit Performance © 2008 IBM Corporation IBM Research Incumbent Semiconductor Memories SRAM Cost NOR FLASH DRAM NAND FLASH m+1 SLm SLm-1 WLn-1 WLn WLn+1 A new class of universal storage device : – a fast solid-state, nonvolatile RAM – enables compact, robust storage systems with solid state reliability and significantly improved cost- performance Performance © 2008 IBM Corporation IBM Research Non-volatile, universal semiconductor memory SL m+1 SL m SL m-1 WL n-1 WL n WL n+1 Everyone is looking for a dense (cheap) crosspoint memory. It is relatively easy to identify materials that show bistable hysteretic behavior (easily distinguishable, stable on/off states). IBM © 2006 IBM Corporation IBM Research The Memory Landscape © 2008 IBM Corporation IBM Research IBM Research Histogram of Memory Papers Papers presented at Symposium on VLSI Technology and IEDM; Ref.: G. Burr et al., IBM Journal of R&D, Vol.52, No.4/5, July 2008 © 2008 IBM Corporation IBM Research IBM Research Emerging Memory Technologies Memory technology remains an
    [Show full text]
  • Computer Conservation Society
    Issue Number 88 Winter 2019/20 Computer Conservation Society Aims and Objectives The Computer Conservation Society (CCS) is a co-operative venture between BCS, The Chartered Institute for IT; the Science Museum of London; and the Science and Industry Museum (SIM) in Manchester. The CCS was constituted in September 1989 as a Specialist Group of the British Computer Society. It is thus covered by the Royal Charter and charitable status of BCS. The objects of the Computer Conservation Society (“Society”) are: To promote the conservation, restoration and reconstruction of historic computing systems and to identify existing computing systems which may need to be archived in the future; To develop awareness of the importance of historic computing systems; To develop expertise in the conservation, restoration and reconstruction of historic computing systems; To represent the interests of the Society with other bodies; To promote the study of historic computing systems, their use and the history of the computer industry; To publish information of relevance to these objectives for the information of Society members and the wider public. Membership is open to anyone interested in computer conservation and the history of computing. The CCS is funded and supported by a grant from BCS and from donations. There are a number of active projects on specific computer restorations and early computer technologies and software. Younger people are especially encouraged to take part in order to achieve skills transfer. The CCS also enjoys a close relationship with the National Museum of Computing. Resurrection The Journal of the Computer Conservation Society ISSN 0958-7403 Number 88 Winter 2019/20 Contents Society Activity 2 News Round-Up 9 The Data Curator 10 Paul Cockshott From Tea Shops to Computer Company: The Improbable 15 Story of LEO John Aeberhard Book Review: Early Computing in Britain Ferranti Ltd.
    [Show full text]
  • Magnetic Storage- Magnetic-Core Memory, Magnetic Tape,RAM
    Magnetic storage- From magnetic tape to HDD Juhász Levente 2016.02.24 Table of contents 1. Introduction 2. Magnetic tape 3. Magnetic-core memory 4. Bubble memory 5. Hard disk drive 6. Applications, future prospects 7. References 1. Magnetic storage - introduction Magnetic storage: Recording & storage of data on a magnetised medium A form of „non-volatile” memory Data accessed using read/write heads Widely used for computer data storage, audio and video applications, magnetic stripe cards etc. 1. Magnetic storage - introduction 2. Magnetic tape 1928 Germany: Magnetic tape for audio recording by Fritz Pfleumer • Fe2O3 coating on paper stripes, further developed by AEG & BASF 1951: UNIVAC- first use of magnetic tape for data storage • 12,7 mm Ni-plated brass-phosphorus alloy tape • 128 characters /inch data density • 7000 ch. /s writing speed 2. Magnetic tape 2. Magnetic tape 1950s: IBM : patented magnetic tape technology • 12,7 mm wide magnetic tape on a 26,7 cm reel • 370-730 m long tapes 1980: 1100 m PET –based tape • 18 cm reel for developers • 7, 9 stripe tapes (8 bit + parity) • Capacity up to 140 MB DEC –tapes for personal use 2. Magnetic tape 2014: Sony & IBM recorded 148 Gbit /squareinch tape capacity 185 TB! 2. Magnetic tape Remanent structural change in a magnetic medium Analog or digital recording (binary storage) Longitudinal or perpendicular recording Ni-Fe –alloy core in tape head 2. Magnetic tape Hysteresis in magnetic recording 40-150 kHz bias signal applied to the tape to remove its „magnetic history” and „stir” the magnetization Each recorded signal will encounter the same magnetic condition Current in tape head proportional to the signal to be recorded 2.
    [Show full text]