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Multilevel-Cell Phase-Change Memory - Modeling and Reliability Framework

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Multilevel-Cell Phase-Change Memory - Modeling and Reliability Framework MULTILEVEL-CELL PHASE-CHANGE MEMORY - MODELING AND RELIABILITY FRAMEWORK THÈSE NO 6801 (2016) PRÉSENTÉE LE 14 JANVIER 2016 À LA FACULTÉ DES SCIENCES ET TECHNIQUES DE L'INGÉNIEUR LABORATOIRE DE SYSTÈMES MICROÉLECTRONIQUES PROGRAMME DOCTORAL EN GÉNIE ÉLECTRIQUE ÉCOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE POUR L'OBTENTION DU GRADE DE DOCTEUR ÈS SCIENCES PAR Aravinthan ATHMANATHAN acceptée sur proposition du jury: Prof. G. De Micheli, président du jury Prof. Y. Leblebici, Dr M. Stanisavljevic, directeurs de thèse Dr E. Eleftheriou, rapporteur Dr R. Bez, rapporteur Dr J. Brugger, rapporteur Suisse 2016 All birds find shelter during a rain . But eagle avoids rain by flying above the clouds . Problems are common, but attitude makes the difference . — Dr. A. P.J. Abdul Kalam To my parents and wife. Acknowledgements This accomplishment would not have been possible without the wonderful people who have inspired me on my journey towards the PhD. This PhD challenge would have been more of an academic title than a great adventure if not for them. I consider myself fortunate to have spent the last four years of my life in a great research atmosphere for learning, and also working with some exceptional individuals during the course of my doctoral studies. I am greatly indebted to my supervisor, Prof. Yusuf Leblebici, who gave me the independence to pursue my ideas freely, while at the same time mentoring by example. I am especially grateful to my manager, Dr. Evangelos Eleftheriou, for giving me this wonderful opportunity to pursue my PhD thesis with IBM Research. His energy and enthusiasm have been an inspiration for me to aim ever higher in my pursuits. I am also thankful to my manager, Dr. Haralampos Pozidis, for his constant motivation and guidance throughout the course of my PhD thesis. I would also like to thank my thesis co-advisor, Dr. Milos Stanisavljevic, who has been my mentor and guide from the very beginning of my PhD studies, and has constantly provided me with help and encouragement on both professional and personal fronts. I would also like to thank my second co-advisor, Dr. Daniel Krebs, for his constant efforts in shaping me for my PhD. Research in engineering is an extremely collaborative effort. I would like to acknowledge here my amazing colleagues and collaborators whose contributions helped in various aspects of my research. 1. Dr. Milos Stanisavljevic at IBM Research – Zurich- in the design and implementation of the various programming and readout architectures for MLC PCM. 2. Dr. Daniel Krebs at IBM Research – Zurich - in the development of the finite-element method based thermoelectric model using COMSOL Multiphysics software. 3. Dr. Haralampoz Pozidis at IBM Research – Zurich - in the design and analysis of the drift-tolerant coding and detection schemes which are used for the demonstration of reliable triple-level cell storage. 4. Dr. Nikolaos Papandreou and Mr. Urs Egger at IBM Research – Zurich - in the imple- mentation of the embedded FPGA-based hardware characterization platform for the reliability experiments performed on the prototype PCM chip. i Acknowledgements 5. Dr. Abu Sebastian and Mr. Manuel Le Gallo at IBM Research – Zurich - in the develop- ment of the thermoelectric model by providing their valuable insights and experimental measurements. 6. Dr. Chung H. Lam and Dr. Matt Brightsky at IBM T. J. Watson Research center - for the fabrication and development of the prototype chips which were essentially used for the characterization experiments. The IBM-SK Hynix joint-development agreement for PCRAM development, which funded a portion of my doctoral research, enabled me to collaborate with the various industrial re- search laboratories (IBM T. J. Watson Research in Yorktown Heights, USA, and Next Generation Memories research at SK-Hynix, South Korea), and provided a platform to exchange ideas with leading researchers from the PCM research community. I would like to thank my thesis jury members − Prof. Giovanni De Micheli, Prof. Jürgen Brugger, Dr. Roberto Bez and Dr. Evangelos Eleftheriou − for evaluating my thesis and providing valuable feedback and insights. I would like to thank my colleagues of the Non-volatile memory systems group at IBM Research – Zurich - Thomas Parnell, Thomas Mittelholzer, Tobias Blätter and Nikolaos Papandreou - for their friendship and support, and for constantly inspiring me with their accomplishments. Thanks to Haralampos Pozidis, Milos Stanisavljevic and Charlotte Bolliger for proof-reading my thesis. I would also thank the friends I made from IBM and EPFL − Arvind Raj, Vinodh, Viswanathan, Prasad, Nirmalraj, Jelena, Kazim, Jayant, Nicola, Rakesh and Felix - for the many enjoyable and intellectual conversations. I would also like to thank my friends Kumaran, Harish, Sailokesh, Mukund, Sindhuja, Siddharth, Ashwin Kumar, Vijayabalaji, Aishwarya, Vamsi Krishna who, despite living in far-away lands, always made me feel close to their hearts. I am truly indebted to my loving parents for everything I achieved. I would like to thank my mom and dad, Mangalam and Athmanathan, for being everything in my life, my sister Anusha and my brother-in-law Vinodh for their love, care and support during my studies and beyond. I am grateful to my wife Anuradha for being my soulmate, and source of my happiness. Her presence has added significant meaning to my life. Her unconditional love and care helped and motivated me to get through all tough times of my PhD thesis. I enjoy sharing my research experience with her and I dedicate this dissertation to my beloved lovely wife, Anuradha. Finally, a special note of thanks to the beautiful town of Adliswil, in the canton of Zürich for giving me many wonderful memories, which I can cherish for the rest of my life, and for making the last four years some of the happiest of my life. Lausanne, 14 August 2015 Aravinthan Athmanathan ii Abstract In the modern digital era of big data applications, there is an ever-increasing demand for higher memory capacity that is both reliable and cost effective. In the domain of non-volatile memory systems, Flash-based storage devices have dominated the consumer space for the past 15 years and have also entered the enterprise storage system in the past 2-3 years. However, with Flash memory devices facing serious scalability limits, there is an imminent need to explore the viability of other non-volatile memory technologies that can replace or complement Flash-based storage in the near future. Significant research efforts have been invested by various universities and research organization across the globe into realizing the so-called next-generation memories (NGMs). Phase-change memory is one such technology, which is viewed as the most promising candidate among the emerging technologies. Phase-Change Memory (PCM) technology is not new as the principle of storing information in chalcogenide-based materials was first explored in the 1960s. However, with the predomi- nance of charge-based memory technology (DRAM, Flash storage, etc) thriving thanks to the technological advancements of metal-oxide semiconductor field-effect transistor (MOSFET) based devices, it was not until the late 90s that renewed interest in the class of phase-change materials was ignited. This is the same genre of materials as have been widely used in laser- driven optical storage (rewritable CDs and DVDs) during the past 20 years or so. Although PCM chips have already been mass-produced by companies like Micron and Samsung, their capacity was limited as they were based on single-level cell (SLC) storage. The primary re- search focus of this thesis is on increasing the memory capacity by storing more than one bit of information per device, known as multilevel-cell (MLC). Achieving MLC capability is quite challenging, and we disclose some of our significant achievements in the realization of MLC PCM in the past few years. One of the main concerns for the sustainability of PCM technology is the power-hungry RE- SET process. Thermoelectric physics in nano-scale PCM devices is shown to play a significant role in the programming of these devices. Interestingly, these effects result in better thermal confinement and can even pave the way for more power-efficient devices. Therefore, it is high time that the thermoelectric physics within the devices is completely understood. Reliability is the other major concern for PCM technology, especially in the realization of multilevel-cell storage at highly dense PCM arrays. Several MLC-enabling technological advancements that suppress the drift phenomenon and array variability have been explored in the recent past. iii Abstract Although a small number of demonstrations of MLC PCM feasibility have been performed, there is a need for the holistic application of enabling technologies in order to fully address the major reliability issues. In this thesis, a comprehensive thermoelectric model is proposed for investigating the thermoelectrics physics in PCM device operation. With the increasing role of thermoelectrics at the smaller technology nodes, the proposed model provides valuable insights for a complete understanding of device operation. The model is validated by comparing the simulation results with experimental measurements. The model can also be used for fine-tuning the material properties, device design and geometry to improve the efficacy of these devices. In the second part of the thesis, the dominant reliability concerns in PCM technology are addressed, particularly focusing on MLC operation. We present a readout circuit for PCM specifically designed for drift resilience in MLC operation. Drift resilience is achieved through the use of specific non-resistance-based cell-state metrics which, in contrast to the traditional cell-state metric, i.e., the low-field electrical resistance, have built-in drift robustness. By employing novel MLC-enabling techniques, we succeeded in demonstrating for the first time, reliable 3-bits/cell memory density with a data retention of 1 week at temperatures ranging ◦ ◦ from 30 Cto80 C on devices that had been pre-cycled one million times.
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