DOCSLIB.ORG

High Temperature Memories in Sic Technology

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
High Temperature Memories in Sic Technology DEGREE PROJECT, IN NANOTECHNOLOGY , SECOND LEVEL STOCKHOLM, SWEDEN 2014 High Temperature Memories in SiC Technology MATTIAS EKSTRÖM KTH ROYAL INSTITUTE OF TECHNOLOGY SCHOOL OF INFORMATION AND COMMUNICATION TECHNOLOGY IT261X 2014 High Temperature Memories in SiC Technology Mattias Ekström 900502-4972 [email protected] Nanotechnology High Temperature Memories in SiC Technology Page 1 of 179 IT261X 2014 High Temperature Memories in SiC Technology Mattias Ekström 900502-4972 [email protected] Nanotechnology Abstract This thesis is part of the Working On Venus (WOV) project. The aim of the project is to design electronics in silicon carbide (SiC) that can withstand the extreme surface environment of Venus. This thesis investigates some possible computer memory technologies that could survive on the surface of Venus. A memory must be able to function at 460 °C and after a total radiation dose of at least 200 Gy (SiC). This thesis is a literature survey. The thesis covers several Random-Access Memory (RAM) technologies: Static RAM (SRAM), Dynamic RAM (DRAM), Ferroelectric RAM (FeRAM), Magnetic RAM (MRAM), Resistive RAM (RRAM) and Phase Change Memory (PCM). The Electrical Erasable Programmable Read-Only Memory, Flash memory and SONOS are also covered. Focus lies on device- and material-physics of the memory cells, and their extreme environment behaviour. This thesis concludes with a discussion on technology options. The technologies are compared for their suitability for extreme environment. The thesis gives a recommendation for which memory technologies should be investigated. The final recommendation is to investigate SRAM, SONOS, FeRAM and RRAM technologies for high temperature applications. Sammanfattning Denna uppsats är en del av projektet Working On Venus (WOV). Projektets mål är att designa elektronik i kiselkarbid (SiC) som tål Venus extrema ytmiljö. Denna uppsats undersöker några möjliga datorminnestekniker som kan överleva på Venus yta. Ett minne måste kunna fungera vid 460 °C och efter en total strålningsdos på minst 200 Gy (SiC). Denna uppsats är en litteraturstudie. Uppsatsen täcker flera olika typer av RAM-minnes teknologier (eng. Random-Access Memory): Statiskt RAM-minne (SRAM), Dynamiskt RAM-minne (DRAM), Ferroelektriskt RAM-minne (FeRAM), Magnetiskt RAM-minne (MRAM), Resistivt RAM-minne (RRAM) och fasändringsminnen (PCM). EEPROM (eng. Electrical Erasable Programmable Read-Only Memory), Flash-minnen och SONOS täcks också. Fokus ligger på minnescellernas komponent- och materialfysik, samt deras extremmiljösbeteende. Denna uppsats avslutas med en diskussion om teknikmöjligheter. Teknikerna jämförs för hur passande de är för extrema miljöer. Uppsatsen ger en rekommendation för vilka minnestekniker som bör undersökas. Den slutliga rekommendationen är att undersöka SRAM, SONOS, FeRAM och RRAM teknologier för högtemperatursanvändning. Page 2 of 179 IT261X 2014 High Temperature Memories in SiC Technology Mattias Ekström 900502-4972 [email protected] Nanotechnology Table of Contents Units............................................................................................................................................5 Chapter 1 – Introduction.............................................................................................................7 1.1 – Venus and extreme environment electronics.................................................................7 1.2 – Properties of silicon carbide........................................................................................11 1.3 – Extreme environment memory technology.................................................................15 Chapter 2 – Memory technology theory...................................................................................17 2.1 – Thermodynamics of memory technologies.................................................................17 2.2 – Current and charge leakage mechanisms....................................................................21 2.3 – Physics of ferroelectrics..............................................................................................27 2.4 – Physics of magnetics and spintronics..........................................................................34 2.5 – Physics of resistive switching......................................................................................44 2.6 – Physics of chalcogenide glassy semiconductors.........................................................48 Chapter 3 – High temperature memories in SiC technology....................................................52 3.1 – Memory hierarchy.......................................................................................................52 3.2 – Static RAM (SRAM)...................................................................................................55 3.2.1 – SRAM cell and basic operations..........................................................................55 3.2.2 – SRAM high temperature behaviour.....................................................................57 3.2.2 – SRAM radiation effects.......................................................................................59 3.2.3 – SRAM summary..................................................................................................62 3.3 – Dynamic RAM (DRAM).............................................................................................63 3.3.1 – DRAM cell and basic operations.........................................................................63 3.3.2 – DRAM high temperature behaviour....................................................................65 3.3.4 – DRAM summary.................................................................................................66 3.4 – Electrical Erasable Programmable ROM (EEPROM) and Flash................................66 3.4.1 – EEPROM and Flash cell and basic operations....................................................66 3.4.2 – EEPROM and Flash high temperature behaviour...............................................72 3.4.3 – EEPROM and Flash radiation effects..................................................................76 3.4.4 – EEPROM and Flash summary.............................................................................78 3.5 – Ferroelectric RAM (FeRAM)......................................................................................81 3.5.1 – FeRAM devices and basic operations..................................................................81 3.5.2 – FeRAM high temperature behaviour...................................................................91 3.5.3 – FeRAM radiation effects.....................................................................................98 3.5.4 – FeRAM summary................................................................................................99 3.6 – Magnetic RAM (MRAM).........................................................................................101 3.6.1 – MRAM devices and basic operations................................................................101 3.6.2 – MRAM high temperature behaviour.................................................................107 3.6.3 – MRAM radiation effects....................................................................................110 3.6.4 – MRAM summary...............................................................................................111 3.7 – Resistive RAM (RRAM)...........................................................................................112 3.7.1 – RRAM devices and basic operations.................................................................112 3.7.2 – RRAM high temperature behaviour..................................................................114 Page 3 of 179 IT261X 2014 High Temperature Memories in SiC Technology Mattias Ekström 900502-4972 [email protected] Nanotechnology 3.7.3 – RRAM radiation effects.....................................................................................122 3.7.5 – RRAM summary................................................................................................123 3.8 – Phase Change Memory (PCM)..................................................................................125 3.8.1 – PCM devices and basic operations....................................................................125 3.8.2 – PCM high temperature behaviour......................................................................126 3.8.4 – PCM summary...................................................................................................127 Chapter 4 – Sustainability and environment impact...............................................................128 4.1 – Introduction to the issues of sustainability................................................................128 4.2 – Primary source: Mining.............................................................................................129 4.3 – Secondary source: Recycling....................................................................................131 4.4 – Sustainability and environment impact summary.....................................................133 Chapter 5 – Discussion...........................................................................................................134 Chapter 6 – Summary and future work...................................................................................140 6.1 – Summary...................................................................................................................140
Load more

Recommended publications
  • Chapter 3 Semiconductor Memories
    Chapter 3 Semiconductor Memories Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Outline Introduction Random Access Memories Content Addressable Memories Read Only Memories Flash Memories Advanced Reliable Systems (ARES) Lab. Jin-Fu Li, EE, NCU 2 Overview of Memory Types Semiconductor Memories Read/Write Memory or Random Access Memory (RAM) Read Only Memory (ROM) Random Access Non-Random Access Memory (RAM) Memory (RAM) •Mask (Fuse) ROM •Programmable ROM (PROM) •Erasable PROM (EPROM) •Static RAM (SRAM) •FIFO/LIFO •Electrically EPROM (EEPROM) •Dynamic RAM (DRAM) •Shift Register •Flash Memory •Register File •Content Addressable •Ferroelectric RAM (FRAM) Memory (CAM) •Magnetic RAM (MRAM) Advanced Reliable Systems (ARES) Lab. Jin-Fu Li, EE, NCU 3 Memory Elements – Memory Architecture Memory elements may be divided into the following categories Random access memory Serial access memory Content addressable memory Memory architecture 2m+k bits row decoder row decoder 2n-k words row decoder row decoder column decoder k column mux, n-bit address sense amp, 2m-bit data I/Os write buffers Advanced Reliable Systems (ARES) Lab. Jin-Fu Li, EE, NCU 4 1-D Memory Architecture S0 S0 Word0 Word0 S1 S1 Word1 Word1 S2 S2 Word2 Word2 A0 S3 S3 A1 Decoder Ak-1 Sn-2 Storage Sn-2 Wordn-2 element Wordn-2 Sn-1 Sn-1 Wordn-1 Wordn-1 m-bit m-bit Input/Output Input/Output n select signals are reduced n select signals: S0-Sn-1 to k address signals: A0-Ak-1 Advanced Reliable Systems (ARES) Lab. Jin-Fu Li, EE, NCU 5 Memory Architecture S0 Word0 Wordi-1 S1 A0 A1 Ak-1 Row Decoder Sn-1 Wordni-1 A 0 Column Decoder Aj-1 Sense Amplifier Read/Write Circuit m-bit Input/Output Advanced Reliable Systems (ARES) Lab.
    [Show full text]
  • Daft Punk Collectible Sales Skyrocket After Breakup: 'I Could've Made
    BILLBOARD COUNTRY UPDATE APRIL 13, 2020 | PAGE 4 OF 19 ON THE CHARTS JIM ASKER [email protected] Bulletin SamHunt’s Southside Rules Top Country YOURAlbu DAILYms; BrettENTERTAINMENT Young ‘Catc NEWSh UPDATE’-es Fifth AirplayFEBRUARY 25, 2021 Page 1 of 37 Leader; Travis Denning Makes History INSIDE Daft Punk Collectible Sales Sam Hunt’s second studio full-length, and first in over five years, Southside sales (up 21%) in the tracking week. On Country Airplay, it hops 18-15 (11.9 mil- (MCA Nashville/Universal Music Group Nashville), debutsSkyrocket at No. 1 on Billboard’s lion audience After impressions, Breakup: up 16%). Top Country• Spotify Albums Takes onchart dated April 18. In its first week (ending April 9), it earned$1.3B 46,000 in equivalentDebt album units, including 16,000 in album sales, ac- TRY TO ‘CATCH’ UP WITH YOUNG Brett Youngachieves his fifth consecutive cording• Taylor to Nielsen Swift Music/MRCFiles Data. ‘I Could’veand total Made Country Airplay No.$100,000’ 1 as “Catch” (Big Machine Label Group) ascends SouthsideHer Own marks Lawsuit Hunt’s in second No. 1 on the 2-1, increasing 13% to 36.6 million impressions. chartEscalating and fourth Theme top 10. It follows freshman LP BY STEVE KNOPPER Young’s first of six chart entries, “Sleep With- MontevalloPark, which Battle arrived at the summit in No - out You,” reached No. 2 in December 2016. He vember 2014 and reigned for nine weeks. To date, followed with the multiweek No. 1s “In Case You In the 24 hours following Daft Punk’s breakup Thomas, who figured out how to build the helmets Montevallo• Mumford has andearned Sons’ 3.9 million units, with 1.4 Didn’t Know” (two weeks, June 2017), “Like I Loved millionBen in Lovettalbum sales.
    [Show full text]
  • Section 10 Flash Technology
    10 FLASH TECHNOLOGY Overview Flash memory technology is a mix of EPROM and EEPROM technologies. The term “flash” was chosen because a large chunk of memory could be erased at one time. The name, therefore, distinguishes flash devices from EEPROMs, where each byte is erased individually. Flash memory technology is today a mature technology. Flash memory is a strong com- petitor to other memories such as EPROMs, EEPROMs, and to some DRAM applications. Figure 10-1 shows the density comparison of a flash versus other memories. 64M 16M 4M DRAM/EPROM 1M SRAM/EEPROM Density 256K Flash 64K 1980 1982 1984 1986 1988 1990 1992 1994 1996 Year Source: Intel/ICE, "Memory 1996" 18613A Figure 10-1. Flash Density Versus Other Memory How the Device Works The elementary flash cell consists of one transistor with a floating gate, similar to an EPROM cell. However, technology and geometry differences between flash devices and EPROMs exist. In particular, the gate oxide between the silicon and the floating gate is thinner for flash technology. It is similar to the tunnel oxide of an EEPROM. Source and INTEGRATED CIRCUIT ENGINEERING CORPORATION 10-1 Flash Technology drain diffusions are also different. Figure 10-2 shows a comparison between a flash cell and an EPROM cell with the same technology complexity. Due to thinner gate oxide, the flash device will be more difficult to process. CMOS Flash Cell CMOS EPROM Cell Mag. 10,000x Mag. 10,000x Flash Memory Cell – Larger transistor – Thinner floating gate – Thinner oxide (100-200Å) Photos by ICE 17561A Figure 10-2.
    [Show full text]
  • Universal Memory
    BRIEFING No.4 ICT UNIVERSAL MEMORY Memory is an integral part of information processing devices and is needed for short‐term stor‐ age such as when computer programs are being executed or text documents are processed. Currently, three main types of memory exist: SRAM offers very high speed at a high cost, DRAM is average in terms of speed and cost, and Flash memory is a low cost, low speed solution for applications that need to retain the data even when power is disconnected. A group of emerg‐ ing memory devices called universal memory aim to combine all these features in a single de‐ vice.1 Developments in universal memory devices may eventually lead to the introduction of novel October 2010 October memory architectures that offer increased performance, enable smaller mobile devices, and offer novel features in traditional products such as cars or domestic appliances. Nanotechnol‐ ogy is an integral part of emerging memory research as it is becoming increasingly difficult to enhance the performance of current devices by scaling the technology further. It is unlikely that a single technology will emerge as the universal memory technology; however, the develop‐ ments in this sector will enhance the energy efficiency and performance of memory devices. Currently, the Integrated Circuit (IC) market is dominated by US and Asia based companies. Uni‐ versal memory and nanotechnology based solutions could provide an opportunity for Europe to gain ground in the sector. Background volatility. Its disadvantage compared to SRAM and DRAM is speed. None of the existing memory technologies provide all of the required properties.
    [Show full text]
  • Error Detection and Correction Methods for Memories Used in System-On-Chip Designs
    International Journal of Engineering and Advanced Technology (IJEAT) ISSN: 2249 – 8958, Volume-8, Issue-2S2, January 2019 Error Detection and Correction Methods for Memories used in System-on-Chip Designs Gunduru Swathi Lakshmi, Neelima K, C. Subhas ABSTRACT— Memory is the basic necessity in any SoC Static Random Access Memory (SRAM): It design. Memories are classified into single port memory and consists of a latch or flipflop to store each bit of multiport memory. Multiport memory has ability to source more memory and it does not required any refresh efficient execution of operation and high speed performance operation. SRAM is mostly used in cache memory when compared to single port. Testing of semiconductor memories is increasing because of high density of current in the and in hand-held devices. It has advantages like chips. Due to increase in embedded on chip memory and memory high speed and low power consumption. It has density, the number of faults grow exponentially. Error detection drawback like complex structure and expensive. works on concept of redundancy where extra bits are added for So, it is not used for high capacity applications. original data to detect the error bits. Error correction is done in Read Only Memory (ROM): It is a non-volatile memory. two forms: one is receiver itself corrects the data and other is It can only access data but cannot modify data. It is of low receiver sends the error bits to sender through feedback. Error detection and correction can be done in two ways. One is Single cost. Some applications of ROM are scanners, ID cards, Fax bit and other is multiple bit.
    [Show full text]
  • Nanotechnology ? Nram (Nano Random Access
    International Journal Of Engineering Research and Technology (IJERT) IFET-2014 Conference Proceedings INTERFACE ECE T14 INTRACT – INNOVATE - INSPIRE NANOTECHNOLOGY – NRAM (NANO RANDOM ACCESS MEMORY) RANJITHA. T, SANDHYA. R GOVERNMENT COLLEGE OF TECHNOLOGY, COIMBATORE 13. containing elements, nanotubes, are so small, NRAM technology will Abstract— NRAM (Nano Random Access Memory), is one of achieve very high memory densities: at least 10-100 times our current the important applications of nanotechnology. This paper has best. NRAM will operate electromechanically rather than just been prepared to cull out answers for the following crucial electrically, setting it apart from other memory technologies as a questions: nonvolatile form of memory, meaning data will be retained even What is NRAM? when the power is turned off. The creators of the technology claim it What is the need of it? has the advantages of all the best memory technologies with none of How can it be made possible? the disadvantages, setting it up to be the universal medium for What is the principle and technology involved in NRAM? memory in the future. What are the advantages and features of NRAM? The world is longing for all the things it can use within its TECHNOLOGY palm. As a result nanotechnology is taking its head in the world. Nantero's technology is based on a well-known effect in carbon Much of the electronic gadgets are reduced in size and increased nanotubes where crossed nanotubes on a flat surface can either be in efficiency by the nanotechnology. The memory storage devices touching or slightly separated in the vertical direction (normal to the are somewhat large in size due to the materials used for their substrate) due to Van der Waal's interactions.
    [Show full text]
  • Low Voltage, One-Time Programmable, Read-Only Memory
    Features • Fast read access time – 90ns • Dual voltage range operation – Low voltage power supply range, 3.0V to 3.6V, or – Standard power supply range, 5V 10% • Compatible with JEDEC standard Atmel® AT27C512R • Low-power CMOS operation – 20µA max standby (less than 1µA, typical) for VCC = 3.6V – 29mW max active at 5MHz for VCC = 3.6V 512K (64K x 8) • JEDEC standard package – 32-lead PLCC Low Voltage, • High-reliability CMOS technology One-time – 2,000V ESD protection Programmable, – 200mA latchup immunity • Rapid programming algorithm – 100µs/byte (typical) Read-only Memory • CMOS- and TTL-compatible inputs and outputs – JEDEC standard for LVTTL • Integrated product identification code Atmel AT27LV512A • Industrial temperature range • Green (Pb/halide-free) packaging option 1. Description The Atmel AT27LV512A is a high-performance, low-power, low-voltage, 524,288-bit, one- time programmable, read-only memory (OTP EPROM) organized as 64K by 8 bits. It requires only one supply in the range of 3.0 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power. The Atmel innovative design techniques provide fast speeds that rival 5V parts, while keep- ing the low power consumption of a 3.3V supply. At VCC = 3.0V, any byte can be accessed in less than 90ns. With a typical power dissipation of only 18mW at 5MHz and VCC = 3.3V, the AT27LV512A consumes less than one-fifth the power of a standard, 5V EPROM. Standby mode supply current is typically less than 1µA at 3.3V. The AT27LV512A is available in industry-standard, JEDEC-approved, one-time programmable (OTP) PLCC package.
    [Show full text]
  • Nanotechnology Trends in Nonvolatile Memory Devices
    IBM Research Nanotechnology Trends in Nonvolatile Memory Devices Gian-Luca Bona [email protected] IBM Research, Almaden Research Center © 2008 IBM Corporation IBM Research The Elusive Universal Memory © 2008 IBM Corporation IBM Research Incumbent Semiconductor Memories SRAM Cost NOR FLASH DRAM NAND FLASH Attributes for universal memories: –Highest performance –Lowest active and standby power –Unlimited Read/Write endurance –Non-Volatility –Compatible to existing technologies –Continuously scalable –Lowest cost per bit Performance © 2008 IBM Corporation IBM Research Incumbent Semiconductor Memories SRAM Cost NOR FLASH DRAM NAND FLASH m+1 SLm SLm-1 WLn-1 WLn WLn+1 A new class of universal storage device : – a fast solid-state, nonvolatile RAM – enables compact, robust storage systems with solid state reliability and significantly improved cost- performance Performance © 2008 IBM Corporation IBM Research Non-volatile, universal semiconductor memory SL m+1 SL m SL m-1 WL n-1 WL n WL n+1 Everyone is looking for a dense (cheap) crosspoint memory. It is relatively easy to identify materials that show bistable hysteretic behavior (easily distinguishable, stable on/off states). IBM © 2006 IBM Corporation IBM Research The Memory Landscape © 2008 IBM Corporation IBM Research IBM Research Histogram of Memory Papers Papers presented at Symposium on VLSI Technology and IEDM; Ref.: G. Burr et al., IBM Journal of R&D, Vol.52, No.4/5, July 2008 © 2008 IBM Corporation IBM Research IBM Research Emerging Memory Technologies Memory technology remains an
    [Show full text]
  • Semiconductor Memories
    Semiconductor Memories Prof. MacDonald Types of Memories! l" Volatile Memories –" require power supply to retain information –" dynamic memories l" use charge to store information and require refreshing –" static memories l" use feedback (latch) to store information – no refresh required l" Non-Volatile Memories –" ROM (Mask) –" EEPROM –" FLASH – NAND or NOR –" MRAM Memory Hierarchy! 100pS RF 100’s of bytes L1 1nS SRAM 10’s of Kbytes 10nS L2 100’s of Kbytes SRAM L3 100’s of 100nS DRAM Mbytes 1us Disks / Flash Gbytes Memory Hierarchy! l" Large memories are slow l" Fast memories are small l" Memory hierarchy gives us illusion of large memory space with speed of small memory. –" temporal locality –" spatial locality Register Files ! l" Fastest and most robust memory array l" Largest bit cell size l" Basically an array of large latches l" No sense amps – bits provide full rail data out l" Often multi-ported (i.e. 8 read ports, 2 write ports) l" Often used with ALUs in the CPU as source/destination l" Typically less than 10,000 bits –" 32 32-bit fixed point registers –" 32 60-bit floating point registers SRAM! l" Same process as logic so often combined on one die l" Smaller bit cell than register file – more dense but slower l" Uses sense amp to detect small bit cell output l" Fastest for reads and writes after register file l" Large per bit area costs –" six transistors (single port), eight transistors (dual port) l" L1 and L2 Cache on CPU is always SRAM l" On-chip Buffers – (Ethernet buffer, LCD buffer) l" Typical sizes 16k by 32 Static Memory
    [Show full text]
  • Nile Rodgers in New York City, 1991
    Nile Rodgers in New York City, 1991 68 MUSICAL EXCELLENCE Nile Rodgers HE CREATES A DISTINCTIVE SOUND ON THE RECORDS HE WRITES, PRODUCES, ARRANGES, AND PLAYS ON. BY ROB BOWMAN Nile Rodgers’ influence on popular music over the past forty years is nearly unfathomable. As a guitarist, songwriter, producer, arranger, and funkster extraordinaire, Rodgers has left his imprint on a stun- ningly wide array of genres including disco, R&B, rock, mainstream pop, hip-hop, and EDM. Looking over the breadth of his career, a case could easily be made that no single individual has had a greater impact on the sound of pop, from the late 1970s to the present day. ¶ Alongside his partner, bass player wunderkind Bernard Edwards, Rodgers wrote and produced hit after hit for Chic, Sister Sledge, and Diana Ross, tearing up both the dance floor and the radio. After Chic broke up and Rodgers and Edwards went their separate ways, Rodgers broke free of the disco moniker and reinvented himself, producing, arranging, and playing guitar on David Bowie’s come- back album, Let’s Dance (1983), and Madonna’s breakout album, 69 Like a Virgin (1984). Along the way he took INXS and Chic in their prime then Duran Duran to new heights with “Original Sin” with Rodgers and and “The Reflex,” respectively, and produced albums by Bernard Edwards Mick Jagger, Jeff Beck, the B-52s, and David Lee Roth. center stage, 1979 He played key guitar parts on Steve Winwood’s “High- er Love” and Michael Jackson’s HIStory. More recent- ly he cowrote and played guitar on Daft Punk’s “Get Lucky,” winning two Grammy Awards in the process.
    [Show full text]
  • Computer Peripheral Memory System Forecast
    OF NBS H^^LK,!,, STAND S. TECH PUBLICATIONS | COMPUTER SUici^CZ^i TECHNOLOGY: COMPUTER PERIPHERAL MEMORY SYSTEM FORECAST QC 100 U57 NBS Special Publication 500-45 #500-45 U.S. DEPARTMENT OF COMMERCE 1979 National Bureau of Standards NATIONAL BUREAU OF STANDARDS The National Bureau of Standards' was established by an act of Congress March 3, 1901 . The Bureau's overall goal is to strengthen and advance the Nation's science and technology and facilitate their effective application for public benefit. To this end, the Bureau conducts research and provides: (1) a basis for the Nation's physical measurement system, (2) scientific and technological services for industry and government, (3) a technical basis for equity in trade, and (4) technical services to promote public safety. The Bureau's technical work is performed by the National Measurement Laboratory, the National Engineering Laboratory, and the Institute for Computer Sciences and Technology. THE NATIONAL MEASUREMENT LABORATORY provides the national system of physical and chemical and materials measurement; coordinates the system with measurement systems of other nations and furnishes essential services leading to accurate and uniform physical and chemical measurement throughout the Nation's scientific community, industry, and commerce; conducts materials research leading to improved methods of measurement, standards, and data on the properties of materials needed by industry, commerce, educational institutions, and Government; provides advisory and research services to other Government Agencies; develops, produces, and distributes Standard Reference Materials; and provides calibration services. The Laboratory consists of the following centers: Absolute Physical Quantities^ — Radiation Research — Thermodynamics and Molecular Science — Analytical Chemistry — Materials Science.
    [Show full text]
  • MRAM (Magnetoresistive Random Access Memory)
    MRAM (MagnetoResistive Random Access Memory) By : Dhruv Dani 200601163 Shitij Kumar 200601084 Team - N Flow of Presentation Current Memory Technologies Riddles Introduction Principle, Structure and Working Working Modes Schematic Overview MRAM v/s Other Memory Elements Applications in Embedded Systems Case Studies Supported Microcontrollers and Companies Constraints References Current Memory Technologies Volatile When the power is switched off the information is lost. Restarting: programs and data need to be reloaded resulting in increase of idle time. Non -Volatile Can retain stored information permanently Stores information that does not require frequent changing. Read/Write/Erase cycles consume a lot of time. Commonly Known Memories Volatile – Static RAM (SRAM), Dynamic RAM (DRAM) Non –Volatile – Flash, EEPROM Riddle - 1 A car component manufacturing company ‘X’ has to built Air Bag systems for a range of cars. The requisites of building such a system are that it has to interact with the various sensors which detect and record passenger weight and are employed in other safety devices on the vehicle which perform various crucial tasks like detecting the impact of the possible collision. Such a real time system requires the memory to be susceptible to continuous reads, writes and overwrites in each clocked interval. As an embedded engineer for this company X which kind of memory would you use to implement such a system? Riddle - 2 The Defense Research and Development Organization of a nation ‘C’ has to build a system which can be employed by them for their military and aerospace applications. These systems at present require constant power supply to maintain various kinds databases consisting of confidential information.
    [Show full text]