THE MAGAZINE FOR NEW IDEAS IN ELECTRONICS wild this 650 COMPUTER ln one board experiment with UNCTION GENERATOR ew Exar IC for your phone BUILD TELESWITCH and turn things on SIGNE TICS 2650 MICFOPP(iCE"pb IC data sheet ASCII ENCCQ►ED► YEYEOARI► E6-CHARACTEF EY 16-LINE,UIUE0 DISPLAY CI,,, `ETICON SAD-1024 CASSETTE ";'_FFACE--trii!~r SiANIiAFD NT . SUPERVISCi; E.:,,_ .' bucket-brigade 1024 2098 SfiE'E installing I/O PORTS E' : :_: SIN6LE BROUC;',? ANTENNA TOWE RADIE-E_E. : :an be easy AND JEFF

• * Lab-Tested Hi-Fi Reports GERNSBACK Yamaha (T-800 Tuner & Kenwood KR7600 Receiver State-Of-Solid-State * Equipment Reports * Reader Questions COMPUTER PROJECT

._~ Build 2650-Based ~~ ) ; , ~: _ ~i;` system =

Part I. Built on a single printed-circuit board, this 2650 microcomputer contains a video and cassette tape interface and resident supervisor program. Add a keyboard, video monitor, cassette tape recorder and power supply for a complete working system

JEFF ROLOFF SPECIFICATIONS AN EASY-TO-USE COMPUTER SYSTEM MUST have essentially four major sections. DISPLAY GENERATOR There is, of course. the actual processing Display Format: 16 lines of 80 characters. User programmable character generator section that usually (at least for small selected by setting bit 6 of the stored data to logic-1 level. Bit 7 available for any users) contains a IC. special user application. There must also be input and output Method of Accessing: The processor writes correct RAM location to place a sections so that the processor can character on the screen. communicate with the outside world. Output: Composite video, 1 volt P-P nominal, 75 ohms. 7.1 Mhz. The last section that is essential for a computer's operation is the memory. Cursor: Written by processor just like any other character. Supervisor uses a square This is used to store programs and data. dot centered in character field. and it can be either a memory that Screen Blanking: During horizontal or vertical retrace, between character lines and needs to be accessed very quickly when whenever the processor is accessing the display memory. running a program or a memory used to Display Addressing: Starts (upper left hand corner) at address H1000, and ends at store information for long periods of H14FF. As addresses are incremented, the display position moves downward. time, such as cassette tape. Additional User RAM: A total of 768 bytes starting at address H1500. Actually a part The 2650 computer project presented of the display memory, but this is transparent to the user. here has all of the above circuits mounted on a single printed-circuit PROCESSOR board. In addition, there is a versatile supervisor program that allows you to Type: 2650 microprocessor. easily create your own programs. The Buffering: All processor signals buffered for TTL fan-out of 10. heart of the unit is the Signetics 2650 Memory: 1K bytes of PROM which contains supervisor program. 768 bytes of RAM microprocessor. Basically, it is a simple • unused by display is available for user programs. PROM is on-board expandable to to use microprocessor with a powerful 4K bytes. instruction set. The input device can be Control Lines: Pause and stop-clock lines allow single stepping of programs. any ASCII-encoded keyboard, which Disable-lines for address data, and control buses to allow DMA (Direct Memory simply hooks to an input port of the Access) or dual processor operation. computer. The output device is a high quality 80-character by 16-line video CASSETTE INTERFACE display generator which is fully con-

Recording Format: 300 baud, 1200/2400-Hz . trolled by the processor. There are also parallel input and output ports (one Output Voltage: 100 mV P-P. liadv

each) to allow you to communicate with Misc. Size: 8'/2-inch square printed-circuit board. ►

any other peripheral device, such as a s Power Consumption: 3 amps at 5 volts. line printer or a floppy disc. The «

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PARTS LIST All resistors 1/4 watt, 5%. IC1-2650 microprocessor (Signetics) 1062-7420 R1-R6, R14, R18-10,000 ohms IC2-1C10, IC21, IC22, IC78, IC79-74126 1063, IC67-7404 R7, R8, R16, R17-1000 ohms IC11, IC64, IC69-7408 IC66-74109 R9-330 ohms IC 12-7414 IC70-7425 R10-150 ohms IC13, IC17-3624, pre-programmed IC72-555, timer R11-82 ohms PROM containing supervisor program IC73-74123 R12-100 ohms IC14-1C16, 1C18-ÎC20, 1C48-3624, IC74-CA3130 R13-620 ohms PROM (see text) XTAL1-14.192640 MHz series-resonant R15-470 ohms 1C23, IC24, IC65, IC75, IC77-7474 crystal R19-20,000 ohms IC25, IC71, IC76-7400 MISC.-One 40-pin DIP socket for IC1, R20-68,000 ohms IC26-9344, 4-bit by 2-bit multiplier six 16-pin DIP sockets and printed- R21, R22-20,000-ohm trimmer (Fairchild) circuit board. potentiometer 1C27-IC29-74157 The following parts may be ordered Cl, C2, C11-100 pF, disc 1C30-1C45-2102-1, RAM (Signetics) from: Central Data Company, P.O. Bc • C3, C14-100 /IF, 16 volt, electrolytic IC46, 1C47-74125 2484, Station A, Champaign, IL 61820. C4, C8-0.01 ALF, disc IC49-3624, pre-programmed PROM IC49-3624, pre-programmed PROM C5, C6, C7, C9, C15-C29-0.1 (OF. disc character generator, upper case character generator, upper case, $27. C10-0.0022 µF 1050-1052, 1055-1058-74163 IC13, IC17-3624, pre-programmes C12, C13-0.056 µF, ± 10% polyester film IC53-74SO4 PROM containing supervisor progran D1, D2-1N914 diode IC54-7410 $27 each. D3-1N4729 Zener IC59-7432 PC board, predrilled and etched, $30 D4, D5-1N4148 diode IC60-74166 An assembled and tested microcom 01, Q2-2N5139 transistor 1061, IC68-7411 puter board, $325.

number of ports can be easily expanded to 256. CPU CLOCK TI T2 TO TI T7 TO I T 0 TI The on-board memory consists of FAST OPREO SLOW OPREO 2.1-3 1024 bytes of PROM used to store the ITYP. DASHEDI AMR /DATA OUT AS IVALID1 FAST IVAL101 FAST IVALIDI supervisor program along with 2048 SAMPLED OPAK 10 MSEC MAX bytes of RAM used for the video- VALID display generator and for program stor- DISPMEM WRP Ma l P OR age. The external storage device is a FAST E 0 cassette-tape recorder. An on-board cas- READRIW 0R sette-tape interface IC is provided that FIG. 2-2650 MICROPROCESSOR timing relationships. uses the 1200:2400 Hz. 300-baud stan- dard to store the data. When the cassette 1 SCAN LINE interface is not being used, data lines 11 are available for serial I'0 (Input 2 3 4 5 6 7 B 9 0 11 Output) data transfer. The computer HORIZ C 0 3 6 9 0 0 0 0 0 0 0 036903690369 0~_ DISPLAY AREA J operates off of a single +5-volt supply. HORIZ SYNC Îl_ When it comes right down to it, all that DISPLAY SIZE I FRAME -( you need to get rolling in microcom- VERT LN 0 1 2 3 4 5 6 7 B 9 10 11 12131415 1617181920210 1 2 4 a puters is the board described in this 264(72.7%1 DISPLAY AREA 904 article. plus an ASCII-encoded key- (BLANK VIDEO) U 165.5%1 board. a video monitor. a cassette-tape VERT. SYNC recorder and a power supply. Something more should be said about FIG. 3-TIMING DIAGRAM of horizontal, vertical and sync signals supplied to video monitor. the supervisor program at this time since it pulls all of the hardware together to ships for the 2650 microprocessor. Note IV-WHITE .IV-BLACK form a simple to use computer system. that both OPREQ (operation request) and OV .SYNC The program allows you to have the address lines become stable some- FIG. 4-COMPOSITE VIDEO SIGNAL supplied cassette-tape input or output to or from where in an interval of about 600 ns. to video monitor. any memory block (in a standard depending on the individual 2650. the format, in any length that you want). temperature and the power supply display releases the memory to the pro- display or change memory, set a soft- voltage. The 1.18 Mhz TTL clock for the cessor whenever it is doing inter-line or ware breakpoint (stop) address, inspect 2650 is derived from the output which is vertical blanking. which accounts for and set the CPU registers, and jump to a division of the I4-MHz master oscil- about 53% of the time. Therefore, the any memory location to execute your lator used in the display unit. processor runs at about half-speed when program. Because the microprocessor and the continually accessing the display mem- display unit use the same RAM (unless ory. which is very seldom. When the Theory of operation you expand the RAM). a priority display is using the memory, pin 36 Figure I shows the schematic for the arrangement for the memory had to be (0PAK) of the 2650 is high. 2650 microcomputer system. Because of devised. Since the processor could be in Data is transferred between the pro- the architecture of the 2650 micropro- the middle of an access when the cessor and peripheral devices via the cessor, the Processor and Bus Drive display needs the memory again. the parallel input and output ports. The circuit is very simple. All of the output display checks to see if the processor is keyboard should be hooked to the input lines of the 2650 are buffered by tri-state accessing RAM, and if it is. the display port by connecting it to the correct pins ECTRONICS buffers. and the data bus is buffered in waits. After the processor is finished of plug P6. The data from the keyboard EL both directions. with only one set of accessing the memory. the processor is is read by the READ DATA command. The

DIO- buffers being enabled at a time. locked out from accessing the memory other input port is read by a READ

RA Figure 2 shows the timing relation- again until the display is through. The CONTROL command. The bit settable t output port is accessed by the WRITE PIN DATA instruction. N0. P1 P2 P3 P4 P5 PR The Timing Chain and Sync Gener- 1 ADDR DISABLE A11 1N6 OUT 2 MIIO GNO ator circuit divides the 14 Mhz clock in several stages to form the various signals 2 CTRL DISABLE GNO I Ni +5V A14 OUT 3 needed to interface with a video moni- 3 SERIAL INPUT +5V 1145 GNO TD•ON tor. Derived from these divisions of the D7 master clock are the signals HORIZONTAL 4 A10 1144 GND +5 SYNC, VERTICAL SYNC, and BLANK VIDEO 5 RUNIWAIT(OUT) AO 06 VIDEO OUT IN1 (composite blanking). Figure 3 shows 6 PAUSE A6 00 Al2 IN3 the relation between the vertical and horizontal timing and the sync pulses. 7 DB DISABLE A5 01 +5V !NO The Display Memory circuit consists 8 STOP CLOCK A7 GN0 02 +5V IN2 of sixteen 2102-1 RAM IC's and up to ER GNO two 3624 PROM's. The 3624 PROM's 9 SERIAL OUT As TAEARPHONE Da Bi RESET OUT TAPE RECORDER are used for both the character genera- 10 (SQUARED) Al MICROPHONE 04 WRP 83 tors and the supervisor program (as 11 +5V A2 D5 A13 82 opposed to 1702's) so that the whole system could run off of a single supply. 12 +5V Ag OUT 5 84 The use of PROM's for character gener- 13 CPUCLK A4 GNO OUT6 RAV B5 ators also allows you to create your own 14 +5 B7 characters. symbols or limited graphics. DISPLAY ACCESS OUT 0 READ EXTENDED If bit 6 of the ASCII data is low, it 15 RESET IN Ag OUT1 OPREO B6 selects one of the character generators 16 A3 OUT4 A13 STROBE (IC49). while if it is high it selects the other (IC48). The outputs of the char- FIG. 6—PIN CONNECTIONS of DIP sockets used to connect microcomputer to external devices. acter generators are fed into a parallel- character on the video display moves The last circuit is the Cassette Inter- to-serial converter where they are sent down one line. When it gets to the face. which connects to the serial input out at a 14 Mhz rate. They are then bottom line, the next character is on the and output pins of the 2650 processor. mixed with the sync pulses to form the top line, one character to the right of the The modulator consists of an oscillator composite video signal that is sent to the present one. Therefore. when the dis- and gating circuitry to allow either 1200 monitor. The video output voltages are play memory is filled, every memory or 2400 Hz go to the tape recorder's shown in Fig. 4. location from address 1000 to 14FF is microphone jack. The demodulator con- Since the processor and the display filled with data. If you wish to write sists of a limiter (IC74) and two Mono- share the display memory, the address characters across a line, you must incre- stable Multivibrators (IC73-a and 1C73- lines of the display memory must be ment the address by 16, thus moving b). The output of monostable 1073-a switched between the processor address you to the right one position. So from goes low if the input frequency is not bus and the display timing generator. locations 1500 to 17FF you may put fast enough to keep retriggering it The Display Memory Address Switch your own programs and data, just as if (somewhere between 2400 and 1200 circuit does this. When the Display the video display wasn't there. Hz). This output is latched by IC75-b, Generator is not writing characters (and It may help to show what would and the other monostable (IC73-b) takes therefore not accessing memory). the happen if the memory addressing care of bias and distortion problems. DISPLAY ACCESS line is low, which selects scheme was worked out another way. If This output is sent to the serial input the processor address bus to be gated to the addresses were incremented as the (sense) line of the 2650. the RAM. When the display is not characters were being printed on a line. blanking the video, however, the Timing then addresses 80 to 127 would be left Installation Chain and Sync Generator circuit unused, along with 207 to 254 and so on Connecting the circuit board to exter- selects the addresses for the RAM in an to form 16 groups of 48 characters each. nal devices is accomplished through the ordered fashion. All of these groups are separated by 80 use of DIP plugs and sockets. Figure 6 There is a special pattern by which characters, and programs cannot be shows the pin connections of these sock- the display accesses the RAM. This written in them unless they are less than ets. pattern allows all locations of memory 49 bytes long! The addressing format Connection to your video monitor is not used by the display section (there can be ignored by someone program- made using plug 5. pins 4 and 5. Pin 4 is are 768 of these bytes) to be confined to ming the unit, for it is transparent to the the ground. and pin 5 is the I volt P-P one memory block, not just several programmer. It was thought that it composite-video signal. Plug 6 is used to bytes here and there scattered through- would be appropriate, however, to bring connect to your keyboard. The pin out memory. A memory map for the it out here for a more hardware oriented numbers that correspond to the ASCII display is shown in Fig. 5. When the person. data bits can be found in Fig. 6. address of the RAM is incremented, the The PROM memory consists of up to The strobe signal must be low going, eight 3624 4K-hit PROM's that are and should ideally be active as long as 80 CHARS (A44A10 SELECT) selected as a function of the upper six the key is depressed. Note that the address lines. The first two IC sockets supervisor program will not accept a CHAR (IC 13 and IC 17) on the PC board are very short strobe pulse, since the soft- 1ST LINE I usually filled with the supervisor pro- ware is used to detect the strobe. If your ADDR•1010H 1ST CHAR gram. It should be pointed out that keyboard strobe is small (less than I 16 LINES 1ST LINE other programs could be written that ms), you can add the circuit shown in AOOR•1000H (A0-A3 SELECT/ Fig. 7 to be sure that the program will 1ST CHAR BOTH CHAR would allow the board to have a special 16TH LINE III 16TH LINE purpose such as an intelligent terminal catch every keypress. AD D11.100114 AOD R•14FF~.. or a process controller. These programs Most keyboards have a strobe that could either replace the supervisor lasts as long as a key is depressed. so it is FIG. 5—RANDOM ACCESS MEMORY is simul- taneously used for the video display and program or be added to the empty then simply a matter of hooking up the program storage. sockets. continued on page 90 BUILD A COMPUTER continued from page 35 wires to the correct pins of the DIP plug. If you have a keyboard with tri-state outputs. they can be always enabled. Then their outputs can be wired to the inputs of the on-board buffers as in a normal keyboard.

FROM KEYBOARD STROBE l2 7474

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TO BOARD STROBE LINE P6 PIN 16 FIG. 7—DURATION OF STROBE pulse from keyboard Is Increased using this add-on circuit.

To hook up your cassette-tape unit you use plug 3 of the board. Pin 10 is foi the record jack and pin 9 is for the earphone jack. Pin 14 of plug 3 can be used to turn off and on the tape recorder (using the auxiliary control line) by simply hooking up a relay and switching transistor to the circuit as shown in Fig. 8. You may need to adjust the volume and tone controls on the

TO-ON 1K RY FROM P6 PINT

SELECT TRANSISTOR AND - RELAY TO MATCH +V

FIG. 8—AUTOMATIC CASSETTE TAPE opera- tion Is obtained by adding driver transistor and relay. tape recorder in order to get perfect data storage (no errors on loading). continued next month COMPUTER PROJECT

_ -~ ~~ ~~ t.~ ._. .... - •~ Build 2650-Based ` y ~ Q twf''.~.- I. MicrocomPuter SYstem

Part Il. Built on a single printed-circuit board, this 2650 microcomputer contains a video and cassette tape interface and resident supervisor program. Add a keyboard, video monitor, cassette tape recorder and power supply for a complete working system

JEFF ROLOFF

LAST MONTH. A DESCRIPTION INCLUDING have a trained technician test it for the monitored lines are high. the clear specifications and schematic appeared. $15.00 an hour.) Connect the scope to line is activated which resets all of the This month, an in-depth look at the the composite video signal that appears counters. troubleshooting procedures plus the on plug 5, pin 5, of the board. Observe The DI. D2 and D4 outputs of IC52 component placement diagram is the sync pulses that appear at the zero- provide the first three binary divisions given. volt level. There should be one short of the master clock. Since the characters sync pulse (down from 0.5 volt) every are eight-dots wide, output D4 has the Troubleshooting 63.5 µs, and one long pulse every 16.667 width of one character (it is the divide- After applying power to the PC ms. If either of these two trains of pulses by-eight output). The last output of this board, the first thing to check is the are not there, or have the wrong counter, along with all of the outputs of power-supply voltage. If the output of frequency, you must check the Timing 1050 and IC51 (designated the 'C' an adequate (5 volts. 3 amperes) power Chain and Sync Generator section of outputs) provide a count of the current supply is pulled down by connecting it the circuitry. character position on the display. While to the board, there is either an IC put in The Timing Chain and Sync Gener- it is counting from 0 to 79, the charac- backwards (if the supply is not pulled ator circuit contains a crystal-oscillator ters are actually appearing on the completely to ground) or else the power- as the timing source. (A complete screen. While counting from 80 to 112 supply lines are shorted somewhere on schematic appears in last month's issue (during which the counters are reset), the board. If an IC is plugged in back- of Radio-Electronics.) This is a standard the display is in the process of hori- wards. it will become very warm imme- oscillator with the 14.192640-MHz crys- zontal blanking. diately after the power is applied. If the tal used as the main feedback element. The horizontal sync signal is gener- supply is actually shorted to ground, the The signal from this oscillator is ated by IC62-a. The sync signal is eight process is much more tedious since you buffered using three other inverters character-spaces wide, which is about must inspect both supply lines to from IC53. The first divider network 4.5 µt. Also, the three dot signals that discover the point of the short. If quality that this signal goes to is formed by come from 1052 (DI-D4) are all OR'ed IC's were purchased, the majority of IC50, IC51 and 1052. These three IC's together to form the LOR signal that is problems are caused by solder or etch are used to divide the master clock used in the Display Generator circuit to shorts. For this reason, it is a good idea down to a signal that has a period of load the data from the character gener- to check the whole board for little solder 63.5 As. The three counters are all fed by ator into the shift register once for every spatters. the same clock, so that all of the outputs character. The LOR signal has a duty change state at the same instant. The cycle of Ve (negative duty cycle, that is). Logic and display circuits enable pins of the two low-order and it goes low for this one dot period at The logic section of the board is the counters are fed from the previous the very beginning of each character. next part of the board to test. You need counter stage(s) in an arrangement that Now that the signals are defined for a scope for this part, and its bandwidth forms a 10-bit syncronous binary count- all of the areas of each scan line, the up should be above 10 MHz. (You can also er. Pins 1, 2 and 13 of 1054 monitor the and down position on the screen must ~O~ send the board into Central Data to states of this counter. When all three of be defined. The three other counters ~ 45 (1055-1057) serve this function, 1055 is blank when they are high. So there are resistor (R9) in the video output stage used to count down by 12 and the other three other signals that indicate that the (such as 220 ohms) and lower the value two are connected to count down by 21. screen should be blanked and all of of the 100-ohm resistor hooked to the The input that enables the first counter them are OR'ed together to form the base of the two transistors. This will is the EOL signal that reset the previous master blanking signal. The vertical- adjust the sync level and the total video_ counters at the end of a scan line. The blanking area is indicated by LN 16. output level to suit your monitor. If you output of this counter is monitored at Any one of the four scan lines between have a standard monitor, you will not pins 3 and 4 of IC54. to determine when character lines is indicated by L8. The have to do this since the output signal is 12 scan lines have been counted. When DISPMEM line is high whenever the proc- standard. this event has occurred, its output at pin essor is accessing the display RAM. If the characters on the screen waver, 6 drops and resets the counter. The Wrong character patterns would appear there is still a problem with the Timing reason that it counts to 12 is that there when the display RAM is accessed, so Chain and Sync Generator circuit. are 12 scan lines for each character line we just blank the screen during this Check this circuit out again, looking for on the screen (i.e., vertically there are 12 small interval to cover up the few out of any imperfections in the signals that dots for each character). The L I, L2, L4 place dots. The DISPLAY ACCESS signal is indicate a bad IC or a shorted line. This and L8 outputs of this counter are used low whenever the screen is to be probably won't happen, since a fault in to determine which scan line of a char- blanked. This signal is delayed one the circuit usually causes major prob- acter line is currently being displayed. more character time (to make up for the lems and not just a little wavering on the From lines 0 to 7. the display section is delay in accessing the RAM and char- screen. actually displaying a character (since the acter generator in the Display Gener- Now that a pattern appears on the actual character size is eight-dots tall), ator circuit) by IC65, using pins 2 and 5. screen, it must be identified. If it is a while from lines 8 to I I. the display is If the processor is accessing display prompting character (a period) and the blanking between lines. memory. pin 8 of 1065 is low and is a cursor appears in the upper left corner The reset line for IC55 is used to clock one character-time delayed version of of the screen, the whole system is the next two counters that determine the the DISPLAY ACCESS signal. This in turn probably working. All that is needed is character line being displayed. The keeps BLANK VIDEO (pin ) of 1065) low a to hook up an ASCII keyboard and tape counters (1('56 and IC57) are both reset little after DISPLAY ACCESS disappears to recorder to the correct plugs and see if by IC54-h when a count of 21 character make up for the recovery time required commands can be entered into the lines is reached. From character lines 0 by the RAM. The BLANK VIDEO signal monitor. (The procedure for testing the to 15. the display is actually showing goes to the output shill register and cassette interface is given later.) If you characters on the screen (or at least it keeps the output data low by clearing have either random characters on the can be). while from character lines 16 to the register. screen or just 16 solid horizontal bah, 21. the vertical blanking is in effect. If these circuits are operating correct- the processor section of the board is Vertical sync is generated in this time ly. a good video signal should be present probably not working. This prevents the period by IC62-h. Pins 4 and 5 of 1064- that can be connected to a video moni- supervisor program from being read In a are inputs to the gate that mixes the tor. Figure I shows the composite-video and thus the screen is not cleared. vertical and horizontal sync signals to form the composite sync signal. Processor The video-blanking signal is com- IV WHITE The Processor and Bus Driver circuit .4V-BLACK posed of a horizontal blanking and OV -SYNC divides the master clock by 12 to obtain vertical blanking signal. The horizontal the CPU clock. The divide-by-6 counter FIG. I-COMPOSITE VIDEO SIGNAL supplied blanking signal is generated by 1064-b to video monitor. IC58 starts its count at 10 and counts up and I('66-b. The output of 1066-b is to 15. After the count of 15. inverter high when CM and C16 are both high signal. If the sync signal is correct, the IC53-a connected to the carryout line (at character position 80) and later monitor should immediately lock onto and load input is used to load the 10 changes back to low when EOL is pres- the video signal and display a stable and start the division again. Flip-flop ent. Any of the four inputs to NOR gate picture. If the picture does not lock-in, IC66 divides this carry signal by 2 to 1C70 indicate that the screen should be try lowering the value of the 330-ohm obtain the square CPU clock. The

PARTS LIST All resistors 1/4 watt, 5%. IC1-2650 microprocessor (Signetics) IC62-7420 R1-R6, R14, R18-10,000 ohms IC2-1C10, IC21, IC22, IC78, IC79-74126 IC63, IC67-7404 R7, R8, R16, R17-1000 ohms IC11, IC64, IC69-7408 IC66-74109 R9-330 ohms IC12-7414 IC70-7425 R10-150 ohms IC13, IC17-3624, pre-programmed IC72-555, timer R11-82 ohms PROM containing supervisor program IC73-74123 R12-100 ohms IC14-1C16, 1C18-1020, 1C48-3624, IC74-CA3130 R13-620 ohms PROM (see text) XTAL1-14.192640 MHz series-resonant R15-470 ohms IC23, IC24, IC65, IC75, IC77-7474 crystal R19-20,000 ohms IC25, IC71, IC76-7400 MISC.-One 40-pin DIP socket for ICI, R20-68,000 ohms IC26-9344, 4-bit by 2-bit multiplier six 16-pin DIP sockets and printed- R21, R22-20,000-ohm trimmer (Fairchild) circuit board. potentiometer IC27-1C29-74157 The following parts may be ordered Cl, C2, C11-100 pF, disc IC30-IC45-2102-1, RAM (Signetics) from: Central Data Company, P.O. Box C3, C14-100 /IF, 16 volt, electrolytic IC46, IC47-74125 2484, Station A, Champaign, IL 61820. S

C C4, C8-0.01 µF, disc IC49-3624, pre-programmed PROM IC49-3624, pre-programmed PROM C5, C6, C7, C9, C15-C29-0.1 µF, disc character generator, upper case character generator, upper case, $27. C10-0.0022 µF IC50-1052, 1055-1058-74163 IC13, IC17-3624, pre-programmed TRONI C12, C13-0.056 µF, ± 10% polyester film IC53-74SO4 PROM containing supervisor program D1, D2-1N914 diode IC54-7410 $27 each.

ELEC D3-1N4729 Zener IC59-7432 PC board, predrilled and etched, $30.

O- D4, D5-1N4148 diode IC60-74166 An assembled and tested microcom- 01, 02-2N5139 transistor IC61, IC68-7411 puter board, $325. RADI

o oi frequency of this clock is about 1.183 starting at address zero in memory. All special processor instructions. This al- MHz, and if the faster version of the of the outputs of the processor. except lows the system to get by without a 2650 is put into the board, the counter's for RUN/WAIT, are buffered with tri-state UART and also allows high flexibility inputs can be changed to increase this drivers or an inverter in the case of the as far as output rates and formats. frequency. The CPU clock signal is serial output line. The data bus buffers are tri-state gated through 1CII-a with the Tfi The tri-state drivers have their enable buffers, with either the in or the out CLOCK signal that allows you to exter- pins available for data bus override buffers being enabled at one time. If the nally stop the clock by bringing the line operations. For instance, bringing the R/w line is low, the processor is reading low. The timing relationships of the ADDR DISABLE line low causes all of the data, so the input buffers are enabled. If microprocessor is shown in Fig. 2. address buffers to be disabled. This this line indicates that the processor is Pin 16 of the 2650 is the reset input. allows another device to take control of outputting data to the data bus, then the and the RESET signal is generated using a the address bus. The same is true for the output buffers are enabled. Although Schmitt trigger and an R—C time data and control buses. So, by bringing buffers are not needed, they were put in constant. Capacitor C3 is initially these three enable lines low, you can so that any memory added to the system discharged and the RESET line is there- effectively disconnect the 2650 from any would not need to have its own set of fore high. As the capacitor charges external memory. buffers. through resistor R6, the output of the The SERIAL INPUT and SERIAL OUTPUT In the area of expansion, Central inverter will change to a low level lines come directly from pins on the Data offers a 8100 compatable bus allowing the processor to operate— processor that can be inspected or set by board. It generates signals derived from

COMPONENT PLACEMENT diagram S.RADIO- ELECTRONICS They are usedtogate datafromthe should havehigh activityrightafterthe state.) the data-bus driversIC46 andIC47. display memorypage.Thiswrite line display RAMresides,thislineishigh. cates whatpagetheprocessorisaccess- characters toappearonthescreen. signal finallygoesthroughone lastgate screen bysendingtheASCIIcodefora standard TTLlevels.Ifonelineisstuck lines. Notethatthe you checktobesurethattheRAM a signalthatishighatpin5ofIC23-a all ofthedisplaypositionsandwriting and BusDrivercircuitrequiresinspec- OPREQ-signal. Thisisgated with Lim onto thelineatwrongtime(an of theIC'saretri-statebuffers,checkto generate thissignalfromtheaddress directly withanystandard8080static clipped istheoneholdingline,so since thatwouldalsocausetherandom ing—if itisthe4Kpagewhere executed (rightafterreset),itclearsthe interface totheprocessorisworking enable pinmaybestuckinthe either highorlow,carefullyclipthepins with flip-flopIC23-a,isusedtogenerate line andtheCPUclockbyIC61-b. This for thefirstCPUclockcyclefollowing look atthewrite-pulsegeneratingcircui- transitions. Ifitdoesn't,checkoutgates be surethattheyarenotgatingdata of theIC'sthatthislinerunstountil power istuned on. problem clears.Thelastpinthatwas is plugexpandablewithextender IC61-a andIC69-athatareusedto Initially, whenthesupervisorprogramis that turnsonthewriteline ofthe the lowtohightransitionof try. IC61-a(pins1,2,12and13),along the the IC'sthatlinerunsto.Also,ifany to besurethatallofthesignalsareat tion alloftheaddressanddata-buslines RAM's iftheprocessorisaccessing the blank (1120)onthedatabusto replace theIC.BeforecuttingIC pins, checkthepowersupplyonallof the data.Therefore,rightafterareset, the 2650boardthatwillinterface RAM, andthensequentiallyaccessing boards. has roomforfiveedgeconnectors,and RAM boardorI/Oboard.The If thesesignals checkout,then FIG. 2-2650MICROPROCESSORtimingrelationships. REIIDMR OPREO If the If theprocessor'sbuschecksout,then Locating aproblemintheProcessor AM/R./DATA OUT DISPMEM M/10 ITYP. DASHES) OISPMEM WRP SLOW UPPED FAST OPREO CPU CLOCK DISPMEM O FAST FOR ► A K line shouldundergomany ' - '1 1 4 TI ° line checksout,then H AST DISPMEM T1 LOW TO line indi- TI VALID VALID FAST W CM aregated in,alongwithLNIto selections inaline,youwillhavebig should belowwheneverthevideoisnot Address Switch.Ifthe are selectedtoaddressthedisplay are multiplexedbytheDisplayMemory outputs atthefirsthorizontal-dotposi- shorted. screen. So,ifyouhaveseveralofthese is whenthedisplayRAMaddressed loaded withthecharactergenerator's Sync Generatorcircuitry. generator isselected,anditabsent,a displayed. Again,adual-tracescopeis dual-trace scope.Iftheothercharacter characters. Twooftheoutputlines character generatorIC49.Forthis character generatorforlowercase, is beingblanked(andthusthe processor would causesomecharactersnottobe line islow,theprocessor'saddresslines line onIC49isdrivenbythe SAMPL against oneanothertoseeifanylook tion ofeachcharacter,andthensends the tries toaccessthedisplaymemory, not working properly, thesupervisor by theTimingChain.Thesignals C1to of theRAM.Itishelpfultohaveadual- graphics, orothercharacters.Therefore, display memoryontothedatabusso program willnotrun.The outputatpin when supervisorprogramistheonly wrong withthecharactergenerators, master-.Notethattheclear the eight-bitwordoutseriallyat the RAMmayalsobeshorted,which the buffersandoutputcanbe LN8, toselectthe correctaddress. RAM. Thisisthecasewhendisplay horizontal baronthescreenratherthan block ofallondotswillappearthe raising the reason, thechipenableonIC49(pin20) observed atthesametime.Thencheck thing thatisrunning,itonlyselects the board,withIC48beinganoptional that isusedforthenormaloperationof to seethattheinputandoutputof trace scopeforthis,sothattheinputto needed tocheckthedata-outlines blanked. Thisiseasilycheckedwitha high. their operationissimple.IC49theone that theprocessorcanreadcontents buffers arethesamewhenenableis 1 - The addressesforthedisplayRAM The outputshiftregisterisIC60.It TE5 linefromtheTimingChainand If thegatingcircuit fortheROMis There isalmostnothingthatcango ED DISPLAY ACCESS 1 VALID) FAST DISPMEM Tt' line). Theothercase TO line anddropping `ITI DISPLAY ACCESS 10 MSECMAX

I VALIOI BLANK section isjustamonostableandopera- cies. TheR—Cnetworkattheoutputof set, itwillstayperfectlyaligneduntil supervisor programmustbeworkingfor stores. tube. NOAA updateslist again bythesecondhalfofthissameR. output-voltage levelandchangeitintoa size asmuch 60 percentsmallerthanin service availablefreebywritingtothe conventional gun systems.Thenewin- concentrates the beamtoproduceaspot communicating weather,disasterorother warnings directtothepublic.Weather four electronlenselements,instead of Service hasupdateditslistofstationsto The serialoutputlineisclockedthrough Administration (NOAA)NationalWeather all oftheoperationsexcepttape action overalongerdistance byusing about theendoflastyear.Thenetworkis the company's 19-inch100-degree picture the solegovernmentoperatedsystemfor 555-timer shouldbeadjustedsothatthe output ofthe555isa4800-Hzsquare- only twoasinmostelectronguns. This or 162.55MHz.Alisting(bystate,call Zenith getsapatentforimproved control instructionwillaccesstheoutput signal levels,checkthetwogroupsof is changed.Thepotentiometerforthe wave. Thisisdividedbytwothefirst letter andfrequency)ofthestationsin flip-flop (pins3and5ofIC77), MD 20910. W. Schwartz. receivers areavailableatmostelectronic part ofIC75,andthenthisoutputis granted toZenithresearchand develop- data-bus bufferstobesurethatthey:ire supervisor program,thislinewillalway line gunishoused inthenarrow electron gun IC76 (pinI1)isusedtodecreasethe the cassette-tapeinterfaceandonceitis tional amplifier. more roundedsignal.Thedemodulator National WeatherService,SilverSpring. always beselectingoneofthese used togateononeofthetwofrequen- routines. Itisasimplemattertosetup port. ment engineersAllenBlackerand James high state.Eitherawritedataor happen iftheenablepinsarelockedina not gatingdataontothebus.Thiscould using agooddealofgatingcircuitryIf places. low. Inotherwords,thesupervisoronly the databusdoesn'thaveright has twoplacestooperatefrom,it\tiijl has receivedPatentNo.3,995,194. ROM isselected.Whenusingthe be lowwhenthe 12 ofIC-67goeslowwheneverthe The EFLgunextendsthefocusing The broadcastsareat162.40,162.475. The NationalOceanicandAtmospheric Zenith's EFL(ElectrostaticFocusLens) The I/Oports8arealsoenabled If thecircuitrychecksout, continued nextmonth DISPMEM line isal,o neck R-E of s

COMPUTER PROJECT Build 2650-Based Microcomputer System

Part III. Built on a single printed-circuit board, this 2650 microcomputer contains a video and cassette tape interface and resident supervisor program. Add a keyboard, video monitor, cassette tape recorder and power supply for a complete working system

JEFF ROLOFF

THE FIRST TWO PARES 01- IVIS .ARTICLE processing will be interrupted) can be you to type in two hex characters to fill appeared in the April and May issues set. When this address is reached, a the memory location. The following is and provided the construction details message is written on the screen and the an example of this routine: and an in-depth look at how the circuit CPU registers or any memory location A A100A works. can be inspected to see what they were 100A 05 data is 05, space This month, the article concludes with immediately before the breakpoint ad- indicates go on 1008 10C3B data is 10, change to a look at the software associated with dress. You can also clear this address if 3B the 2650 microcomputer and a look at you wish to change it. Another com- 100C 38Es data is 38, press es- how it's programmed. mand permits verification of what is on cape to terminate tape against any block of memory. routine Using the supervisor The specific instructions for the oper- In all, there are nine basic functions ation of the supervisor are provided. In To execute a program, type an E for of the supervisor program. First, you the examples, all underlined characters the command. The supervisor will then can alter or display any position of are ones entered by the operator. ask for the address that it should start memory. (You cannot, obviously, alter Everything else is printed on the screen executing at. It will then jump to the data that is in ROM.) This will allow by the supervisor program. A period (.) address and start executing instruc- you to enter and inspect your own indicates that the supervisor program is tions: programs in the RAM. Aller entering ready for a command. An A indicates .E A163@ execute at 163B, press and checking your program, you can use that it is waiting for you to type in an space to start the supervisor to jump to your program address. At any time the supervisor is and execute it. When your program looking for a keyboard input. you can If the program returns to the supervisor returns control to the supervisor (by a press ES (escape) which will terminate (by a branch instruction), all of the CPU branch instruction), it saves the contents the present command and wait for a registers are saved, and then it asks for a of the CPU registers so that you can new one. new command. inspect them. You can also set the CPU To alter or display memory, depress If you did return from your program registers before you jump to your the A on the keyboard. It will then ask by a branch instruction, or because of a program. When the program is finished for an address, which should be entered breakpoint, you can inspect the memory and you want to turn off the microcom- in hexadecimal form. The address and using the alter routine, or you can puter, the program can be transferred to the data then appear on the next line of inspect the CPU registers entering i. It cassette tape in blocks of two-256-bytes the video monitor. You can now do one will then ask you to type in a register and then transferred back to the micro- of three things: depress the Es key to number corresponding to the register computer at a later time. There is also a quit the alter/display routine, enter c to that you want, as follows: ~ C command to turn on the tape recorder change the data at that location, or zm so that you can manually rewind it, etc. depress the space-bar to display the next Enter For To troubleshoot the program, a break- memory location. If you decide to alter 0 Register 0 v point (a point in the program where the memory, the supervisor will wait for 1 Register 1, Bank 0 v 47 âRADI O-ELECTRONICS After allofthedatahasbeentrans- ask foranewcommand. stop bydepressingthe must routine, younowhavethreeoptions:to inspect anotherregisterbydepressing supervisor. Similartothealter/display before theprogramreturnedto ferred, thesupervisorwillautomatically all ofyourdatablockshavebeentrans- more thanthelengththatisentered,so length ofzeroshouldbeinsertedafter supervisor actuallydumpsone-byte supervisor tointerpretitcorrectly.The cause adumpof256bytes.Also, the space-bar: the registervaluebyenteringc.orto (in bytes—upto256)ofthedatabe enter a read in,andwillcauseanyloadofthis load routinetomultipleblocks last blockthattheloadroutineshould length ofzeroindicatesthatthisisthe data tobecompleted.Thisallowsthe the datathatwasinthisregisterright automatically whenallthedatahas command) andallowsittostopitself been loaded.Therefore,ablockwith ferred tothecassettetape: for thebeginningaddressandlength that alengthofFF(255indecimal)will transferred. Rememberthateverything without havingtore-entertheL(load supervisor willstartthetape recorder address differentthan theonethatyou and willlookforablockstarting with address. Afterthishasbeenentered, the been transferredtothecassettetape,use Also, ifthefirst block onthetapehasan the verify.If dataisnotthesameas the actualdata in memoryatthetimeof the datainblockiscompared with this address.Whentheblock isfound, the verify(v)command.Afterentering what isonthe tape,anerroroccurs. y, thesupervisorwillthenask foran If youwishtocheckthedatathathas The microcomputerwillthendisplay To transferyourprogramtotape. R3 2CC R8 B7es R4 C3_ .I .D A0000L00dumpanendoffile .D A11DBL10dumpthenext17 D 6 5 4 8 2 7 ProgramStatusWord, 3 be A10DB LFFdump256bytes D. entered inhexadecimalforthe Lower Register 3,Bank1 Register 2,Bank1 Register 1,Bank1 Register 3,Bank0 Upper Program StatusWord, Register 2,Bank0 The supervisorwillthenask 02 register3,bank0 has 2C,changetoa space togoon 02 escape toquit start at10DB block bytes es key, tochange against errorswhilerecording acters also.Theirpurposeistocheck indication whileloadingorverifyingin is recordedonthetapealongwith second issentaftertheblockofdata. command. Itsignifiesthatthebreak- point addresshasbeenreachedby after theaddressandlength.while address toloaditatandthelengthof either oftwoplaces. enter Lforthecommandandbesure new commandwhenitisdoneloading recorder isinplaymode.Allofthedata line fromtheboard.Youmustbesure control wiresofthetaperecordertoa program. thesupervisorwillsaveallof breakpoint: program, entera back data.Thefirstsumcheckissent Therefore, youcanreceiveanerror (i.e., recordorplay). relay, anddrivethisrelaywiththe recorder offandon.Toimplementthis writing themessage: The verifyroutinereturnstoaskfora the registersandwaitforanew the load.Thesupervisorwillaskfora address andthelengthofblock: new commandiftheverifywasall right. routine transfersthedataalongwith will thenaskyoufortheaddressof to havetherecorderincorrectmode feature, youmusthooktheauxiliary the tape: the supervisortakescareofturning typed inyouwillgetanerrormessage. Recorded ontapearesumcheckchar- To loaddatafromatape,simply To setabreakpointaddressinyour It shouldbenotedthatthedump When thisaddressisreachedinthe When usingthecassettetaperoutines, Address Mnemonic B A1703 .V A1000 0083 01B6 0024 0396 )< besurethatthefirst block ontapeisfor the dataiscorrect address 1000,andthat set breakpointaddress load • RETU LFCR KBIN HXOT INHX WCHR to be1703 B from as thecommand.It tape save the registervalues. R3. inputs twohexcharacters andconvertsthemto binaryin in R3. line. Inputs oneASCIIcharacterfrom thekeyboardandputs moves thecursortoleftmostpositionofnext branch tothisaddress toreturnthesupervisor and characters. updates thecursorposition. takes thebinarydatainR2and displaysitastwohex writes thecharacterthatisinR3onscreenand or playing TD ON TABLE I space codeandcarriagereturn.Thefirst display. whichisalsoquitesimpletodo. printable characteralongwiththeback- Table 2hasthelistingforTV- you knowhowtousethesupervisor al. obvious useisforaTVtypewriter program, whatcanyoudowithit?One thing thattheprogramdoesisbranchto TV typewriter typewriter programthatacceptsan\ address whichisthesecondorthirdb‘ microprocessor anditslanguagecanbe set abreakpointtobeexecutedatan you setwasatthewrongaddress, found inthe many usefulsubroutinesthatcanbe an addresspositionwhereinstruction address thatthebreakpointwassetat. and theprogramwillbeallowedtorun inserted instructionandwillnotoperate useful onesareshowninTableI. used bybranchingtothem.Themore of aninstruction. Subroutines correctly: program willstillhaveasupervisor point hasbeenexecuted,itiscleared Note thatyoumustsetbreakpoints entering c.Ifyoudonotthis, examined asyouseefit.Afterthebreak- must clearthebreakpointaddressby will returnyouto would begin.Inotherwords,youcannot past thepointnexttimethrough. the tape.etc.)enter Now thatyoursystemisfinishedand More informationaboutthe2650 If youdecidethatabreakpoint To runthetaperecorder(torewind The supervisorrespondsbytypingthe The supervisorprograminclude. The registersandmemorycannowbe currently selected. Alt BP 1703indicatesbreakpointad- which isavailablefromSignetics. Description registers usedareinthebank 2650 MicroprocessorManu .Q 1703 dress wasreached the R. supervisor. Pressing escape the in le thekeyboard input routine (KBIN) with a branch-to-subroutine instruction TABLE I1—TV TYPEWRITER PROGRAM (ESTA). This subroutine receives one Une Address Instruction Label Operation Operand Comments character from the keyboard and prints 1 0000 LFCR EQU 0024 ADDRESS OF LINE- it on the display, if it is not a control FEED ROUTINE character. After the character has been 2 0000 KBIN EQU 0309 ADDRESS OF KEY- printed (if it is printable), the subroutine BOARD INPUT returns to the program to check if it was ROUTINE a backspace or a carriage return. If it 3 0000 ORG 1600 START AT ADDRESS was either of these two, the result of the 1600 IN HEX 4 1600 TVT CPSL respective compare instruction will be to 75 08 08 SET OPERATIONS WITHOUT CARRY/ clear the condition code. Then the BORROW branch instructions immediately follow- 5 1602 3F 03 09 BSTA,3 KBIN GET KEYBOARD IN- ing the compare instructions check the PUT condition code to see if the compare was NOTE THAT KBIN equal. If it was equal, the program ALSO WRITES THE branches to the correct subroutine. The CHAR carriâge-return subroutine is simply a 6 1605 E7 08 COMI,R3 08 COMPARE THE branch to the line feed-carriage return CHARACTER TO A (LFCR) subroutine in the monitor, BACKSPACE 7 1607 18 07 BCTR,0 BACK IF A BACKSPACE, DO while the backspace routine is contained BS ROUTINE in the TV typewriter program. 8 1609 E7 OD COMI,R3 OD COMPARE THE The backspace routine simply takes CHARACTER TO A the cursor pointer and decrements it. It RETURN also writes a space at the present cursor 9 160B 3C 00 24 BSTA,0 LFCR IF A RETURN, DO position and writes a new cursor at the CARRIAGE RETURN new position. ROUTINE The RAM positions I7FE and 17FF 10 160E 1B 70 BCTR,3 TVT JUMP BACK TO BE- are used to store the present address of GINNING—GET NEW CHAR the cursor. To store a character in the 11 1610 07 20 BACK LODI,R3 20 ASCII FOR A SPACE cursor position, indirect addressing is 12 1612 CF 97 FE STRA,R3 I17FE STORE THE SPACE used. This causes the processor to read AT THE CURSOR what is in I7FE and I7FF and use this LOCATION data as the actual address where it 13 1615 OF 17 FF LODA,R3 17FF LOAD THE LOW should do the operation. ORDER CURSOR Tape format ADDR INTO R3 14 1618 A7 10 SUBI,R3 10 SUBTRACT ONE The cassette tape routines take care of CHAR POSITION all data encoding and decoding needed FROM IT to interface with your tape unit, but if 15 161A CF 17 FF STRA,R3 17FF STORE THE NEW data is to be transferred between two CHARACTER different types of machines, you must 16 161D 77 08 PPSL 08 OPERATIONS NOW have the format of the tape. That format WITH CARRY/BOR- is as follows: ROW Character Description 17 161F OF 17 FE LODA,R3 17FE HIGH ORDER 1 colon indicating the CURSOR ADDRESS start of a block 18 1622 A7 00 SUBI,R3 00 SUBTRACT BORROW FROM PREVIOUS 2 high order address byte for load SUBRACT 19 STORE THE NEW 3 low order address byte 1624 CF 17 FE STRA,R3 17FE for load HIGH ORDER ADDR 4 length of data block 20 1627 07 5C LODI,R3 5C CODE FOR THE CURSOR 5 sumcheck character for bytes 1-4 21 1629 CF 97 FE STRA,R3 I17FE STORE THIS IN THE 6 to n-1 data NEW CURSOR n sumcheck for data POSITION 22 162C 1B 52 BCTR,3 TVT JUMP BACK—DO Character 4 is the length of the data NEXT CHARACTER 23 162E END block. If it is zero, it represents the fact that this is the last block and that the load routine can stop. If it is from 1 to 255 (H01 to HFF), it is one less than the before data is started. When read back. routine that the supervisor provides. To length of the data field. This allows each byte (including the sumcheck) goes people who are having their first transferring data blocks of exactly 256 through this routine. If no errors have computer experience, this solution may bytes. occurred, the ending sumcheck char- not be so clear. All characters are 8 bits wide, with acter should be zero. Each block has two Recall that the alter routine allows one start and two stop bits. The least sumchecks and they are totally indepen- you to change the data contained in any significant bit is recorded first, with the dent of one another. RAM memory location. Thus, by using other bits following in order. this routine to change all of the memory The sumcheck is generated by feeding Loading a program locations that your program needs, you ~ C each data byte into an EXCLUSIVE- After you have written a program. can enter your program into the z OR gate with the sumcheck character how do you load it? To many people system. m m and then rotating the resulting byte to who have been around . A question comes up immediately: At V the left one bit. The sumcheck is cleared the answer is obvious: use the alter continued on page 84 V 49 BUILD A COMPUTER continued from page 49 which memory location should I start the program? The answer is that your program can be put in any RAM area, so you can start your program anywhere from address H 1510 to H17E9. This is the usuable RAM space that the board provides you. If you expand the RAM you could, of course, put your programs in that space also. For an example, suppose you have the following program and want to load it into the system:

07 00 LODI,R3 00 06 10 LODI,R2 10 1F 00 00 BCTA,UN 0000

If you choose to load this program at the start of RAM, then you would alter location 1510 first. The supervisor displays the contents of 1510, and permits you to change it. Once it is changed, the next byte is displayed (1511) and you are again allowed to change it. This process continues until the entire program is loaded.

TABLE Ill

A A1510 1510 00007 1511 00000 1512 00006 1513 00C10 1514 00C1E ***note that this line has a mistake on it 1515 00e A A1514- 1514 1EC1F 1515 00000 1516 00000 1517 00e °4 °done!

(e) represents the pressing of the escape key.

If you should make a mistake, simply press escape, and alter the location with the mistake and continue on. The way the screen would look for program would appear on the video monitor is shown in Table 3. R-E