Freescale Semiconductor, Inc... microprocessor used for decoding is the MC68HC(7)11 while microprocessor usedfordecodingisthe MC68HC(7)11 2023. and 1995 between distinguish Itisnotpossible to 2022. and thiscanbeusedtocalculate ayearintherange1995to beworked out cyclecan,however, leap–year/year–start–day data.Thepositioninthe28–year available andcannotbeuniquelydeterminedfromthe transmitted and yeartype)intoday–of–monthmonth.Theisnot dateinformation(day–of–week,weeknumber transmitted the form.Themicroprocessorconverts hexadecimal displayed whilst allincomingdatacanbedisplayedin In thisapplication,timeanddatecanbepermanently standards. Localtimevariation(e.g.BST)isalsotransmitted. provides averyaccurateclock,traceabletonational Freescale AMCU ApplicationsEngineering Topping Prepared by:P. This documentcontains informationonaproductunder development. This to thecompanyleasingitforuseinaspecificapplication. available blocks areusedcommerciallywhereeachblockis other 0isusedfortimeanddate(andfillerdata)whilethe Type purpose.There are16datablocktypes. used foradifferent countriesbuthasamuchlowerdatarateandis European with theRDSdataincludedinVHFradiosignalsmany aswelltheaudiosignal.Thishassomesimilarities data using an HC11 and Longwave an Radio MC3371 Data Decoding Figure 1showsablock diagramoftheapplication; Figure data is transmitted every minuteontheand Time The BBC’s Radio4198kHzLongwave transmittercarries The BBC’s Ltd.,EastKilbride RF AMPLIFIERDEMODULATOR FM BF199 FILTER/INT.: LM358 FILTER/INT.: AMP/DEMOD.: MC3371 LOCAL OSC.:MC74HC4060 Figure 1.BlockDiagram INTRODUCTION Freescale reservestherightto changeordiscontinuethisproductwithout notice. time, etc. time, 16–character dot–matrixLCD moduleisusedtodisplaydata, The decoderiscontrolledby4keysanda microprocessor. and limitthesignalintoaform whichcanbeusedbythe integrate filter, and operationalamplifiersareusedtoamplify, frequency of198kHzisconvertedtothestandard455IF TheRF it although works at anunusuallylowRFfrequency. The radiodatamodulationisFMsotheMC3371suitable fordualconversionVHFcommunication equipment. intended limitingIFamplifierandFM demodulator primarily mixer, a isasuperheterodynereceiverwhichincludes MC3371 the databitshastobeincludedinhardwaredesign.The chipsareavailable,thecapabilityofretrieving demodulation UnlikeRDS,where an MC3371isusedfortheradioreceiver. a BBCdocument ThespecificationofLFRadioDataisdescribedin frequency. inScotland.Allthreetransmittersusethesame Burghead and with alittlehelpfromtwo50kWtransmittersatWesterglen is coveredbya500kWtransmitteratDroitwichinEngland rate boardupdatingandlightingcontrol.ThewholeoftheUK switching,foreignexchange usesareelectricitytariff Typical POWER CONTROL MC34160 1 . MC68HC(7/8)11Ex LCD MODULE LCD MCU KEYBOARD AN1597 Order thisdocument by AN1597/D AN1597 Freescale Semiconductor, Inc. This application incorporates an alarm clock similar to that transmitter by dividing the 36 data bits (including the described in AN4602 which, if permanently powered, can be application code) with the generator polynomial. As this used to switch on the radio supplying the data at the required remainder is then used as the 13–bit check word, the 49 alarm time. This control could be to the power supply of the received bits should give a remainder of zero when divided by radio, or to the audio stage only. If an audio mute is used, radio the generator polynomial. Synchronisation is thus carried out data time information can be updated even when the radio is by looking for a zero 13–bit remainder. Multiplication of the “off’’. Alternatively the decoder can be used simply to display 49–bit received data by the matrix shown in Table 2 is time and date with its power being supplied from the radio and equivalent to this polynomial division and is the method used manually switched on and off. here. During synchronisation this calculation has to take place after each bit is received, using the last 50 (actually 49 as the first fixed bit is not used), until a valid (zero) remainder is LW Radio data found. Once this has been found, the check need only be done after another 50 bits have been received, as this is when the The transmitted data is conveyed using linear next valid block would be expected. If, at that point, a zero phase–modulation of the carrier by a shaped and bi–phase remainder is not found the bit–by–bit check is re–started. The encoded waveform. This is applied to the main carrier as there CRC bits are capable of error correction but this application is insufficient space in the low bandwidth AM signal ("4.5 does not attempt correction, using them only for kHz) for a subcarrier. In order not to interfere with the normal synchronisation and error detection. Use of the burst error modulation, the data rate is a very low 25 Hz. Bi–phase coding correction capability can allow good data to be received in the . and a small deviation ("22.5 degrees) are used so that the . presence of errors but also increases the undetected error . transmission’s use as a frequency standard is retained. The rate as blocks with more errors than the code is capable of c data stream is partitioned into 50–bit blocks but, like RDS correcting (a single burst of up to 6 bits) may be deemed n data, there are no gaps between blocks. Additional character correctable and thus pass through undetected. I redundancy checkword (CRC) bits are used to enable Blocks of type zero are used for transmitting the time and , synchronisation. The bit rate of 25 Hz and the block length of r date information and also for filler codes. All other types (1 to 50 bits mean that a block takes 2 seconds, hence 30 blocks o 15) are user blocks whose data is meaningless in this context are transmitted every minute. t but can be displayed in hexadecimal form as it comes in. The Each 50–bit block contains a single bit prefix (always a 1), c first of the 32 data bits in a type 0 block determines if it is a a 4–bit application code (block number), 32 bits of data and 13 u time–code block (first bit a zero) or simply a filler (first bit a extra CRC bits which are used for synchronisation and error d one). Time–code blocks are transmitted immediately prior to detection/correction. The particular code used is the 49, 13 the minute epoch so that the exact time is indicated although n shortened–cyclic code (G(x) = 36365 octal) described by only hours and minutes are included in the data. The structure o 3 Kasami but modified by the addition of the fixed prefix to of the time–code block is shown in Table 1. c address the cyclic code’s poor block–synchronisation i capability. The CRC is the remainder calculated in the m e ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Table 1. Structure of Clock–time Blocks S ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ BIT FUNCTION e l ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 1 Prefix (1) Used only for synchronisation and error detection a ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ c 2–5 Block type no. 0000 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ s 6 Time/filler flag 0 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ e 7–8 Leap year cycle 00: this year leap e ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á 01: last year leap r 10: leap year 2 (or more) years away ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á F 11: next year leap ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 9–11 Year start day Day–of–week on 1st January (1:Monday, 0 not used) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 12–17 Week number Week number (1–53, 0 & 54–63 not used) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á 18–20 Day of week Current day–of–week (1: Monday, 0 not used) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á 21–25 Hours 0–23 UTC (24–31 not used) ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 26–31 ÁÁÁÁÁÁÁMinutes 0–59 UTC (60–63 not used) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ32–37 Local offset Local deviation from UTC in 2’s complement form in increments of 30 minutes (BST = CET = 000010) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 38–50 CRC Used only for synchronisation and error detection ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á 2 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN1597 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁTable 2. 13 x 49 Decoding Matrix Circuit ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁHEX BINARY OCTAL Figure 1 shows a block diagram of the application, the ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ17 3B 1 0111 0011 1011 13473 microprocessor used is the MC68HC811E2 (a 711E9 or E20 could also be used) while an MC3371 is used for the radio ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ15 E7 1 0101 1110 0111 12747 receiver. The MC3371 is a superheterodyne receiver ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ14 89 1 0100 1000 1001 12211 including mixer, limiting IF amplifier and FM demodulator. The ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ14 3E 1 0100 0011 1110 12076 RF frequency of 198 kHz is converted to the standard 455 kHz 0A 1F 0 1010 0001 1111 05037 IF. This would require a crystal of 653 kHz which is not a ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ standard frequency and would be difficult and expensive to 1B 75 1 1011 0111 0101 15565 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ obtain. To avoid this, higher standard crystal frequencies were 13 C0 1 0011 1100 0000 11700 investigated to find one suitable for dividing down to ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 09 E0 0 1001 1110 0000