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Soft Error Modeling and Analysis of the Neutron Intercepting Silicon Chip (NISC) C

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Soft Error Modeling and Analysis of the Neutron Intercepting Silicon Chip (NISC) C Soft Error Modeling and Analysis of the Neutron Intercepting Silicon Chip (NISC) C. Çelik,1,2 K. Ünlü,1,2 N. Vijaykrishnan,3 M. J. Irwin3 Service Provided: Neutron Beam Laboratory Sponsors: National Science Foundation, U. S. Department of Energy, INIE Mini Grant, the Penn State Radiation Science and Engineering Center, and the Penn State Department of Computer Science and Engineering detailed records for particles, including the mother Introduction particle of the particle that causes the soft error. Advances in microelectronic technologies result in semiconductor memories with sub-micrometer NISC Simulation Model transistor dimensions. While the decrease in the dimensions satisfy both the producers’ and consumers’ The semiconductor device node represents the basic requirements, it also leads to a higher susceptibility of data storage unit in a semiconductor memory, and for the NISC design it is chosen to be as simple as possible the integrated circuit designs to temperature, magnetic 10 7 interference, power supply and environmental noise, in order to focus on the B(n,α) Li reaction. A cross and radiation. sectional view of the memory node model is illustrated in Figure 1. The BPSG layer is designed to produce Soft errors are transient circuit errors caused due to energetic α and 7Li particles, hence it acts as a source excess charge carriers induced primarily by external for producing soft errors. In a semiconductor memory, radiations. The Neutron Intercepting Silicon Chip (NISC) depending on the architecture and vendors, there are promises an unconventional, portable, power efficient different layers to produce depletion regions, gates, neutron monitoring and detection system by enhancing and isolation layers. Since the objective of this study to the soft errors in the semiconductor memories using focus on feasibility of the NISC, all the actual layers and 10B-enriched regions in the semiconductor memory materials that can be found in a semiconductor structure. It was demonstrated that one of the major memory are lumped into one single region consisting interferences related to memory devices is soft error or only of silicon. Commercially available semiconductor single event upset phenomena and boron content in memory architectures, SRAM, DRAM, and Flash the Borophosphosilicate glass (BPSG) layers has been memory have different node architectures and proven to be a major source of the soft errors [1-3]. The different number of nodes to store a single bit of data, authors previously published experimental results of e.g. SRAM can have six transistors while DRAM and soft error rate (SER) dependency on the neutron flux Flash memory requires a single transistor to store or and the operating voltage of the memory and results the control the storage of the data. However, all of the are used in studies from Intel [4, 5]. 10B-enriched BPSG architectures have a generic structure that can be layers are used to enhance the soft errors by taking simplified as a lumped silicon region and a BPSG region advantage of the 10B(n,α[1.47 MeV])7Li[0.84 MeV] that NISC aims to introduce on top of the lumped reaction. Both of the produced particles have the ability silicon region. to ionize in the silicon substrate region, which has a comparable thickness with the ranges of these particles. In this paper, SER simulation results of simple silicon semiconductor memory device node models with different feature sizes and 10B content in the BPSG layers will be presented. An analysis tool is developed for the simulation of the charged particle interactions in the semiconductor memory model, named NISC Soft Error Analysis Tool (NISCSAT). NISCSAT performs the particle transport and tracking via Geant4 [6]. Some features of the NISCSAT are multiple memory node FIGURE 1: Schematic drawing of NISC node model. definitions, multiple node layers, multiple source definitions (including cosmic rays and spontaneous Nuclear simulations should be coupled with solid-state fission sources), electromagnetic field support, and device simulations in order to investigate the overall 1 Department of Mechanical and Nuclear Engineering, The Pennsylvania State University, University Park, PA 16802 2 Radiation Science and Engineering Center, The Pennsylvania State University, University Park, PA 16802 3 Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802 system behaviors, including the critical charge of the the Silicon region mainly defines the required critical model and sensitive volume dimensions and locations. charge for an upset event in the node for the NISC The sensitive volume of the node is defined as the model. induced excess charges in this region most likely cause soft errors and are generally located in the depletion NISC Simulation Results regions that are in close proximity to the gates. The NISC node simulations performed with node required critical charge depends on the device dimensions of 5 µm x (t + t ) x 5 µm where t is the architecture and operation conditions of the B S B BPSG thickness and tS is the silicon region thickness. semiconductor memory. However, in this stage these Simulation results with thermal neutrons proved that simulations are not coupled with the NISCSAT the SER is proportional to the 10B content of the BPSG simulations and reasonable values have been assigned region since the reaction probability increases as 10B for the critical charge value in the simulations. content increases as given in Figure 3. The solid line Generally, critical charge is proportional to the gate represents the boron as the BPSG material and red interconnects capacitance and voltage, and is therefore points represent the compounds, listed in Table 1, as sensitive volume thickness. An approximation is used to alternative materials for the BPSG material. correlate the critical charge with the sensitive volume 2 2 thickness length as QCRIT ≈ 0.0023 (pC/μm ) x t S [7,8], TABLE 1: NISC BPSG Materials (NAT: Natural, ENR: Enriched) where tS is the thickness of the sensitive volume. This approximation produces reasonable critical charge Composition 10B Content values and most importantly shows the feature size Material (% by weight) (%) dependency of the soft errors. NAT 10 11 In order to accelerate the convergence and the B B (20), B (80) 20 precision of the Monte Carlo calculations a mono- ENR 10 11 energetic, mono-directional neutron source is defined B B (90), B (10) 90 NAT on the surface of the memory node and the entire B2 O (15), P O (10), BPSGNAT 3 2 5 1 silicon region is assumed as the sensitive volume of the SiO (75) 2 node. Memory node can be treated as a “unit-cell” of ENR the semiconductor memory and can be used to ENR B2 O3 (15), P O (10), BPSG 2 5 4 investigate the whole memory soft error analysis. SiO (75) 2 Simulations for single node and node arrays are also NAT NAT performed to observe the applicability of the unit-cell BN B N (100) 9 based calculations. Figure 2 illustrates the array BNENR BENR N (100) 39 structure of the NISC. NAT NAT B2O3 B2 O3 (100) 6 ENR ENR B2O3 B2 O3 (100) 27 As shown in the Figure 3, there is a neutron self- shielding effect of the boron by increasing 10B content. However, since the neutron mean free path, approximately 20 µm for 90% 10B enriched boron (BENR), in the boron is much larger than the BPSG thickness, this effect is dominated by the increase in the reaction rates in the BPSG region. Introducing 10B-enriched FIGURE 2: Illustration of the NISC array model regions in the NISC increases its detection efficiency of Since the main driving mechanism of the NISC is due to the thermal neutrons by almost two orders of 10 7 magnitude. the B(n,α) Li reaction, thermal neutron detection is the main consideration but the response of the NISC to Compounds show similar behavior and due to different fast neutrons is also studied and results are compared interactions of the neutrons and particle ranges in the with the thermal neutron source calculation results. materials, SER probability slightly differs from the SER SER dependency on the BPSG region is investigated probability of the boron. with different 10B content in the BPSG region and Device scaling simulations are performed with the different node dimensions are used to observe device- ENR scaling effects on the SER. Defined BPSG materials, thermal neutron source and B ; results are given in 10 Figure 4. Enhancement in the soft errors is again each having a different B content, are given in Table 10 1. BPSG layer thickness primarily defines the reaction observed with increasing B. In addition to neutron rate probability of the neutrons while the thickness of self-shielding, an increase in the BPSG thickness also almost zero for the neutron energies above the threshold and can be ignored if compared to thermal neutron results. TABLE 2: Incoming neutron energy dependency of the NISC. Simulations performed with 5x(2+1)x5 µm node, QCRIT= 2.3 fC Soft Errors Node Neutron BPSG Probability Source 9 Energy Material (x10 ) per Particles (%) flux (n/cm2 s) 0.0253 eV BENR α (65), 7Li (35) 8.43 0.0253 eV BPSGNAT α (56), 7Li (44) 0.10 2.0 MeV BENR d (100) 0.003 ENR FIGURE 3: Device scaling results for NISC node with B and NAT thermal neutrons. 2.0 MeV BPSG - - 14 MeV BENR 10B (50), 25Mg(50) 0.005 14 MeV BPSGNAT - - 28 ENR α (34), Si(33), 50 MeV B 3 0.008 He(33) 50 MeV BPSGNAT 28Si(100) 0.003 In the node calculations, the probability of the multiple bit upsets (MBUs) were ignored since the produced particles that leave the node were killed and cannot contribute SER in another node.
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