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TVP5146M2 NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder with Macrovision™ Detection, Ypbpr Inputs, 5-Line Comb Filter, and SCART Support

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TVP5146M2 NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder with Macrovision™ Detection, Ypbpr Inputs, 5-Line Comb Filter, and SCART Support TVP5146M2 NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder With Macrovision™ Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Literature Number: SLES141H July 2005–Revised February 2012 TVP5146M2 www.ti.com SLES141H –JULY 2005–REVISED FEBRUARY 2012 Contents 1 Introduction ........................................................................................................................ 9 1.1 Features ...................................................................................................................... 9 1.2 Description ................................................................................................................. 10 1.3 Applications ................................................................................................................ 11 1.4 Related Products .......................................................................................................... 11 1.5 Document Conventions ................................................................................................... 11 1.6 Ordering Information ...................................................................................................... 11 1.7 Functional Block Diagram ................................................................................................ 12 1.8 Terminal Assignments .................................................................................................... 13 1.9 Terminal Functions ........................................................................................................ 14 2 Functional Description ....................................................................................................... 16 2.1 Analog Processing and A/D Converters ................................................................................ 16 2.1.1 Video Input Switch Control .................................................................................... 17 2.1.2 Analog Input Clamping ......................................................................................... 17 2.1.3 Automatic Gain Control ........................................................................................ 17 2.1.4 ADCs ............................................................................................................. 17 2.2 Digital Video Processing .................................................................................................. 17 2.2.1 2x Decimation Filter ............................................................................................ 18 2.2.2 Composite Processor .......................................................................................... 18 2.2.2.1 Color Low-Pass Filter .............................................................................. 20 2.2.2.2 Y/C Separation ..................................................................................... 21 2.2.3 Luminance Processing ......................................................................................... 22 2.2.4 Color Transient Improvement (CTI) .......................................................................... 22 2.2.5 Component Video Processor ................................................................................. 23 2.2.6 Color Space Conversion ....................................................................................... 23 2.3 Clock Circuits .............................................................................................................. 23 2.4 Real-Time Control (RTC) ................................................................................................. 24 2.5 Output Formatter .......................................................................................................... 25 2.5.1 Fast Switches for SCART ..................................................................................... 26 2.5.2 Separate Syncs ................................................................................................. 26 2.5.3 Embedded Syncs ............................................................................................... 31 2.6 I2C Host Interface .......................................................................................................... 32 2.6.1 Reset and I2C Bus Address Selection ....................................................................... 32 2.6.2 I2C Operation .................................................................................................... 32 2.6.3 VBUS Access ................................................................................................... 33 2.6.4 I2C Timing Requirements ...................................................................................... 34 2.7 VBI Data Processor ....................................................................................................... 34 2.7.1 VBI FIFO and Ancillary Data in Video Stream .............................................................. 35 2.7.2 VBI Raw Data Output .......................................................................................... 36 2.8 Reset and Initialization .................................................................................................... 36 2.9 Adjusting External Syncs ................................................................................................. 37 2.10 Internal Control Registers ................................................................................................ 38 2.11 Register Definitions ........................................................................................................ 42 2.12 VBUS Register Definitions ............................................................................................... 88 3 Electrical Specifications ..................................................................................................... 93 2 Contents Copyright © 2005–2012, Texas Instruments Incorporated TVP5146M2 www.ti.com SLES141H –JULY 2005–REVISED FEBRUARY 2012 3.1 Absolute Maximum Ratings .............................................................................................. 93 3.2 Recommended Operating Conditions .................................................................................. 93 3.3 Crystal Specifications ..................................................................................................... 93 3.4 Electrical Characteristics ................................................................................................. 94 3.5 DC Electrical Characteristics ............................................................................................. 94 3.6 Analog Processing and A/D Converters ................................................................................ 94 3.7 Clocks, Video Data, Sync Timing ....................................................................................... 95 3.8 I2C Host Port Timing ...................................................................................................... 95 3.9 Thermal Specifications .................................................................................................... 96 4 Example Register Settings .................................................................................................. 97 4.1 Example 1 .................................................................................................................. 97 4.1.1 Assumptions ..................................................................................................... 97 4.1.2 Recommended Settings ....................................................................................... 97 4.2 Example 2 .................................................................................................................. 98 4.2.1 Assumptions ..................................................................................................... 98 4.2.2 Recommended Settings ....................................................................................... 98 4.3 Example 3 .................................................................................................................. 99 4.3.1 Assumptions ..................................................................................................... 99 4.3.2 Recommended Settings ....................................................................................... 99 5 Application Information .................................................................................................... 100 5.1 Application Example ..................................................................................................... 100 5.2 Designing With PowerPAD™ Devices ................................................................................ 101 Revision History ....................................................................................................................... 102 Copyright © 2005–2012, Texas Instruments Incorporated Contents 3 TVP5146M2 SLES141H –JULY 2005–REVISED FEBRUARY 2012 www.ti.com List of Figures 1-1 Functional Block Diagram ....................................................................................................... 13 1-2 Terminal Assignments Diagram ...............................................................................................
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