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- Intel Processor Identification and the CPUID Instruction
- The Design of Scalar AES Instruction Set Extensions for RISC-V
- Measuring Performance: Chapter 4!
- Media Applications on Hyper-Threading Technology
- Product Change Notification
- X86 Instruction Set Architecture
- MMX™ Technology Architecture Overview
- The MMX Instruction Set
- Intrinsics Lecture 1
- Knights Landing (KNL): 2Nd Generation Intel® Xeon Phi™ Processor
- Intel's MMX Speeds Multimedia: 3/5/96
- 17. Risc, Cisc, and Vliw
- Direct Compilation of High Level Languages for Multi-Media Instruction-Sets
- Using Advanced Vector Extensions AVX-512 for MPI Reductions
- X86 Assembly Language Reference Manual
- Simplex: Repurposing Intel® Memory Protection Extensions for Information Hiding Salvaging Endangered Hardware Features for Security
- Katmai Enhances MMX: 10/5/98
- Intel® Architecture Instruction Set Extensions Programming Reference
- An Evaluation of Intel's Restricted Transactional Memory For
- Intel X86 (Skylake) Architecture for Software Engineers Let Mindshare
- Evaluating MMX Technology Using DSP and Multimedia Applications
- Future Processor Architectures
- Intel Technology Journal
- Low-Power Embedded Pentium Processor with MMX™ Technology
- An Evaluation of Intel's Restricted Transactional Memory For
- Ravindra Babu Ganapathi Product Owner/ Technical Lead Omni Path Libraries, Intel Corp
- Practical Vectorization Intro Measure Prereq Techniques Expectations
- MMX for Multimedia Pcs
- System V Application Binary Interface Intel386 Architecture Processor Supplement Version 1.1
- Quantifying the Effectiveness of MMX in Native Signal Processing
- CPUID Specification
- Intel 64 and IA-32 Architectures Optimization Reference Manual [PDF]
- CPUID Specification
- Intel® Processor Identification and the CPUID Instruction Application Note
- Introduction to Intel® Advanced Vector Extensions by Chris Lomont
- AMD Extensions to the 3Dnow! and MMX Instruction Sets Manual
- 4. Instruction Tables Lists of Instruction Latencies, Throughputs and Micro-Operation Breakdowns for Intel, AMD, and VIA Cpus
- Instruction Set Extensions for Support of Cryptography on Embedded Systems
- Chuck Yount, Intel Corporation, [email protected] with Data Contributed by • Alexander Breuer & Josh Tobin, Univ. of C
- SIMD Extension
- MMX Technology Extension to the Intel Architecture
- Specialized Evolution of the General-Purpose CPU
- Motion Video Instruction Extensions for Alpha
- Using MMX Technology in Digital Image Processing (Technical Report and Coding Examples) TR-98-13
- Intel® 64 and IA-32 Architectures Optimization Reference Manual
- Instruction Set Progression
- The MMX Instruction Set Chapter Eleven
- Architecture-Instruction-Set-Extensions-Programming-Reference-812319.Pdf
- 4 Database Concurrency Control Using Intel TSX 55 4.1 Innodb Internals
- Measuring the Performance of Multimedia Instruction Sets
- X86 Vector Processing Extensions Vector Processing Today
- RFQ # 2021 02 All Flash 2U Server BIDS
- Programming with Vector Instructions MMX, SSE And
- Introduction to the X86 Architecture
- Product Change Notification
- Multi-Core Processors and the Future of Parallelism in Software
- Initial Observations of a Simultaneous Multithreading Processor
- Vector Intrinsics
- The Floating-Point Unit of the Jaguar X86 Core
- Intel® Architecture Instruction Set Extensions and Future Features Programming Reference