DOCSLIB.ORG

Moss Texas Instruments Sun Oracle

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Moss Texas Instruments Sun Oracle HISTORY OF MICROPROCESSORS INTEL 4004 8080 8086 80286 I386 80386SX PENTIUM PENTIUM II PENTIUM 4 ITANIUM 2 PENTIUM D CORE I5 SANDY BRIDGE Several manufacturers produced 2,300 740,000 4,500 1 M 29,000 10 M 134,000 12 M 275,000 40 M 275,000 25 M 3.2 M 200 M 7.5 M 450 M 42 M 3.4 B 220 M 1 B 230 M 3.2 B 774 M 2.8 B 2.7 B 3.4 B mainframe computers from the late 8008 8085 8088 386DX 486DX PENTIUM PRO PENTIUM III ITANIUM PENTIUM M CORE 2 DUO CORE I7 XEON “NEHALEM-EX” 1950s through the 1970s. The group 3,500 200,000 6,500 3 M 29,000 5 M 275,000 33 M 1.18 M 50 M 5.5 M 200 M 9.5 M 1 B 25 M 800 M 77 M 1.7 B 291 M 3 B 731 M 3.47 B 2.3 B 2,666,666,666 of manufacturers was first known as AMD 2900 29000 AM386 AM5X86 K6 ATHLON XP SEMPRON ATHLON 64 X2 OPTERON “SHANGHAI” OPTERON "IBM and the Seven Dwarfs": IBM, 2,200 12.5 M 207,000 25 M 275,000 40 M 1.6 M 133 M 8.8 M 233 M 37.5 M 1,733,333,333 54.3 M 2.9 B 153.8 M 2.4 B 463 M 3.2 B “MAGNYCOURS” Burroughs, UNIVAC, NCR, Control OPTERON “BARCELONA” OPTERON “ISTANBUL” 2.4 B 2.6 B 2.8 B Data, Honeywell, General Electric 29050 AM486 K5 ATHLON (K7) OPTERON (K8) OPTERON “ATHENS” PHENOM (K10) PHENOM II BULLDOZER “FX” and RCA. 428,000 40 M 1.2 M 120 M 4.3 M 100 M 22 M 1 B 105.9 M 2.4 B 106 M 3 B 758 M 2.6 B 3.2 B 1.2 B 3.6 B MOTOROLA MOTOROLA IBM MOTOROLA MOTOROLA MOTOROLA IBM IBMMOTOROLA IBMMOTOROLA MOTOROLA IBM IBM IBMSONYTOSHIBA IBM 6800 6801 ROMP 68030 68040 88110 POWER 2 POWER PC 603 POWER PC 620 POWER PC 7400 POWER 4 POWER PC 970 CELL B.E. Z196 IBM 4,100 1 M 35,000 45,000 10 M 273,000 25 M 1.2 M 40 M 1.3 M 23 M 1.5 M 120 M 6.9 M 150 M 38 M 500 M 174 M 1.4 B 52 M 2 B 241 M 4.6 B 1.4 B MOTOROLA 50 M 71.5 M MOTOROLA MOTOROLA 5.2 B 68060 POWER PC 7450 2.5 M 50 M 33 M 800 M MOTOROLA MOTOROLA MOTOROLA IBM IBMMOTOROLA IBMMOTOROLA IBMMOTOROLA IBM IBM IBM IBM IBM 68000 68020 88100 POWER 1 POWER PC 601 POWER PC 604 POWER PC 750 POWER 3 Z900 POWER 5 POWER 6 POWER 7 68,000 8 M 190,000 16 M 165,000 33 M 6.9 M 30 M 2.8 M 80 M 3.6 M 180 M 6.35 M 366 M 15 M 200 M 47 M 918 M 276 M 1.9 B 709 M 4.7 B 1.2 B 4.25 B DEC Digital Equipment Company LSI-11 T-11 MICROVAX 78032 DC520 RIGEL ALPHA 21064 ALPHA 21064A ALPHA 21164A 17,000 2.5 M 125,000 5 M 320,000 35 M 1.68 M 200 M 2.85 M 300 M 9.66 M 500 M F-11 J-11 CVAX 78034 NVAX ALPHA 21066 ALPHA 21164 ALPHA 21264 18 M 180,000 12.5 M 1.3 M 90,909,090 1.75 M 9.3 M 333,333,333 15.2 M 600 M HEWLETT HP PN7 HP PA-RISC SNAKE PA-7100 HP PA-7200 PA-8500 PACKARD 115,000 18 M 577,000 100 M 1.31 M 125 M 140 M 440 M HP PA-RISC STIRLING HP PN7 HP PA-8000 164,000 115,000 3.9 M 180 M MOSS MOSS SUN SUN SUN SUN SUN SUN SUN TEXAS INSTRUMENTS 6502 SPARC SPARC 7C601 SUPERSPARC ULTRASPARC II ULTRASPARC IV ULTRASPARC T2 SPARC T3 3,510 1 M 100,000 40 M 80,000 3.1 M 5.4 M 400 M 66 M 279 M 1.4 B 1 B 1.6 B SUN TEXAS INSTRUMENTS SUN SUN SUN SUN SUN ORACLE ORACLE TMS 9900 SPARC MB86901 MICROSPARC 1 ULTRASPARC ULTRASPARC III ULTRASPARC T1 SPARC T4 8,000 3,333,333 70,000 800,000 50 M 3.8 M 166,666,666 29 M 1.2 B 1.35 B 1.4 B 855 M 3 B RCA NEC NEC NEC NEC 1801 V60 V810 V830 RCA 2 M 375,000 16 M 240,000 21.5 M 1 M 100 M RCA NEC NEC NEC NEC 1802 V20 V70 V851 V853 5,000 6.4 M 63,000 5 M 385,000 20 M 690,000 33 M 3.5 M 33 M MIPS MIPS MIPS MIPS MIPS SGI MIPS MIPS R2000 R4000 R4200 R4100 R4300 R12000 KEY ROSS 115,000 8 M 2.3 M 100 M 1.3 M 476,000 1.35 M 6.9 M 400 M SGI MIPS MIPS ROSS MIPS SGI MIPS SGI MIPS INTEL MOSS ARM R3000 HYPERSPARC R8000 R10000 R14000 TEXAS INSTRUMENTS CYTRIX 120,000 12 M 1.2 M 200 M 6.8 M 6.8 M 250 M 7.15 M 600 M AMD SUN STANFORD ORACLE ZILOG IBM - MOTOROLA ARM ZILOG STANFORD ZILOG ARM CYRIX CYRIX ARM NEC OTHER CYTRIX Z80 MIPS Z280 610 486DX 5X86 810 DEC RCA 8,500 8 M 24,000 2 M 99,000 359,000 20 M 1.1 M 33 M 1.9 M 100 M 836,000 100 M STANFORD ZILOG ZILOG ARM CYRIX ARM CYRIX ZILOG HEWLETT PACKARD MIPS ZILOG ROSS Z8000 Z80000 ARM2 486SLC 710 6X86 EZ80 91,000 30,000 18 M 600,000 25 M 570,000 40 M 3.3 M 120 M 50 M SGI MIPS INTERSIL HARRIS WESTERN DESIGN CENTER AT&T AT&T HAL COMPUTER SYSTEMS QED FUJITSU FUJITSU FUJITSU TRANSISTOR COUNT OTHER 6100 6120 65C02 CRISP HOBBIT 92020 SPARC64 RM7000 SPARC64 V SPARC VII SPARC VII+ 4,000 4 M 20,000 10 M 11,500 2 M 172,000 640,000 2.7 M 118 M 300 M 191 M 1.35 B 600 M 2.88 B 3 B CLOCK SPEED SIGNETICS UC BERKELEY UC BERKELEY WESTERN DESIGN CENTER AT&T QED QED FUJITSU FUJITSU FUJITSU 8X300 RISC I RISC II 65C816 HOBBIT 92010 R4600 R5000 SPARC64 IV SPARC VI SPARC VIIIFX 44,000 1 M 41,000 3 M 22,000 1 M 413,000 20 M 2.2 M 125 M 3.7 M 250 M 810,000 540 M 2.4 B 760 M 2 B 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011.
Load more

Recommended publications
  • Engineering Specification for the KA43 Processor Module Revision 1.0 1–May–1989 COMPANY CONFIDENTIAL RESTRICTED DISTRIBUTION
    Engineering Specification for the KA43 Processor Module Revision 1.0 1–May–1989 COMPANY CONFIDENTIAL RESTRICTED DISTRIBUTION COPYRIGHT (c) 1989 by DIGITAL EQUIPMENT CORPORATION This information shall not be disclosed to non-Digital personnel or generally distributed within Digital. Distribution is restricted to persons authorized and designated by the responsible en- gineer or manager. This document shall not be left unattended, and when not in use shall be stored in a locked storage container. The information in this document is subject to change without notice and should not be construed as a commitment by Digital Equipment Corporation. Digital Equipment Corporation assumes no responsibility for any errors that may occur in this document. The information in this document does not describe any program or product currently available from Digital Equipment Corporation. Nor does Digital Equipment Corporation commit to imple- ment this specification in any program or product. Digital Equipment Corporation makes no commitment that this document accurately describes any product which it might ever make. Digital Equipment Corporation CONTENTS Preface . ........................................................... v Chapter 1 INTRODUCTION .............................................. 1 1.1 Scope of Document ................................................... 1 1.2 General Description .................................................. 1 1.3 Applicable Documents ................................................. 2 Chapter 2 KA43 ROM MEMORY ........................................
    [Show full text]
  • Sun Fire E2900 Server
    Sun FireTM E2900 Server Just the Facts February 2005 SunWin token 401325 Sun Confidential – Internal Use Only Just The Facts Sun Fire E2900 Server Copyrights ©2005 Sun Microsystems, Inc. All Rights Reserved. Sun, Sun Microsystems, the Sun logo, Sun Fire, Netra, Ultra, UltraComputing, Sun Enterprise, Sun Enterprise Ultra, Starfire, Solaris, Sun WebServer, OpenBoot, Solaris Web Start Wizards, Solstice, Solstice AdminSuite, Solaris Management Console, SEAM, SunScreen, Solstice DiskSuite, Solstice Backup, Sun StorEdge, Sun StorEdge LibMON, Solstice Site Manager, Solstice Domain Manager, Solaris Resource Manager, ShowMe, ShowMe How, SunVTS, Solstice Enterprise Agents, Solstice Enterprise Manager, Java, ShowMe TV, Solstice TMNscript, SunLink, Solstice SunNet Manager, Solstice Cooperative Consoles, Solstice TMNscript Toolkit, Solstice TMNscript Runtime, SunScreen EFS, PGX, PGX32, SunSpectrum, SunSpectrum Platinum, SunSpectrum Gold, SunSpectrum Silver, SunSpectrum Bronze, SunStart, SunVIP, SunSolve, and SunSolve EarlyNotifier are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. UNIX is a registered trademark in the United States and other countries, exclusively licensed through X/Open Company, Ltd. All other product or service names mentioned
    [Show full text]
  • The Design and Verification of the Alphastation 600 5-Series Workstation by John H
    The Design and Verification of the AlphaStation 600 5-series Workstation by John H. Zurawski, John E. Murray, and Paul J. Lemmon ABSTRACT The AlphaStation 600 5-series workstation is a high-performance, uniprocessor design based on the Alpha 21164 microprocessor and on the PCI bus. Six CMOS ASICs provide high-bandwidth, low-latency interconnects between the CPU, the main memory, and the I/O subsystem. The verification effort used directed, pseudorandom testing on a VERILOG software model. A hardware-based verification technique provided a test throughput that resulted in a significant improvement over software tests. This technique currently involves the use of graphics cards to emulate generic DMA devices. A PCI hardware demon is under development to further enhance the capability of the hardware-based verification. INTRODUCTION The high-performance AlphaStation 600 5-series workstation is based on the fastest Alpha microprocessor to date -- the Alpha 21164.[1] The I/O subsystem uses the 64-bit version of the Peripheral Component Interconnect (PCI) and the Extended Industry Standard Architecture (EISA) bus. The AlphaStation 600 supports three operating systems: Digital UNIX (formerly DEC OSF/1), OpenVMS, and Microsoft's Windows NT. This workstation series uses the DECchip 21171 chip set designed and built by Digital. These chips provide high-bandwidth, low-latency interconnects between the CPU, the main memory, and the PCI bus. This paper describes the architecture and features of the AlphaStation 600 5-series workstation and the DECchip 21171 chip set. The system overview is first presented, followed by a detailed discussion of the chip set. The paper then describes the cache and memory designs, detailing how the memory design evolved from the workstation's requirements.
    [Show full text]
  • Microsparc-II-Usersm
    Products Rights Notice: Copyright © 1991-2008 Sun Microsystems, Inc. 4150 Network Circle, Santa Clara, California 95054, U.S.A. All Rights Reserved You understand that these materials were not prepared for public release and you assume all risks in using these materials. These risks include, but are not limited to errors, inaccuracies, incompleteness and the possibility that these materials infringe or misappropriate the intellectual property right of others. You agree to assume all such risks. THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND OTHER CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS (INCLUDING ANY OF OWNER'S PARTNERS, VENDORS AND LICENSORS) BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Sun, Sun Microsystems, the Sun logo, Solaris, OpenSPARC T1, OpenSPARC T2 and UltraSPARC are trademarks or registered trademarks of Sun Microsystems, Inc. in the U.S. and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the U.S. and other countries. Products bearing SPARC trademarks are based upon architecture developed by Sun Microsystems, Inc.
    [Show full text]
  • The Alpha 21264 Microprocessor: Out-Of-Order Execution at 600 Mhz
    The Alpha 21264 Microprocessor: Out-of-Order Execution at 600 Mhz R. E. Kessler COMPAQ Computer Corporation Shrewsbury, MA REK August 1998 1 Some Highlights z Continued Alpha performance leadership y 600 Mhz operation in 0.35u CMOS6, 6 metal layers, 2.2V y 15 Million transistors, 3.1 cm2, 587 pin PGA y Specint95 of 30+ and Specfp95 of 50+ y Out-of-order and speculative execution y 4-way integer issue y 2-way floating-point issue y Sophisticated tournament branch prediction y High-bandwidth memory system (1+ GB/sec) REK August 1998 2 Alpha 21264: Block Diagram FETCH MAP QUEUE REG EXEC DCACHE Stage: 0 1 2 3 4 5 6 Int Branch Int Reg Exec Predictors Reg Issue File Queue Addr Sys Bus Map (80) Exec (20) L1 Bus 64-bit Data Reg Exec Inter- Cache Bus 80 in-flight instructions File Cache plus 32 loads and 32 stores Addr face 64KB 128-bit (80) Exec Unit Next-Line 2-Set Address Phys Addr 4 Instructions / cycle L1 Ins. 44-bit Cache FP ADD FP Reg 64KB FP Div/Sqrt Issue File Victim 2-Set Reg Queue (72) FP MUL Buffer Map (15) Miss Address REK August 1998 3 Alpha 21264: Block Diagram FETCH MAP QUEUE REG EXEC DCACHE Stage: 0 1 2 3 4 5 6 Int Branch Int Reg Exec Predictors Reg Issue File Queue Addr Sys Bus Map (80) Exec (20) L1 Bus 64-bit Data Reg Exec Inter- Cache Bus 80 in-flight instructions File Cache plus 32 loads and 32 stores Addr face 64KB 128-bit (80) Exec Unit Next-Line 2-Set Address Phys Addr 4 Instructions / cycle L1 Ins.
    [Show full text]
  • AMD-K5TM Processor
    AMD-K5TM Processor Data Sheet Publication # 18522 Rev: F Amendment/0 Issue Date: January 1997 This document contains information on a product under development at AMD. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. © 1997 Advanced Micro Devices, Inc. All Rights Reserved. Advanced Micro Devices, Inc. ("AMD") reserves the right to make changes in its products without notice in order to improve design or performance charac- teristics. The information in this publication is believed to be accurate at the time of publication, but AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication or the information contained herein, and reserves the right to make changes at any time, without notice. AMD disclaims responsibility for any consequences resulting from the use of the information included in this publication. This publication neither states nor implies any representations or warranties of any kind, including but not limited to, any implied warranty of merchantability or fitness for a particular purpose. AMD products are not authorized for use as critical components in life support devices or systems without AMD’s written approval. AMD assumes no liability whatsoever for claims associated with the sale or use (including the use of engineering samples) of AMD products except as provided in AMD’s Terms and Conditions of Sale for such product. Trademarks: AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Am486 is a registered trademark, and AMD-K5 is a trademark of Advanced Micro Devices, Inc.
    [Show full text]
  • Family 12H AMD Sempron Processor Product Data Sheet
    Family 12h AMD Sempron™ Processor Product Data Sheet Publication # 50321 Revision: 3.00 Issue Date: December 2011 Advanced Micro Devices © 2011 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. (“AMD”) products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. The information contained herein may be of a preliminary or advance nature and is subject to change without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD’s product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD Arrow logo, AMD PowerNow!, 3DNow!, AMD Virtualization, AMD-V, Sempron, and combinations thereof are trademarks of Advanced Micro Devices, Inc.
    [Show full text]
  • Computer Organization EECC 550 • Introduction: Modern Computer Design Levels, Components, Technology Trends, Register Transfer Week 1 Notation (RTN)
    Computer Organization EECC 550 • Introduction: Modern Computer Design Levels, Components, Technology Trends, Register Transfer Week 1 Notation (RTN). [Chapters 1, 2] • Instruction Set Architecture (ISA) Characteristics and Classifications: CISC Vs. RISC. [Chapter 2] Week 2 • MIPS: An Example RISC ISA. Syntax, Instruction Formats, Addressing Modes, Encoding & Examples. [Chapter 2] • Central Processor Unit (CPU) & Computer System Performance Measures. [Chapter 4] Week 3 • CPU Organization: Datapath & Control Unit Design. [Chapter 5] Week 4 – MIPS Single Cycle Datapath & Control Unit Design. – MIPS Multicycle Datapath and Finite State Machine Control Unit Design. Week 5 • Microprogrammed Control Unit Design. [Chapter 5] – Microprogramming Project Week 6 • Midterm Review and Midterm Exam Week 7 • CPU Pipelining. [Chapter 6] • The Memory Hierarchy: Cache Design & Performance. [Chapter 7] Week 8 • The Memory Hierarchy: Main & Virtual Memory. [Chapter 7] Week 9 • Input/Output Organization & System Performance Evaluation. [Chapter 8] Week 10 • Computer Arithmetic & ALU Design. [Chapter 3] If time permits. Week 11 • Final Exam. EECC550 - Shaaban #1 Lec # 1 Winter 2005 11-29-2005 Computing System History/Trends + Instruction Set Architecture (ISA) Fundamentals • Computing Element Choices: – Computing Element Programmability – Spatial vs. Temporal Computing – Main Processor Types/Applications • General Purpose Processor Generations • The Von Neumann Computer Model • CPU Organization (Design) • Recent Trends in Computer Design/performance • Hierarchy
    [Show full text]
  • 486 COMMON SOCKET IMPLEMENTATION by J
    486 COMMON SOCKET IMPLEMENTATION by J. Lombard, M. Lerman 1. Overview For additional information, please contact This document provides detailed information SGS-Thomson Microelectronics. Information in this document is subject to change without regarding the differences in pinouts between notification. The following documents were used SGS-THOMSON Microelectronics(ST) and Intel as references: Intel486 Microprocessor Family, 486 PGA devices and specifies electrical connections that allow a single motherboard AM486 Microprocessor Family System Design Consideration. Any functions not disclosed in the design to support all of the listed devices. This referenced documents are NOT covered by the implementation is intended to be a guideline to scope of this specification. eliminate conflicts due to pinout differences only. 2. CPU Features This common socket specification is intended to support the following devices: Each of the CPUs supported in this common socket specification is 486 bus compatible yet SGS-THOMSON ST486 DX2 CYRIX Cx486 DX2 has a unique set of features that impacts the device pinout. Table 2-1 lists the differences in SGS-THOMSON ST486 DX2V the CPU feature sets. SGS-THOMSON ST486 DX4V SGS-THOMSON ST5x86 CYRIX Cx5x86 INTEL i486 DX2 SL & WB Enhanced INTEL i486 DX4 AMD AM486 DX2 (Future SL & WB Enhanced) AMD AM486 DX4 (Future SL & WB Enhanced) Table 2-1. CPU Enhanced Features CPU VOLTAGE WRITE- SMM & POWER CORE CLOCK BACK MANAGEMENT CONTROL JTAG ST486DX2 5 V yes yes no no Cx486DX2 ST486DX2V 3.45V, 5V I/O yes yes no no Future AM486DX2 ST486DX4V 3.45V, 5V I/O yes yes 2x, 3x no Future AM486DX2 ST5x86 3.45V, 5V I/O yes yes 0.5x, 1x, 2x, 3x yes Cx5x86 Intel i486DX/DX2 SL & WB 5 V yes yes no yes Enh.
    [Show full text]
  • MICROPROCESSOR REPORT the INSIDERS’ GUIDE to MICROPROCESSOR HARDWARE Slot Vs
    VOLUME 12, NUMBER 1 JANUARY 26, 1998 MICROPROCESSOR REPORT THE INSIDERS’ GUIDE TO MICROPROCESSOR HARDWARE Slot vs. Socket Battle Heats Up Intel Prepares for Transition as Competitors Boost Socket 7 A A look Look by Michael Slater ship as many parts as they hoped, especially at the highest backBack clock speeds where profits are much greater. The past year has brought a great deal The shift to 0.25-micron technology will be central to of change to the x86 microprocessor 1998’s CPU developments. Intel began shipping 0.25-micron A market, with Intel, AMD, and Cyrix processors in 3Q97; AMD followed late in 1997, IDT plans to LookA look replacing virtually their entire product join in by mid-98, and Cyrix expects to catch up in 3Q98. Ahead ahead lines with new devices. But despite high The more advanced process technology will cut power con- hopes, AMD and Cyrix struggled in vain for profits. The sumption, allowing sixth-generation CPUs to be used in financial contrast is stark: in 1997, Intel earned a record notebook systems. The smaller die sizes will enable higher $6.9 billion in net profit, while AMD lost $21 million for the production volumes and make it possible to integrate an L2 year and Cyrix lost $6 million in the six months before it was cache on the CPU chip. acquired by National. New entrant IDT added another com- The processors from Intel’s challengers have lagged in petitor to the mix but hasn’t shipped enough products to floating-point and MMX performance, which the vendors become a significant force.
    [Show full text]
  • Élan™SC520 Microcontroller Data Sheet PRELIMINARY
    PRELIMINARY Élan™SC520 Microcontroller Integrated 32-Bit Microcontroller with PC/AT-Compatible Peripherals, PCI Host Bridge, and Synchronous DRAM Controller DISTINCTIVE CHARACTERISTICS ■ ■ Industry-standard Am5x86® CPU with floating ROM/Flash controller for 8-, 16-, and 32-bit devices point unit (FPU) and 16-Kbyte write-back cache ■ Enhanced PC/AT-compatible peripherals – 100-MHz and 133-MHz operating frequencies provide improved performance – Low-voltage operation (core VCC = 2.5 V) – Enhanced programmable interrupt controller – 5-V tolerant I/O (3.3-V output levels) (PIC) prioritizes 22 interrupt levels (up to 15 external sources) with flexible routing ■ E86™ family of x86 embedded processors – Enhanced DMA controller includes double buffer – Part of a software-compatible family of chaining, extended address and transfer counts, microprocessors and microcontrollers well and flexible channel routing supported by a wide variety of development tools ■ – Two 16550-compatible UARTs operate at baud Integrated PCI host bridge controller leverages rates up to 1.15 Mbit/s with optional DMA interface standard peripherals and software ■ Standard PC/AT-compatible peripherals – 33 MHz, 32-bit PCI bus Revision 2.2-compliant – Programmable interval timer (PIT) – High-throughput 132-Mbyte/s peak transfer – Real-time clock (RTC) with battery backup – Supports up to five external PCI masters capability and 114 bytes of RAM – Integrated write-posting and read-buffering for ■ Additional integrated peripherals high-throughput applications – Three general-purpose
    [Show full text]
  • Digital Technical Journal, Number 7, August 1988: CVAX
    Digital Technical Tournal Digital Equipment Corporation Managing Editor Richard W Beam Edltor Jane C. Dlak Pcoductloa St& Production Editor - Helen 1 Partenon Designer - Charlotte Bell Typographers -Jonathan M. Bohy Macgaret Burdine lllusultor - Deborah Kc~lcy Advisoiy Board Samuel H. Fuller, Chairman Robert M. Glorioso John W. McCredle Mahendra R. Patel F. Grant Saviers William D. Srrcckr Victor A. Vyssutsky The Digital Technical Journal is published by Digital Equipment Corporatloa, 77 Reed Road, Hudson, Magsachu~etts0 1749. Changes of address should be sent to Digital Equipment Corporation. attention: List Maintenance. I0 Forbes Road, Northboro, MA 01532 Please indude the address label wlth changes marked. Comments on the content of any paper arc welcomed. Write to the editor at Mall Stop HL02.3/K11 at the published~bpaddress. Comments can ahbe sent on the BNET to RDVAX: :BIAKEor on the ARPANET to B~%RDVAX.DE~DE~. Copyright @ 1988 Digital Equipment Corporation. Copying without fee is permitted provided that such copies are made for use in educational lnstltutions by faculty members and are nor distributed for commercial advantage. Abstncting with credit of Digital Equipment Corporation's authorship is permltted. Requests for other copies for a Pee may br made to Digiul Press of Digital Equipment Corporation. A11 rights reserved. The information in this journal is subject to change without notice and should not bc construed as a com- mltment by Digital Equipment Corporation. Digital Equipment Corpmtion assumes no responslbllity for any errors that may appcss in this document ISSN 0898.901X Documentatlcm Number EY-6742H-DP The following are wademarks of Digital Gquipmcnt Corporation: ALL.IN-I.
    [Show full text]