DOCSLIB.ORG

Communication Theory II

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text

Load more

Microprocessor (COM 9323) Lecture 2: Review on Intel Family Ahmed Elnakib, PhD Assistant Professor, Mansoura University, Egypt Feb 17th, 2016 1 Text Book/References Textbook: 1. The Intel Microprocessors, Architecture, Programming and Interfacing, 8th edition, Barry B. Brey, Prentice Hall, 2009 2. Assembly Language for x86 processors, 6th edition, K. R. Irvine, Prentice Hall, 2011 References: 1. Computer Architecture: A Quantitative Approach, 5th edition, J. Hennessy, D. Patterson, Elsevier, 2012. 2. The 80x86 Family, Design, Programming and Interfacing, 3rd edition, Prentice Hall, 2002 3. The 80x86 IBM PC and Compatible Computers, Assembly Language, Design, and Interfacing, 4th edition, M.A. Mazidi and J.G. Mazidi, Prentice Hall, 2003 2 Lecture Objectives 1. Provide an overview of the various 80X86 and Pentium family members 2. Define the contents of the memory system in the personal computer 3. Convert between binary, decimal, and hexadecimal numbers 4. Differentiate and represent numeric and alphabetic information as integers, floating-point, BCD, and ASCII data 5. Understand basic computer terminology (bit, byte, data, real memory system, protected mode memory system, Windows, DOS, I/O) 3 Brief History of the Computers o1946 The first generation of Computer ENIAC (Electrical and Numerical Integrator and Calculator) was started to be used based on the vacuum tube technology, University of Pennsylvania o1970s entire CPU was put in a single chip. (1971 the first microprocessor of Intel 4004 (4-bit data bus and 2300 transistors and 45 instructions) 4 Brief History of the Computers (cont’d) oLate 1970s Intel 8080/85 appeared with 8-bit data bus and 16-bit address bus and used from traffic light controllers to homemade computers (8085: 246 instruction set, RISC*) o1981 First PC was introduced by IBM with Intel 8088 (CISC**: over 20,000 instructions) microprocessor oMotorola emerged with 6800. Apple Macintosh computers started to use 68000 series of microprocessors. 5 *RISC: Reduced Instruction Set Computers **CISC: Complex instruction set computers 8085 Intel Microprocessor o 16 bit address bus to select an address between 64kbyte memory o 8 bit data bus to fetch 8 bits to its internal registers 6 Simple Microprocessor Architecture 7 Early 8-bit Microprocessors o Only Intel and Motorola (IBM also produces Motorola-style microprocessors) continue successfully to create newer and improved versions of the microprocessor o Motorola has sold its microprocessor division, named now Freescale Semiconductors. o Inc. Zilog still manufactures microprocessors, but remains in the background, concentrating on microcontrollers and embedded controllers (Z-80, a machine language compatible with 8085) instead of general-purpose microprocessors. 8 Intel Microprocessors Family till 2001 9 10 11 Intel Microprocessor core (P) versions 12 First Linear/physical Generation Prominent consumer CPU brands Notable (new) features introduced address space 1978 Intel 8086, Intel 8088 and clones First x86 microprocessors 1st Intel 80186, Intel 80188 and 16-bit / 20-bit Hardware for fast address calculations, clones, NEC V20/V30 fast multiplication and division 1982 16-bit ((14+16)- MMU, for protected mode and a 2nd Intel 80286 and clones bit segmented) / larger address space 24-bit 32-bit instruction set, MMU with paging, 3rd (IA-32) 1985 Intel 80386 and clones, AMD Am386 PGA132 socket L1 cache and pipelining introduced into 3rd/4th 1992 Cyrix Cx486SLC, Cyrix Cx486DLC the 386 platform, PGA132 socket RISC-like pipelining, 4th (FPU) 1989 Intel 80486 and clones, AMD Am486 integrated x87 FPU (80-bit), on- 32-bit ((14+32)- chipcache, PGA168 socket Am5x86, Cyrix 5x86, Pentium bit segmented) / Partial Pentium's specification brought 4th/5th 1997 OverDrive 32-bit into the 486 platform Superscalar 64-bit databus, faster 5th 1993 Pentium, Pentium MMX, Rise mP6 FPU, MMX (2× 32-bit),Socket 7 AMD K5, Cyrix 6x86, Cyrix MII, Nx586 (1994), IDT/Centaur-C6, Cyrix III- Discrete microarchitecture (µ-op 5th/6th 1996 Samuel (2000), VIA C3-Samuel2 / VIA translation) 13 C3-Ezra (2001) Brands of processors implementing the x86 instruction set (x86 History) First Linear/physical Gneration Prominent consumer CPU brands Notable (new) features introduced address space µ-op translation, conditional move instructions, Out-of-orderregister 1995 Pentium Pro renaming, speculative 32-bit ((14+32)-bit execution, PAE (Pentium Pro), in- segmented) / 36-bit package L2 cache (Pentium Pro), Socket 8 physical (PAE) 6th SSE (2× 64-bit), on-die L2 Cache 1997 Pentium II/III, Celeron, Xeon (Mendocino, Coppermine),SLOT 1 or Socket 370 On-die L2-Cache (K6-III, Cyrix III 32-bit ((14+32)-bit 1997 AMD K6/2/III, Cyrix III-Joshua (2000) Joshua), 3DNow!, no PAE support, Super segmented) / 32-bit Socket 7 (K6-2) Pentium M, VIA C7 (2005), Intel Optimized for low thermal design power, 6th/7th 2003 Core(2006) four pumped FSB 32-bit ((14+32)-bit Superscalar FPU, wide design (up to three 1999 Athlon, Athlon XP segmented) / 36-bit x86 instr./clock),Slot A or Socket A 7th physical (PAE) Deeply pipelined, high 2000 Pentium 4 frequency, SSE2, hyper-threading,Socket 478 14 Brands of processors implementing the x86 instruction set (x86 History) First Prominent consumer Linear/physical Generation Notable (new) features introduced CPU brands address space Pentium 4 Prescott F/506/516/5 7th/8th 64-bit / 36-bit EM64T technology introduced, very deeply pipelined, very 2005 x1/6xx,Celeron (x86-64) physical high frequency, SSE3, LGA 775 socket, CMP D 3x1/3x6/355, Penti um D AMD64 processor (excluding 32-bit Sempron), on-die Athlon 64, Athlon 64 64-bit / 40-bit memory controller, HyperTransport, CMP, virtulisation 2003 X2 (2005), Sempron( physical (AMD-V) on some models, Socket 2004), Opteron 754/939/940 or AM2 socket Intel 64 processor, low power, multi-core, lower clock 64-bit / 36-bit frequency, SSE4 (Penryn), wide dynamic execution, µ-op 2006 Intel Core 2 8th (x86-64) physical fusion, macro-µ-op fusion, virtulisation (Intel VT) on some models AMD Phenom, AMD 64-bit / 48-bit Monolithic quad-core, SSE4a, HyperTransport 2007 Phenom II (2008) physical 3, AM2+ orAM3 socket Out-of-order, superscalar, 64-bit (integer CPU), hardware- 64-bit / 36-bit 2008 VIA Nano based encryption; very low power; adaptive power physical management 15 Brands of processors implementing the x86 instruction set (x86 History) First Prominent consumer CPU Linear/physical Generation Notable (new) features introduced brands address space Intel Core i3, Core QuickPath, native memory controller, on-die L3 cache, i5 and Core modular, Intel HD Graphics introduced onto CPU chip i7(Nehalem/Westmere) (Clarkdale), LGA 1366 (Nehalem) or LGA 1156 socket 2008 64-bit / 36-bit In-order but highly pipelined, very-low-power, some Intel Atom physical models (Diamondville) with 32-bit (integer CPU), on- 8th/9th die GPU (Penwell, Cedarview) AMD APU C, E and Z Series (Bobcat) Out-of-order, 64-bit (integer CPU), on-die GPU; low 2011 AMD APU A and E Series power (Bobcat), Socket FM1 (Desktop) (Llano) 64-bit / 48-bit AMD APU A Series physical SSE5/AVX (4× 64-bit), highly modular design, (Bulldozer, Trinity and later) integrated on-die GPU, Socket FM2 or Socket FM2+ 2011 Intel Core i3, Core 64-bit / 40-bit i5 and Core i7 (Sandy Internal Ring connection, GPGPU, LGA 1155 socket 9th(GPGPU) physical Bridge/Ivy Bridge) Intel Core i3, Core 64-bit / 44-bit AVX2, FMA3, TSX, BMI1, and BMI2 instructions, LGA 2013 i5 and Core physical 1150socket i7(Haswell/Broadwell) 16 Brands of processors implementing the x86 instruction set (x86 History) First Prominent consumer Linear/physical Generation Notable (new) features introduced CPU brands address space Intel Core i3, Core Out-of-order, 64-bit (integer CPU), AVX3, integrated 10th i5 and Core 2015/2016 on-die southbridge, integrated on-die x86 MIC (SoC,MIC) i7(Skylake/Kaby array GPU Lake/Cannonlake) Transmeta 32-bit ((14+32)- VLIW design with x86 emulator, on-die memory 2000 Crusoe, Transmeta bit segmented) / controller Efficeon 32-bit EPIC architecture with an on-package engine (pre- 32-bit ((14+32)- Intel Itanium IA-32 2006 chips, later using IA-32 Execution Layer) that Others 2001 bit segmented) / compatibility mode provides backward support for most IA-32 N/A applications (MIC pilot) Many Integrated Cores (62), In- 2012 Intel Xeon Phi (Larrabee) order P54C with x86-64, very wide vector unit, LRBni instructions (8× 64-bit) 17 Report 02: Due to Feb. 25th , 8.30 AM o Individually o Use the internet to make a report on I3, I5, and I7 technology o Report will be delivered by hand before the lecture 18 Computer Architecture 19 The Memory Map in Personal Computers o Real (conventional Memory): 1. TPA: Transient Program Area 2. System Memory o XMS: Extended memory Area 20 TPA: Transient Program Area o Holds the DOS (disk operating system) Available for operating system and other programs application programs that control the computer system oThe TPA is a DOS concept and not really applicable in Windows oThe TPA also stores any currently active or inactive DOS application programs oThe length of the TPA is 640K bytes 21 TPA: Interrupt vector o Interrupt vector: access features of DOS, basic I/O system (BIOS), and applications oThe system BIOS is a collection of programs stored in either a read-only (ROM) or flash memory that operates many of the I/O devices connected to your computer system. oThe system BIOS and DOS communications areas contain transient data used by programs to access I/O devices and the internal features of the computer system. These are stored in the TPA so they can be changed as the DOS operates. 22 TPA: IO.SYS o IO.SYS: a program that loads into the TPA from the disk whenever an MSDOS system is started. oThe IO.SYS contains programs that allow DOS to use the keyboard, video display, printer, and other I/O devices often found in the computer system.
Recommended publications
  • Super 7™ Motherboard

    Super 7™ Motherboard

    SY-5EH5/5EHM V1.0 Super 7Ô Motherboard ************************************************ Pentium® Class CPU supported ETEQ82C663 PCI/AGP Motherboard AT Form Factor ************************************************ User's Guide & Technical Reference NSTL “Year 2000 Test” Certification Letter September 23, 1998 Testing Date: September 23, 1998 Certification Date: September 23, 1998 Certification Number: NCY2000-980923-004 To Whom It May Concern: We are please to inform you that the “SY-5EHM/5EH5” system has passed NSTL Year 2000 certification test program. The Year 2000 test program tests a personal computer for its ability to support the year 2000. The “SY-5EHM/5EH5: system is eligible to carry the NSTL :Year 2000 Certification” seal. The Year 2000 certification test has been done under the following system configuration: Company Name : SOYO COMPUTER INC. System Model Name : SY-5EHM/5EH5 Hardware Revision : N/A CPU Model : Intel Pentium 200/66Mhz On Board Memory/L2 Cache : PC100 SDRAM DIMM 32MBx1 /1MB System BIOS : Award Modular BIOS V4.51PG, An Energy Star Ally Copyright © 1984—98, EH-1A6,07/15/1998-VP3-586B- 8669-2A5LES2AC-00 Best regards, SPORTON INTERNATIONAL INC. Declaration of Conformity According to 47 CFR, Part 2 and 15 of the FCC Rules Declaration No.: D872907 July.10 1998 The following designated product EQUIPMENT: Main Board MODEL NO.: SY-5EH Which is the Class B digital device complies with 47 CFR Parts 2 and 15 of the FCC rules. Operation is subject to the following two conditions : (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
  • Intel 8080 Datasheet

    Intel 8080 Datasheet

    infel.. 8080A/8080A-1/8080A-2 8-BIT N-CHANNEL MICROPROCESSOR • TTL Drive Capability • Decimal, Binary, and Double Precision • 2,..,s (-1:1.3,..,s, -2:1.5 ,..,s) Instruction Arithmetic Cycle • Ability to Provide Priority Vectored • Powerful Problem Solving Instruction Interrupts Set • 512 Directly Addressed 110 Ports 6 General Purpose Registers and an Available In EXPRESS • Accumulator • - Standard Temperature Range 16-Blt Program Counter for Directly Available In 4Q-Lead Cerdlp and Plastic • Addressing up to 64K Bytes of Memory • Packages 16-Blt Stack Pointer and Stack (See Packaging Spec. Order #231369) • Manipulation Instructions for Rapid Switching of the Program Environment • The Intel 8080A is a complete 8-bit parallel central processing unit (CPU). It is fabricated on a single LSI chip using Intel's n-channel silicon gate MOS process. This offers the user a high performance solution to control and processing applications. The 8080A contains 6 8-bit general purpose working registers and an accumulator. The 6 general purpose registers may be addressed individually or in pairs providing both single and double precision operators. Arithmetic and logical instructions set or reset 4 testable flags. A fifth flag provides decimal arithmetic opera­ tion. The 8080A has an external stack feature wherein any portion of memory may be used as a last in/first out stack to store/retrieve the contents of the accumulator, flags, program counter, and all of the 6 general purpose registers. The 16-bit stack pointer controls the addressing of this external stack. This stack gives the 8080A the ability to easily handle multiple level priority interrupts by rapidly storing and restoring processor status.
  • 45-Year CPU Evolution: One Law and Two Equations

    45-Year CPU Evolution: One Law and Two Equations

    45-year CPU evolution: one law and two equations Daniel Etiemble LRI-CNRS University Paris Sud Orsay, France [email protected] Abstract— Moore’s law and two equations allow to explain the a) IC is the instruction count. main trends of CPU evolution since MOS technologies have been b) CPI is the clock cycles per instruction and IPC = 1/CPI is the used to implement microprocessors. Instruction count per clock cycle. c) Tc is the clock cycle time and F=1/Tc is the clock frequency. Keywords—Moore’s law, execution time, CM0S power dissipation. The Power dissipation of CMOS circuits is the second I. INTRODUCTION equation (2). CMOS power dissipation is decomposed into static and dynamic powers. For dynamic power, Vdd is the power A new era started when MOS technologies were used to supply, F is the clock frequency, ΣCi is the sum of gate and build microprocessors. After pMOS (Intel 4004 in 1971) and interconnection capacitances and α is the average percentage of nMOS (Intel 8080 in 1974), CMOS became quickly the leading switching capacitances: α is the activity factor of the overall technology, used by Intel since 1985 with 80386 CPU. circuit MOS technologies obey an empirical law, stated in 1965 and 2 Pd = Pdstatic + α x ΣCi x Vdd x F (2) known as Moore’s law: the number of transistors integrated on a chip doubles every N months. Fig. 1 presents the evolution for II. CONSEQUENCES OF MOORE LAW DRAM memories, processors (MPU) and three types of read- only memories [1]. The growth rate decreases with years, from A.
  • Am186em and Am188em User's Manual

    Am186em and Am188em User's Manual

    Am186EM and Am188EM Microcontrollers User’s Manual © 1997 Advanced Micro Devices, Inc. All rights reserved. Advanced Micro Devices, Inc. ("AMD") reserves the right to make changes in its products without notice in order to improve design or performance characteristics. The information in this publication is believed to be accurate at the time of publication, but AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication or the information contained herein, and reserves the right to make changes at any time, without notice. AMD disclaims responsibility for any consequences resulting from the use of the information included in this publication. This publication neither states nor implies any representations or warranties of any kind, including but not limited to, any implied warranty of merchantability or fitness for a particular purpose. AMD products are not authorized for use as critical components in life support devices or systems without AMD’s written approval. AMD assumes no liability whatsoever for claims associated with the sale or use (including the use of engineering samples) of AMD products except as provided in AMD’s Terms and Conditions of Sale for such products. Trademarks AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Am386 and Am486 are registered trademarks, and Am186, Am188, E86, AMD Facts-On-Demand, and K86 are trademarks of Advanced Micro Devices, Inc. FusionE86 is a service mark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
  • Class-Action Lawsuit

    Class-Action Lawsuit

    Case 3:20-cv-00863-SI Document 1 Filed 05/29/20 Page 1 of 279 Steve D. Larson, OSB No. 863540 Email: [email protected] Jennifer S. Wagner, OSB No. 024470 Email: [email protected] STOLL STOLL BERNE LOKTING & SHLACHTER P.C. 209 SW Oak Street, Suite 500 Portland, Oregon 97204 Telephone: (503) 227-1600 Attorneys for Plaintiffs [Additional Counsel Listed on Signature Page.] UNITED STATES DISTRICT COURT DISTRICT OF OREGON PORTLAND DIVISION BLUE PEAK HOSTING, LLC, PAMELA Case No. GREEN, TITI RICAFORT, MARGARITE SIMPSON, and MICHAEL NELSON, on behalf of CLASS ACTION ALLEGATION themselves and all others similarly situated, COMPLAINT Plaintiffs, DEMAND FOR JURY TRIAL v. INTEL CORPORATION, a Delaware corporation, Defendant. CLASS ACTION ALLEGATION COMPLAINT Case 3:20-cv-00863-SI Document 1 Filed 05/29/20 Page 2 of 279 Plaintiffs Blue Peak Hosting, LLC, Pamela Green, Titi Ricafort, Margarite Sampson, and Michael Nelson, individually and on behalf of the members of the Class defined below, allege the following against Defendant Intel Corporation (“Intel” or “the Company”), based upon personal knowledge with respect to themselves and on information and belief derived from, among other things, the investigation of counsel and review of public documents as to all other matters. INTRODUCTION 1. Despite Intel’s intentional concealment of specific design choices that it long knew rendered its central processing units (“CPUs” or “processors”) unsecure, it was only in January 2018 that it was first revealed to the public that Intel’s CPUs have significant security vulnerabilities that gave unauthorized program instructions access to protected data. 2. A CPU is the “brain” in every computer and mobile device and processes all of the essential applications, including the handling of confidential information such as passwords and encryption keys.
  • AMD-K5TM Processor

    AMD-K5TM Processor

    AMD-K5TM Processor Data Sheet Publication # 18522 Rev: F Amendment/0 Issue Date: January 1997 This document contains information on a product under development at AMD. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. © 1997 Advanced Micro Devices, Inc. All Rights Reserved. Advanced Micro Devices, Inc. ("AMD") reserves the right to make changes in its products without notice in order to improve design or performance charac- teristics. The information in this publication is believed to be accurate at the time of publication, but AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication or the information contained herein, and reserves the right to make changes at any time, without notice. AMD disclaims responsibility for any consequences resulting from the use of the information included in this publication. This publication neither states nor implies any representations or warranties of any kind, including but not limited to, any implied warranty of merchantability or fitness for a particular purpose. AMD products are not authorized for use as critical components in life support devices or systems without AMD’s written approval. AMD assumes no liability whatsoever for claims associated with the sale or use (including the use of engineering samples) of AMD products except as provided in AMD’s Terms and Conditions of Sale for such product. Trademarks: AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Am486 is a registered trademark, and AMD-K5 is a trademark of Advanced Micro Devices, Inc.
  • Pentium 82430VX / P54C PCI Mainboard User’S Guide & Technical Reference 5V A0/A2/A5 Ii ¨ ª

    Pentium 82430VX / P54C PCI Mainboard User’S Guide & Technical Reference 5V A0/A2/A5 Ii ¨ ª

    Pentium 82430VX / P54C PCI Mainboard User’s Guide & Technical Reference 5V A0/A2/A5 ii ® ™ About This Guide This UserÕs Guide is for assisting system manufacturers and end users in setting up and installing the mainboard. Information in this guide has been carefully checked for reliability; however, no guarantee is given as to the correctness of the contents. The information in this document is subject to change without notice. Copyright Notice Copyright 1997, Soyo Computer Inc. All rights reserved. This manual is copyrighted by Soyo Computer Inc. You may not reproduce, transmit, transcribe, store in a retrieval system, or translate into any language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, any part of this publication without express written permission of Soyo Computer Inc. Trademarks Soyo is a registered trademark of Soyo Computer Inc. All trademarks are the property of their owners. Disclaimer Soyo Computer Inc. makes no representations or warranties regarding the contents of this manual. We reserve the right to revise the manual or make changes in the specifications of the product described within it at any time without notice and without obligation to notify any person of such revision or change. The information contained in this manual is provided for general use by our customers. Our customers should be aware that the personal computer field is the subject of many patents. Our customers should ensure that they take appropriate action so that their use of our products does not infringe upon any patents. It is the policy of Soyo Computer Inc.
  • CISC Processor - Intel X86

    CISC Processor - Intel X86

    Architecture of Computers and Parallel Systems Part 4: Intel x86 History Ing. Petr Olivka [email protected] Department of Computer Science FEI VSB-TUO Architecture of Computers and Parallel Systems Part 4: Intel x86 History Ing. Petr Olivka [email protected] Department of Computer Science FEI VSB-TUO Architecture of Computers and Parallel Systems Part 4: Intel x86 History Ing. Petr Olivka [email protected] Department of Computer Science FEI VSB-TUO CISC Processor - Intel x86 This chapter will introduce the CISC processors evolution. We will try to illustrate the history on one typical processor, because the comparison of multiple processors simultaneously would not be clear for readers. But the selection of one typical processor is complicated due to a variety of products and manufactures in the past 30 years. We have decided to describe in this presentation one of the best- known and longest mass-produced processors in existence. We definitely do not want to say that it is the best technology or that these are processors with the highest performance! The Intel x86 processors are the selected product line. Intel 8080 (Year-Technology-Transistors-Frequency-Data bus-Address Bus) Y: 1974 T: NMOS 6μm Tr: 6000 F: 2MHz D: 8b A: 16b This 8 bit processor is not directly the first member of x86 series, but it can not be skipped. It is one of the first commercially successful microprocessors. This microprocessor became the basis for a number of the first single-board computers and its instruction set inspired other manufacturers to develop 8-bit processors.
  • 486 COMMON SOCKET IMPLEMENTATION by J

    486 COMMON SOCKET IMPLEMENTATION by J

    486 COMMON SOCKET IMPLEMENTATION by J. Lombard, M. Lerman 1. Overview For additional information, please contact This document provides detailed information SGS-Thomson Microelectronics. Information in this document is subject to change without regarding the differences in pinouts between notification. The following documents were used SGS-THOMSON Microelectronics(ST) and Intel as references: Intel486 Microprocessor Family, 486 PGA devices and specifies electrical connections that allow a single motherboard AM486 Microprocessor Family System Design Consideration. Any functions not disclosed in the design to support all of the listed devices. This referenced documents are NOT covered by the implementation is intended to be a guideline to scope of this specification. eliminate conflicts due to pinout differences only. 2. CPU Features This common socket specification is intended to support the following devices: Each of the CPUs supported in this common socket specification is 486 bus compatible yet SGS-THOMSON ST486 DX2 CYRIX Cx486 DX2 has a unique set of features that impacts the device pinout. Table 2-1 lists the differences in SGS-THOMSON ST486 DX2V the CPU feature sets. SGS-THOMSON ST486 DX4V SGS-THOMSON ST5x86 CYRIX Cx5x86 INTEL i486 DX2 SL & WB Enhanced INTEL i486 DX4 AMD AM486 DX2 (Future SL & WB Enhanced) AMD AM486 DX4 (Future SL & WB Enhanced) Table 2-1. CPU Enhanced Features CPU VOLTAGE WRITE- SMM & POWER CORE CLOCK BACK MANAGEMENT CONTROL JTAG ST486DX2 5 V yes yes no no Cx486DX2 ST486DX2V 3.45V, 5V I/O yes yes no no Future AM486DX2 ST486DX4V 3.45V, 5V I/O yes yes 2x, 3x no Future AM486DX2 ST5x86 3.45V, 5V I/O yes yes 0.5x, 1x, 2x, 3x yes Cx5x86 Intel i486DX/DX2 SL & WB 5 V yes yes no yes Enh.
  • ATC-1425B User Manual

    ATC-1425B User Manual

    Table of Contents JUMPER LOCATION DIAGRAM.............................................A CONNECTOR LOCATION DIAGRAM....................................B ...................................................................................................... CHAPTER 1 INTRODUCTION........................................1 1-1 SYSTEM FEATURES...................................................................1 1-2 CHECK LIST OF THE PACKING...............................................2 CHAPTER 2 INSTALLATION.........................................3 2-1 CPU INSTALLATION..................................................................3 2-2 SIM MODULES INSTALLATION..............................................4 2-3 SRAM INSTALLATION...............................................................5 2-4 OTHER JUMPERS SETTING......................................................6 CHAPTER 3 BIOS SETUP..............................................7 APPENDIX A .................................................................14 CHAPTER 1 INTRODUCTION 1-1 SYSTEM FEATURES : Supports all of 5V and 3.3V 486 CPUs, includes AmDX4-100/120, Am5x86-P75, and Cyrix 5x86. : Flexible architecture to support 128/256/512KB Direct mapped cache scheme. : Supports 4 stage power saving: On/Doze/Standby/Suspend. : Supports L1/L2 Write back/Write through cache feature. : Supports 72-pin dual type SIM modules. : Memory configurations from 1MB up to 256MB by using 256KB/ 1MB/4MB/8MB/16MB/32MB/64MB SIM module. : Supports SMI/SMM/PMU/APM power controllers. : Dual IDE connectors
  • MICROPROCESSOR REPORT the INSIDERS’ GUIDE to MICROPROCESSOR HARDWARE Slot Vs

    MICROPROCESSOR REPORT the INSIDERS’ GUIDE to MICROPROCESSOR HARDWARE Slot Vs

    VOLUME 12, NUMBER 1 JANUARY 26, 1998 MICROPROCESSOR REPORT THE INSIDERS’ GUIDE TO MICROPROCESSOR HARDWARE Slot vs. Socket Battle Heats Up Intel Prepares for Transition as Competitors Boost Socket 7 A A look Look by Michael Slater ship as many parts as they hoped, especially at the highest backBack clock speeds where profits are much greater. The past year has brought a great deal The shift to 0.25-micron technology will be central to of change to the x86 microprocessor 1998’s CPU developments. Intel began shipping 0.25-micron A market, with Intel, AMD, and Cyrix processors in 3Q97; AMD followed late in 1997, IDT plans to LookA look replacing virtually their entire product join in by mid-98, and Cyrix expects to catch up in 3Q98. Ahead ahead lines with new devices. But despite high The more advanced process technology will cut power con- hopes, AMD and Cyrix struggled in vain for profits. The sumption, allowing sixth-generation CPUs to be used in financial contrast is stark: in 1997, Intel earned a record notebook systems. The smaller die sizes will enable higher $6.9 billion in net profit, while AMD lost $21 million for the production volumes and make it possible to integrate an L2 year and Cyrix lost $6 million in the six months before it was cache on the CPU chip. acquired by National. New entrant IDT added another com- The processors from Intel’s challengers have lagged in petitor to the mix but hasn’t shipped enough products to floating-point and MMX performance, which the vendors become a significant force.
  • Computing :: Operatingsystems :: DOS Beyond 640K 2Nd

    Computing :: Operatingsystems :: DOS Beyond 640K 2Nd

    DOS® Beyond 640K 2nd Edition DOS® Beyond 640K 2nd Edition James S. Forney Windcrest®/McGraw-Hill SECOND EDITION FIRST PRINTING © 1992 by James S. Forney. First Edition © 1989 by James S. Forney. Published by Windcrest Books, an imprint of TAB Books. TAB Books is a division of McGraw-Hill, Inc. The name "Windcrest" is a registered trademark of TAB Books. Printed in the United States of America. All rights reserved. The publisher takes no responsibility for the use of any of the materials or methods described in this book, nor for the products thereof. Library of Congress Cataloging-in-Publication Data Forney, James. DOS beyond 640K / by James S. Forney. - 2nd ed. p. cm. Rev. ed. of: MS-DOS beyond 640K. Includes index. ISBN 0-8306-9717-9 ISBN 0-8306-3744-3 (pbk.) 1. Operating systems (Computers) 2. MS-DOS (Computer file) 3. PC -DOS (Computer file) 4. Random access memory. I. Forney, James. MS-DOS beyond 640K. II. Title. QA76.76.063F644 1991 0058.4'3--dc20 91-24629 CIP TAB Books offers software for sale. For information and a catalog, please contact TAB Software Department, Blue Ridge Summit, PA 17294-0850. Acquisitions Editor: Stephen Moore Production: Katherine G. Brown Book Design: Jaclyn J. Boone Cover: Sandra Blair Design, Harrisburg, PA WTl To Sheila Contents Preface Xlll Acknowledgments xv Introduction xvii Chapter 1. The unexpanded system 1 Physical limits of the system 2 The physical machine 5 Life beyond 640K 7 The operating system 10 Evolution: a two-way street 12 What else is in there? 13 Out of hiding 13 Chapter 2.