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Slides Ch04 2 MARIE After Mi 43. Implement a half-adder with only NAND gates • How do we implement the XOR? First solution: Use truth table: 1 Second solution: Use DeMorgan to prove that the circuit below implements the XOR gate: 2 Image source: Wikipedia →XOR gate 3 4 5 6 4.12 Extending Our Instruction Set • So far, all of the MARIE instructions that we have discussed use a direct addressing mode. • This means that the address of the operand is explicitly stated in the instruction. • It is often useful to employ a indirect addressing, where the address of the address of the operand is given in the instruction. – If you have ever used pointers in a C/C++ program, you are already familiar with indirect addressing! 7 • We have 4 indirect addressing mode instructions in the MARIE ISA. • The first two are LOADI X and STOREI X • X specifies the address of the operand to be loaded or stored. • In RTL : MAR X MBR M[MAR] MAR MBR ? MBR M[MAR] AC MBR STOREI X LOADI X 8 • In RTL : MAR X MAR X MBR M[MAR] MBR M[MAR] MAR MBR MAR MBR MBR M[MAR] MBR AC AC MBR M[MAR] MBR LOADI X STOREI X 9 • The ADDI X instruction is a combination of LOADI X and ADD X: • In RTL: MAR X MBR M[MAR] MAR MBR MBR M[MAR] AC AC + MBR 10 • The JUMPI X instruction is similar to JUMP • In RTL: MAR X MBR M[MAR] PC MBR 11 What is indirect addressing used for? • Do you remember the Interrupt Vector Table? • When the interrupt occurs, the hardware places in the IR the code of a JUMPI, with the appropriate address X! 12 Another example of indirect addressing Do you remember what 00 means for SKIPCOND? 100 | LOAD Addr 10E | SKIPCOND 000 101 | STORE Next 10F | JUMP Loop 102 | LOAD Num 110 | HALT 103 | SUBT One 111 |Addr HEX 117 104 | STORE Ctr 112 |Next HEX 0 105 |Loop LOAD Sum 113 |Num DEC 5 106 | ADDI Next 114 |Sum DEC 0 107 | STORE Sum 115 |Ctr HEX 0 108 | LOAD Next 116 |One DEC 1 109 | ADD One 117 | DEC 10 10A | STORE Next 118 | DEC 15 10B | LOAD Ctr 119 | DEC 2 Array of 5 10C | SUBT One 11A | DEC 25 integers 10D | STORE Ctr 11B | DEC 30 13 Write the C program that would be compiled into this MARIE assembly code 100 | LOAD Addr 10E | SKIPCOND 000 101 | STORE Next 10F | JUMP Loop 102 | LOAD Num 110 | HALT 103 | SUBT One 111 |Addr HEX 117 104 | STORE Ctr 112 |Next HEX 0 105 |Loop LOAD Sum 113 |Num DEC 5 106 | ADDI Next 114 |Sum DEC 0 107 | STORE Sum 115 |Ctr HEX 0 108 | LOAD Next 116 |One DEC 1 109 | ADD One 117 | DEC 10 10A | STORE Next 118 | DEC 15 10B | LOAD Ctr 119 | DEC 2 Array of 5 10C | SUBT One 11A | DEC 25 integers 10D | STORE Ctr 11B | DEC 30 14 QUIZ: What do we need to change in this program to add up 7 integers? 100 | LOAD Addr 10E | SKIPCOND 000 101 | STORE Next 10F | JUMP Loop 102 | LOAD Num 110 | HALT 103 | SUBT One 111 |Addr HEX 117 104 | STORE Ctr 112 |Next HEX 0 105 |Loop LOAD Sum 113 |Num DEC 5 106 | ADDI Next 114 |Sum DEC 0 107 | STORE Sum 115 |Ctr HEX 0 108 | LOAD Next 116 |One DEC 1 109 | ADD One 117 | DEC 10 10A | STORE Next 118 | DEC 15 10B | LOAD Ctr 119 | DEC 2 10C | SUBT One 11A | DEC 25 10D | STORE Ctr 11B | DEC 30 15 • Another helpful programming tool is the use of subroutines. • The jump-and-store instruction, JnS X, gives us subroutine functionality. • In RTL: MBR PC MAR X M[MAR] MBR Explain this in MBR X your own words! AC 1 Make a memory AC AC + MBR diagram! 16 PC AC 4.12 Extending Our Instruction Set • Another helpful programming tool is the use of subroutines. • The jump-and-store instruction, JnS X, gives us subroutine functionality. • In RTL: MBR PC MAR X M[MAR] MBR MBR X Does JnS permit AC 1 AC AC + MBR recursive calls? PC AC 17 Example 4.5: subroutine that doubles Load X Subr, Hex 0 Store Temp Load Temp JnS Subr Add Temp Store X JumpI Load Y Subr Store Temp END JnS Subr Store Y Halt X, Dec 20 Y, Dec 42 Assembler directive Temp, Dec 0 QUIZ: Based on this model, write a subroutine that subtracts two numbers Load X Subr, Hex 0 Store Temp Load Temp JnS Subr Add Temp Store X JumpI Load Y Subr Store Temp END JnS Subr Store Y Halt X, Dec 20 Y, Dec 42 Assembler directive Temp, Dec 0 4.12 Extending Our Instruction Set • Our last instruction is CLEAR. • It resets the contents of AC to all zeroes. • In RTL: AC 0 20 To do for next time: 21 QUIZ Explain in RTL and in your own words the difference between: • STORE X and STOREI X • ADD X and ADDI X 22 QUIZ Where is the return address kept when a subroutine is called in a MARIE program? 23 4.12 Extending Our Instruction Set • Our last instruction is CLEAR. • It resets the contents of AC to all zeroes. • In RTL: AC 0 Trick question: What addressing mode is this? 24 The new instructions 25 Table 4.7 on p.252 See handout! 26 27 Implementing loops in assembly 28 QUIZ: Write a subroutine that outputs ‘P’ if the number in AC is >0 and ‘NP’ otherwise Load X Subr, Hex 0 Store Temp Load Temp JnS Subr Add Temp Store X JumpI Subr Load Y END Store Temp JnS Subr Store Y Halt X, Dec 20 Y, Dec 42 Temp, Dec 0 29 To do for next time: 30 QUIZ: Explain in your own words and in RTL the difference between ADD X and ADDI X 31 QUIZ: Explain in your own words and in RTL the difference between ADD X and ADDI X MAR X MAR X MBR M[MAR] MBR M[MAR] MAR MBR MBR M[MAR] AC AC + MBR AC AC + MBR 32 4.13 Decoding • A computer’s control unit keeps things synchronized, making sure that bits flow to the correct components as the components are needed. • There are two ways in which a control unit can be implemented: – Hardwired → a hardware controller creates all signals with combinational logic – Microprogrammed → a small program is placed into read-only memory (ROM) and used to create those signals 33 Decoding • The microoperations given by each RTL instruction define the operation of MARIE’s control unit. • Each microoperation consists of a distinctive signal pattern that is interpreted by the control unit and results in the execution of an instruction. Example: RTL for ADDI X instruction: MAR X MBR M[MAR] MAR MBR MBR M[MAR] AC AC + MBR 34 MARIE Datapath Note the datapath addresses of the components connected to the data bus! How many datapath address lines are needed? 35 Decoding If you answered three, you’re on the right track! We need two sets of three signals: • P2, P1, P0, control reading from memory or a register • P5, P4, P3, controls writing to memory or a register. 36 MBR R/W MBR is enabled for reading when P0 and P1 are high, and it is enabled for writing when P3 and P4 are high 37 Decoding Inspection of MARIE’s instructions’ RTL reveals that the ALU has only three operations: add, subtract, and clear. We also define a fourth “do nothing” state: 38 Decoding Inspection of MARIE’s instructions’ RTL reveals that the ALU has only three operations: add, subtract, and clear. We also define a fourth “do nothing” state: Which of MARIE’s instructions do not use the ALU? 39 Decoding Inspection of MARIE’s instructions’ RTL reveals that the ALU has only three operations: add, subtract, and clear. We also define a fourth “do nothing” state: The entire set of MARIE’s control signals consists of: – Register controls: P0 through P5. – ALU controls: A0 and A1 – Timing: T0 through T7 and counter reset Cr Explained 40 later Decoding the Add instruction • The RTL for MARIE’s Add instruction is: MAR X MBR M[MAR] AC AC + MBR • After an Add instruction is fetched, the address, X, is in the rightmost 12 bits of the IR, which has a datapath address of 7. • X is copied to the MAR, which has a datapath address of 1. • Thus we need to raise signals P2, P1, and P0 to read from the IR, and signal P3 to write to the MAR. 41 Complete signal sequence for Add instruction P3 P2 P1 P0 T0: MAR X P4 P3 T1: MBR M[MAR] A0 P5 P1 P0 T2: AC AC + MBR Cr T3: [Reset counter] Why do we need to reset? 42 What is the maximum nr. of microops. needed for a MARIE instruction? Table 4.7 on p.252 43 The counter will therefore count cyclically through 7 states S0 … S6, but for some (most) instructions, we need to cut the cycle short. 44 Complete signal sequence for Add instruction P3 P2 P1 P0 T0: MAR X P4 P3 T1: MBR M[MAR] A0 P5 P1 P0 T2: AC AC + MBR Cr T3: [Reset counter] How exactly are the timing signals used? 45 Timing diagram for ADD P3 P2 P1 P0 T0: MAR X P4 P3 T1: MBR M[MAR] A0 P5 P1 P0 T2: AC AC + MBR Cr T3: [Reset counter] The instruction bits in IR are constant until the end of the current Fetch- Execute cycle, but the Pi signals need to change from one microop.
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