CONSULTING IN ELECTRONIC DESIGN

IC CAD Market Trends 2015 Developments of Multi-CAD Models

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TABLE OF CONTENTS TABLE OF FIGURES

Page Title Page Title 1 ...... Market Trends 2014 1 ...... Figure C-1: Top 5 Share of CAD/CAM 2014 Introduction 3 ...... Figure C-2: ASIC Layout Market 2 ...... Ic Place & Route Share 2014 3 ...... ASIC Layout Figure C-3: ASIC Layout Custom Layout Forecast 2015

4 ...... Physical Verification 4 ...... Figure C-4: Custom Layout Design Rule Checking (DRC) Market Share 2014 5 ...... Extraction Figure C-5: Custom Layout 6 ...... IC Power Forecast 2015 7 ...... Signal-Integrity (SI) 5 ...... Figure C-6: DRC Market Share 2014 8 ...... IC SPICE Figure C-7: DRC Forecast 2015 9 ...... Physical Libraries and Tools Figure C-8: Extractor 10 ...... IC CAM Market Share 2014 6 ...... Figure C-9: Extractor Forecast 2015 Figure C-10: Timing, EMI, and Metal Migration Market Share 2014 7 ...... Figure C-11: IC Power Analysis Market Share 2014 Figure C-12: IC Power Analysis Forecast 2015 8 ...... Figure C-13: Signal-Integrity Market Share 2014 Figure C-14: Signal-Integrity Forecast 2015 9 ...... Figure C-15: IC SPICE Market Share 2014 Figure C-16: IC SPICE Market Forecast 2015 10 ...... Figure C-17: Physical Libraries Market Share 2014 Figure C-18: Physical Libraries Forecast 2015 11 ...... Figure C-19: IC CAM Market Share 2014 Figure C-20: IC CAM Forecast 2015 12 ...... Appendix A: IC CAD/CAM Market Forecast 2015

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PHONE +1 (408) 985-2929 www.garysmithEDA.com i MARY OLSSON [email protected] CONSULTING IN ELECTRONIC DESIGN

IC CAD Market Trends 2015 Developments of Multi-CAD Models

Market Trends 2014 IC CAD market vendor revenue reached $2,295.3 in 2014. Worldwide CAD revenue captured 29% share of total EDA in 2014. The IC CAD market covered in this report is segmented into four main categories: IC Place and Route, Physical Verification, Physical Libraries and Tools, and IC CAM (see Appendix A). There are over 12 sub-applications within these four categories that contain market share updates. The top five vendors of CAD/CAM tools captured 90 percent share of the market in 2014. ARM and Ansys now represent 10 percent of total CAD. Figure C-1 illustrates the top five vendors. Figure C-1: Top 5 Share of CAD/CAM 2014

Mentor Cadence 20% 26%

ARM 5%

Synopsys Ansys 44% 5%

(Source: Gary Smith EDA, November 2015)

INTRODUCTION

Traditional CAD models focused on long design cycles from multiple and costly design rework. As noted by SolidWorks, ideally, one would choose the modeling approach that worked best for the type of product one needed to design – top-down, bottom-up, or master model design techniques.

Since 2012, as a result of mergers, collaborations and acquisitions, EDA vendors, semiconductor and systems companies teamed to develop multiple platforms and system design flows. MicroMagic, Keysight EEsof, Altium, Atoptech, Intel/Docea, and Terrazon, Dassault and Siemens proved that multiple organizations can work cooperatively to create multiple data models to improve cost, ease of integration, and security.

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MicroMagic, Inc. is a privately held company. MicroMagic builds, uses and sells its high-end CAD tools to create multiple models across its MAX-3D System. That includes:

• Chip-to-Board viewing and editing - in 3D • Load Chip, Package and Board together, in one tool • Isolate and extract nets; study signal integrity across all components • View, edit and analyze chips, package and board in one environment • Micro Magic’s 3D Design Suite together with MAX-3D TSV Placer and MAX-3D Path Finder

Companies like Dassault’s SOLIDWORKS with the 3DEXPERIENCE solutions created single and multi-modeling methodologies that leverage various approaches or techniques in a single modeling environment. The SolidWorks Industrial Designer and SolidWorks Conceptual Designer offer the ability to mix parametric features, concept sketches, 2D mechanism, solids, and direct edit features in a single product structure. The Single Modeling Environment provides the flexibility to use the best modeling method to solve design challenges.

Through mergers and acquisitions, PTC is a Multi-CAD design company. As it noted in its recent publication on “Best Practices” in CAD, most manufacturers are leveraging a variety of 3D CAD packages in their product development activities to support different design processes such as mechanical design versus electrical design.

Given the complexity of today’s advanced product designs, cycle times and supply chains, designers need visibility into the full product process flow and development.

IC PLACE & ROUTE

Place and Route tools are used to transfer the design to a silicon mask- generating format. MicroMagic believes its solution is the most powerful layout system for any size IC, able to load, view, and edit designs of more than one trillion devices in “real time”. Customer benchmarks prove MAX to be 50X faster in displaying physical layout data. MicroMagic has announced that their layout tools offer interoperability with other IC design tools for Open Access and IPL programs.

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ASIC LAYOUT As shown in Figure C-2 Synopsys remains the number one vendor in this market maintaining 64 percent share of total market revenue of $738.1 in 2014. Synopsys, along with Cadence, Mentor and Atoptech, provide companies with almost complete solutions in design, verification, integrity and project management. ASIC layout users employ these design solutions in system applications like automotive to reduce system cost, improve reliability and improve time to market cycles. The five- year CAGR for ASIC layout is estimated to reach $1,024 by 2019, or 6.8% percent (see Figure C-3).

Figure C-2: ASIC Layout Market Share 2014

Cadence Design Systems 29%

Mentor Graphics 4%

Synopsys Atoptech 64% 3%

(Source: Gary Smith EDA, November 2015)

1,200.0 1,024.0 1,000.0 918.0 850.0 867.0 738.1 771.8 800.0 715.6 588.5 582.4 600.0

(In Millions of Dollars) 400.0

200.0

0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

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CUSTOM LAYOUT Custom Layout design tools that work at the transistor level to size transistors, are used in processor, memory, analog design and device design where performance or device scaling is of prime importance. Vendor revenues totaled $241.3 in 2014. Eight vendors participated in the survey in 2014. Cadence remains the number one vendor with over 68 percent market share (see Figure C-4). Tanner, recently acquired by Mentor Graphics, MicroMagic and Silvaco are expected to grow share in the coming forecast years. MicroMagic now offers its MAX 3D design suite for advanced 3D design stacking and Interposer development. The long-range forecast in Figure C-5 shows the market CAGR at 10.7 percent. Figure C-4: Custom Layout Market Share 2014 Sagantec Synopsys 8% JEDAT 8% 5% Mentor Graphics 4% Tanner 3% Silvaco 3% Cadence Design MicroMagic Systems 1% 68%

(Source: Gary Smith EDA, November 2015)

450.0 402.0 371.0 400.0 350.2 360.2 350.0 303.0 300.0 238.8 241.3 250.0 201.4 213.3 200.0 150.0 (In Millions of Dollars) 100.0 50.0 0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

PHYSICAL VERIFICATION

DESIGN RULE CHECKING (DRC) DRC is used to perform final verification on an IC design before making masks. DRC grew to $261.2 in 2014, led by Mentor Graphics at $163.9. Mentor Graphics now owns 63 percent share of the DRC market. Figure C-6 illustrates the market share distribution for the major vendors of DRC tools. Figure C-7 captures the 2015 forecast of DRC through 2019.

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Figure C-6: DRC Market Share 2014

Cadence Design Systems Synopsys 20% 15% Silvaco 1% Tanner 1% MicroMagic Mentor Graphics 0% 63%

(Source: Gary Smith EDA, November 2015)

350.0 298.0 298.0 289.8 296.0 300.0 261.2 268.5 248.9 226.6 250.0 212.7 200.0

150.0 (In Millions of Dollars) 100.0

50.0

0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015) EXTRACTION Extraction tools are used to determine the parasitic effects caused by the physical implementation of the design. Synopsys maintained its lead in this area with 50 percent market share as seen in Figure C-8. Success in next generation process technologies depends on parasitic extraction tools that can provide accurate transistor level extraction of parasitic effects. Extraction tools are solutions that speed up design cycle times for multiple design applications. Figure C-9 shows a steady forecast through 2019. Figure C-8: Extractor Market Share 2014

Cadence Design Mentor Graphics Systems 13% 32% ANSYS 3% OptEM Engineering 2% Silvaco Synopsys 0% 50%

(Source: Gary Smith EDA, November 2015)

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180.0 155.0 149.3 160.0 142.2 135.5 140.0 126.5 129.0 119.6 119.0 120.0 106.9 100.0 80.0

(In Millions of Dollars) 60.0 40.0 20.0 0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

PHYSICAL ANALYSIS TOOLS

Physical analysis tools are used to analyze the physical effects of the final design layout. This sub-application segment consists of IC Power analysis, Signal Integrity, Timing analysis, Electro Magnetic Interference (EMI), and Metal Migration. The Timing, EMI, and Metal Migration sub application numbers are small, with few companies represented (see Figure C-10). However, the sub applications have been included in the long-range forecast shown in Appendix A.

Figure C-10: Timing, EMI, and Metal Migration Market Share 2014

Ansys (Apache) Quantic EMC Timing Metal Mig. 10% 20% Applied Simulation Technology-EMI 3%

OptEM-EMI Ansys EMI 5% 62%

(Source: Gary Smith EDA, November 2015)

IC POWER In the power market, Ansys grew its revenue in IC Power tools in 2014 to $70.7 and controls over 69 percent of this market (see Figure C-11). Cadence ranks number two in this market after its acquisition of Sigrity (see Figure C-12). Increasing device complexity, power dissipation, and chip scaling makes thermal/power analysis critical to chip, package, board and system integrity and reliability. Other companies that will drive growth and new products of power analysis and optimizations include: ARM, Envis, Keysight EEsof, Library Technologies, Mentor Graphics, OEA International, and Silvaco.

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Figure C-11: IC Power Analysis Market Share 2014

Cadence Design Systems 31%

Ansys 69%

(Source: Gary Smith EDA, November 2015)

180.0 158.0 151.0 160.0 143.0 130.9 140.0 119.0 120.0 101.8 95.7 100.0 80.3 70.8 80.0 60.0 (In Millions of Dollars) 40.0 20.0 0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

SIGNAL-INTEGRITY (SI) The Signal Integrity market maintained fairly strong growth in revenue again in 2014. Worldwide revenue reached $78.8. Synopsys holds 48% and Cadence has 37% share of the 2014 market (see Figure C-13). Signal Integrity (SI) addresses two concerns in electrical design – the timing and the quality of the signal. Does the signal reach its destination when it is supposed to and is it in good condition when it gets there? The goal of signal integrity analysis is to ensure reliable high-speed data transmission.

The role of SI analysis is expected to play a critical role in the deep-submicron high-speed chip, package, PCB and system design flow to guarantee reliable system operation. Over 16 competitors compete for revenue in this segment. The estimated long-term forecast shown in Figure C-14 could exceed 6%.

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Figure C-13: Signal Integrity Market Share 2014

Cadence Design Systems Quantic EMC 37% 7% Ansys 6%

Synopsys OptEM 48% Engineering 2%

(Source: Gary Smith EDA, November 2015)

120.0 110.0 96.1 91.5 100.0 87.2 83.0 78.8 80.0 72.6 63.7 62.2 60.0

40.0 (In Millions of Dollars)

20.0

0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

IC SPICE IC simulation program with integrated circuit emphasis (SPICE) simulation — SPICE or SPICE-like simulation typically using a derivative of the Berkeley SPICE transistor-level simulator — transistor- level simulation. As noted by Texas Instruments, SPICE models have been a mainstay of applications departments at semiconductor companies for decades. SPICE models provided by EDA companies were developed for simulation purposes. As markets and technology changed SPICE tools were distributed in print, floppy Disk, through CDs and the World Wide Web. Microsoft Windows introduced a new element to P-SPICE—graphical interface freeing designers from ASCII files.

Simulator Program for Integrated Circuits (SPICE) is a diverse market, split into two main camps with multiple competitors. Historically, Berkeley SPICE was the first of the University Simulators used by IC designers. It split into two camps in the 1980s: P-SPICE used primarily by PCB designers and H-SPICE used by IC designers. Cadence owns P-SPICE and Synopsys owns H-SPICE. Synopsys led the IC SPICE market in 2014 with over 68% percent share. Their revenue reached $65.8 in 2014. There are now over 20 competitors in this market, which is expected to reach $188 by 2019 as shown in Figure C-16. A fairly new competitor to this area is ProPlus Design Solutions.

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ProPlus introduced its NanoSpice™ product in 2015. NanoSpice is a next-generation high-capacity, high-performance parallel SPICE simulator for giga-scale circuit simulation. As stated by Dr. Zhihong Liu, executive chairman of ProPlus, this new simulation technology is essential for deep nanometer technology designs where process variations significantly impact circuit yield and performance. The need for giga-scale simulations is being driven by complex designs and because of the large number of simulations required to design for variation effects. Traditional SPICE simulators lack capacity requirements even with parallelization. FastSPICE simulators that deliver capacity at the cost of accuracy are losing steam as an increasing number of designs require post-layout verification that weakens circuit hierarchy. NanoSPICE is suited for applications such as memory, analog/mixed-signal, I/O, custom digital and standard cell design. NanoSpice handles challenging designs, including the characterization of large embedded SRAM blocks, post-layout analysis of analog circuits, sign-off simulation of full-chip power integrated circuit (IC) or wireless transceiver circuits, and accurate clock tree and critical path analysis.

Figure C-15: IC SPICE Market Share 2014

Applied Simulation Silvaco Technology 28% 2% ProPlus Design Solutions 2% Tanner 0% Synopsys 68%

(Source: Gary Smith EDA, November 2015)

200.0 188.0 173.3 180.0 165.0 160.0 136.5 140.0 130.0 120.9 120.0 101.8 96.5 100.0 91.5 80.0

(In Millions of Dollars) 60.0 40.0 20.0 0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

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PHYSICAL LIBRARIES and TOOLS This segment of IC CAD/CAM consists of Physical Libraries, Target Compilers and Library Development tools. As shown in Figure C-17, ARM leads the overall market category with 74% share, followed by Keysight Technologies with 12% share. The long-range forecast is expected to be strong with CAGR of 5 percent through 2019, as shown in Figure C-18. Target Compiler and Library Development segments are small markets as many semiconductor vendors have captured Library Development tools in-house. Figure C-17: Physical Libraries & Tools Market Share 2014

Synopsys-PL 9% Silvaco 2% ARM-PL Ansys 74% 2% MicroMagic 1%

Keysight Eesof 12%

(Source: Gary Smith EDA, November 2015)

250.0

200.0

150.0

100.0

(In Millions of Dollars) 50.0

0.0 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015) IC CAM This segment consists of T-CAD, RET (Resolution Enhancement Technology), and DFY (Design for Yield) products used during manufacturing to optimize the technology necessary to reduce stress and thermal effects with the materials, structure, and processes. This segment is basically controlled by Synopsys in T-CAD followed by Mentor Graphics in RET and DFY tools. Total IC CAM is shown in Figure C-19. A company not listed but active in the T-CAD space is Silvaco. Silvaco formed a collaborative relationship with Sematech in 2013 to develop new design, modeling and simulation methods for next generation technologies. The Synopsys T-CAD tools are widely used for development of CMOS, power, memory, sensor, and analog/RF device designs. This segment is expected to grow over 8.4% in the forecast period as shown in Figure C-20.

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Figure C-19: IC CAM Market Share 2014

Synopsys 49% ProPlus Design 2%

Silvaco Mentor 3% 41% Cadence 5%

(Source: Gary Smith EDA, November 2015)

$800 $705 $700 $604 $621 $600 $554 $508 $471 $500 $418 $381 $396 $400

$300 (In Millions of Dollars)

$200

$100 2011 2012 2013 2014 2015 2016 2017 2018 2019

(Source: Gary Smith EDA, November 2015)

See Appendix A for more 2015 forecast detail.

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Appendix A: IC CAD/CAM Market Forecast 2015

App Category Sub App (Sub) Sub-App 2013 2014 2015 2016 2017 2018 2019 CAGR (%) 2013-2019

IC CAD 2,133.6 7,799.1 8,559.9 9,524.5 10,111.7 10,461.2 11,452.9 8.0%

IC P&R 954.3 979.5 1,074.8 1,200.0 1,227.2 1,289.0 1,426.0 7.8%

ASIC Layout 715.6 738.1 771.8 850.0 867.0 918.0 1,024.0 6.8%

Custom Layout 238.8 241.3 303.0 350.2 360.2 371.0 402.0 10.7%

Physical Verification 651.6 693.8 759.4 819.4 872.7 894.1 945.0 6.4%

DRC 248.9 261.2 268.5 298.0 298.0 289.8 296.0 2.5%

Extraction 119.0 126.5 129.0 135.5 142.2 149.3 155.0 4.2%

Analysis 192.2 209.7 231.9 249.4 267.5 281.7 306.0 7.9%

Timing 2.7 2.9 4.3 4.5 4.7 5.0 6.0 15.7%

Power 95.7 101.8 119.0 130.9 143.0 151.0 158.0 9.2%

Signal-Integrity 72.6 78.8 83.0 87.2 91.5 96.1 110.0 6.9%

EMI 16.0 20.4 20.0 21.0 22.1 23.2 25.0 4.1%

Metal Migration 5.3 5.7 5.6 5.9 6.2 6.5 7.0 4.2%

IC SPICE 91.5 96.5 130.0 136.5 165.0 173.3 188.0 14.3%

Physical Libraries & Tools 109.2 151.4 157.5 166.0 175.1 184.6 193.5 5.0%

Physical Libraries 90.3 129.3 134.0 141.4 149.1 157.3 165.0 5.0%

Target Compiler 3.8 4.1 4.5 4.7 5.0 5.2 5.5 6.2%

Library Development Tools 15.1 18.0 19.0 20.0 20.9 22.0 23.0 5.0%

IC CAM 418.45 470.59 507.84 553.89 604.27 621.00 705.00 8.4%

T-CAD 109.3 117.1 118.3 125.3 132.9 140.0 154.0 5.6%

RET 224.3 259.6 285.6 314.1 345.6 351.0 396.0 8.8%

DFY 84.8 93.9 104.0 114.4 125.8 130.0 155.0 10.5%

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