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Machine Learning for Design Rule Checking, Multilayer CMP Hotspot Detection, and Ppamodeling, with Transfer Learning and Synthet

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Machine Learning for Design Rule Checking, Multilayer CMP Hotspot Detection, and Ppamodeling, with Transfer Learning and Synthet ABSTRACT FRANCISCO, LUIS. Machine Learning for Design Rule Checking, Multilayer CMP Hotspot Detection, and PPA Modeling, with Transfer Learning and Synthetic Training. (Under the direction of Dr. Paul Franzon and Dr. W. Rhett Davis.) Machine learning is a rapidly advancing research topic that has been applied to multiple disciplines with high success. The problems we can find in electronic design automation (EDA) can also benefit from machine learning (ML) based solutions. With the constant technology nodes scale down, the complexity of EDA problems has drastically increased. This dissertation uses ML techniques to approach three of the most relevant problems in integrated circuits design: Design rule checking (DRC), hotspots detection and power, performance, and area (PPA) estimation. What these problems have in common is that they are complex and with time-consuming steps. Their outcome is needed early in the design process for critical decisions to be made ultimately affecting the final design. The number of design rules is drastically increasing as technology nodes scale down. This increase makes the design rules decks creation and checking process complex and time- consuming. This work presents a design rule checking approach using deep learning. The core of the checker consists of a framework to generate convolutional neural networks and a parametrized synthetic data generator for training. The models incorporate incremental transfer learning to reduce the training time when adding new rules. The results show that we can capture most of the checks from a design kit rule manual with less than 1% error and up to 7.5x faster than traditional design rule checkers. Chemical mechanical polishing (CMP) is a critical process in integrated circuit (IC) manufacturing; it ensures the planarity of the layers which comprise the IC. Areas where this planarity is not met result in significant degradation impacting lithographic pattern fidelity and performance variability. It is desirable to predict the location of those hotspots regions. This research uses a deep learning (DL) and multilayer convolutional neural network (CNN) algorithm to model CMP hotspots for full-chip multilayer layouts. The proposed model achieves a hotspot prediction accuracy of up to 98% with 10 metal layers and up to 10x faster than existing CMP tools. The power, performance, and area (PPA) of a System-on-Chip (SoC) is known only after a months-long process. This process includes iterations over the architectural design, register transfer level implementation, RTL synthesis, and place and route. Knowing the PPA estimates for a system early in the design stages can help solve tradeoffs that will affect the final design. This work presents a machine learning approach using gradient boost models and neural networks to fast and accurately predict the PPA. The models use transfer learning to predict the PPA for new design configurations and corner conditions based on previous models. The proposed models achieved PPA predictions up to 99% accurate and using as low as 10 samples can achieve accuracies better than 96%. © Copyright 2021 by Luis Francisco All Rights Reserved Machine Learning for Design Rule Checking, Multilayer CMP Hotspot Detection, and PPA Modeling, with Transfer Learning and Synthetic Training by Luis Francisco A dissertation submitted to the Graduate Faculty of North Carolina State University in partial fulfillment of the requirements for the Degree of Doctor of Philosophy Electrical Engineering Raleigh, North Carolina 2021 APPROVED BY: Dr. Aydin Aysu Dr. Franc Brglez Dr. Paul Franzon Dr. W. Rhett Davis Co-chair of Advisory Committee Co-chair of Advisory Committee DEDICATION To my family and friends who have supported me in all my journeys. ii BIOGRAPHY Luis Francisco was born in a small town in the Dominican Republic. He received a Bachelor of Science degree in Electronics Engineering from Pontificia Universidad Católica Madre y Maestra in 2007. From 2009 to 2011, he attended the University of Puerto Rico at Mayaguez and obtained a Master of Science degree in Electrical Engineering. In 2016 he went back to the University of Puerto Rico at Mayaguez for his Ph.D. and transferred to North Carolina State University in 2017. At North Carolina State University, Luis joined Dr. Paul Franzon and Dr. Rhett Davis’s research group working in Machine Learning applied to Electronic Design Automation problems in emerging technologies. While working on these research topics, he became a student member of the Center for Advanced Electronics through Machine Learning (CAEML). During his time at North Carolina State University, Luis did several full-time and part- time internships at GlobalFoundries and Synopsys Inc. iii ACKNOWLEDGEMENTS Transferring to North Carolina State University to join the Ph.D. program in Electrical Engineering is a decision I will not regret. I will always be in debt to my advisor Dr. Paul Franzon for giving me the opportunity to join the program and support me. Without that first opportunity, I will not be writing a dissertation acknowledgments. I also want to express my gratitude to my co-advisor, Dr. Rhett Davis, for welcoming me into his research group and supporting me since the first day we met and for all those well- needed chats, including those not work-related. I am also grateful for the guidance, support, and patience from my advisors and the opportunity to work in exciting and challenging research. I also want to thank Dr. Aydin Aysu and Dr. Franc Brglez for taking the time to be part of my graduate committee. I also want to thank them for the feedback provided. I am always grateful to have had the opportunity to meet my mentor while interning at GlobalFoundries, Robert Pack. He provided me with great professional advice; to the point, he became a friend to me. My gratitude also goes to my boys from MRC: Billy, Teddy, Yuejiang, Bowen, Yi, Priyank, Isaac, and Josh. It is a shame that during this last year, we were not able to go to MRC. Finally, I want to give my most since gratitude to my friends and family; it is your support and love that keeps me going. iv TABLE OF CONTENTS LIST OF TABLES .................................................. viii LIST OF FIGURES ................................................. x Chapter 1 Introduction ........................................... 1 1.1 Motivation ................................................ 3 1.1.1 Need to Revisit Design Rule Checking ...................... 3 1.1.2 Chemical Mechanical Polishing Hotspot Detection ............. 4 1.1.3 Need for Fast and Accurate PPA Models ..................... 5 1.2 Research Contributions ...................................... 6 1.3 Outline .................................................. 8 Chapter 2 State-of-the-art ......................................... 9 2.1 Introduction .............................................. 9 2.2 Design Rules Checking ....................................... 10 2.3 Multilayer CMP Hotspot Modeling .............................. 12 2.4 Power, Performance and Area Modeling .......................... 13 Chapter 3 Deep Learning Background ................................ 16 3.1 Introduction .............................................. 16 3.2 Deep Learning Models Structure ............................... 17 3.3 Deep Learning Hyperparameters ............................... 17 3.4 Convolutional Neural Network ................................. 19 3.4.1 Loss function ........................................ 20 3.4.2 Optimizer ........................................... 21 3.4.3 Metrics to Measure the Model Performance . 21 Chapter 4 Design Rule Checking with Deep Learning .................... 23 4.1 Introduction .............................................. 23 4.2 Design rule checking ........................................ 24 4.2.1 How to use Deep Learning for DRC ........................ 25 4.3 Single Convolutional Neural Network Model ....................... 26 4.3.1 Model Structure Selection ............................... 27 4.3.2 Dataset to Train and Test the Single CNN Model . 29 4.3.3 Dataset Generation Process .............................. 30 4.3.4 Results for Testing the Single CNN Model .................... 32 4.4 DRC Framework with transfer Learning and Synthetic Training . 35 4.4.1 Deep Learning Architecture with Transfer Learning . 36 4.4.2 Selecting the Layers Size and Adding DRCs ................... 39 4.4.3 Synthetic Dataset Generator ............................. 40 4.4.4 Results for the DRC Framework ........................... 43 4.5 Testing New Layouts Process ................................... 49 4.6 Summary ................................................. 50 v Chapter 5 Multilayer CMP Hotspot Modeling with Deep Learning ........... 52 5.1 Introduction .............................................. 52 5.2 Chemical Mechanical Polishing ................................ 53 5.3 CMP Hotspot Modeling ...................................... 54 5.4 Proposed Modeling Architecture ................................ 56 5.4.1 Multilayer CNN Model .................................. 56 5.4.2 Model Details ........................................ 57 5.5 Dataset Generation ......................................... 59 5.5.1 Dataset Augmentation .................................. 60 5.6 Model Results ............................................. 62 5.6.1 Results With a Small Training Dataset ....................... 63 5.6.2 Results Increasing the Dataset Size ......................... 64 5.6.3 High and Low Topography
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