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Engineering Specification for the KA43 Processor Module Revision 1.0 1–May–1989 COMPANY CONFIDENTIAL RESTRICTED DISTRIBUTION
Engineering Specification for the KA43 Processor Module Revision 1.0 1–May–1989 COMPANY CONFIDENTIAL RESTRICTED DISTRIBUTION COPYRIGHT (c) 1989 by DIGITAL EQUIPMENT CORPORATION This information shall not be disclosed to non-Digital personnel or generally distributed within Digital. Distribution is restricted to persons authorized and designated by the responsible en- gineer or manager. This document shall not be left unattended, and when not in use shall be stored in a locked storage container. The information in this document is subject to change without notice and should not be construed as a commitment by Digital Equipment Corporation. Digital Equipment Corporation assumes no responsibility for any errors that may occur in this document. The information in this document does not describe any program or product currently available from Digital Equipment Corporation. Nor does Digital Equipment Corporation commit to imple- ment this specification in any program or product. Digital Equipment Corporation makes no commitment that this document accurately describes any product which it might ever make. Digital Equipment Corporation CONTENTS Preface . ........................................................... v Chapter 1 INTRODUCTION .............................................. 1 1.1 Scope of Document ................................................... 1 1.2 General Description .................................................. 1 1.3 Applicable Documents ................................................. 2 Chapter 2 KA43 ROM MEMORY ........................................ -
Beyond BIOS Developing with the Unified Extensible Firmware Interface
Digital Edition Digital Editions of selected Intel Press books are in addition to and complement the printed books. Click the icon to access information on other essential books for Developers and IT Professionals Visit our website at www.intel.com/intelpress Beyond BIOS Developing with the Unified Extensible Firmware Interface Second Edition Vincent Zimmer Michael Rothman Suresh Marisetty Copyright © 2010 Intel Corporation. All rights reserved. ISBN 13 978-1-934053-29-4 This publication is designed to provide accurate and authoritative information in regard to the subject matter covered. It is sold with the understanding that the publisher is not engaged in professional services. If professional advice or other expert assistance is required, the services of a competent professional person should be sought. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Intel may make changes to specifications, product descriptions, and plans at any time, without notice. Fictitious names of companies, products, people, characters, and/or data mentioned herein are not intended to represent any real individual, company, product, or event. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel, the Intel logo, Celeron, Intel Centrino, Intel NetBurst, Intel Xeon, Itanium, Pentium, MMX, and VTune are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. -
MIPS Architecture
Introduction to the MIPS Architecture January 14–16, 2013 1 / 24 Unofficial textbook MIPS Assembly Language Programming by Robert Britton A beta version of this book (2003) is available free online 2 / 24 Exercise 1 clarification This is a question about converting between bases • bit – base-2 (states: 0 and 1) • flash cell – base-4 (states: 0–3) • hex digit – base-16 (states: 0–9, A–F) • Each hex digit represents 4 bits of information: 0xE ) 1110 • It takes two hex digits to represent one byte: 1010 0111 ) 0xA7 3 / 24 Outline Overview of the MIPS architecture What is a computer architecture? Fetch-decode-execute cycle Datapath and control unit Components of the MIPS architecture Memory Other components of the datapath Control unit 4 / 24 What is a computer architecture? One view: The machine language the CPU implements Instruction set architecture (ISA) • Built in data types (integers, floating point numbers) • Fixed set of instructions • Fixed set of on-processor variables (registers) • Interface for reading/writing memory • Mechanisms to do input/output 5 / 24 What is a computer architecture? Another view: How the ISA is implemented Microarchitecture 6 / 24 How a computer executes a program Fetch-decode-execute cycle (FDX) 1. fetch the next instruction from memory 2. decode the instruction 3. execute the instruction Decode determines: • operation to execute • arguments to use • where the result will be stored Execute: • performs the operation • determines next instruction to fetch (by default, next one) 7 / 24 Datapath and control unit -
Connecticut DEEP's List of Compliant Electronics Manufacturers Notice to Connecticut Retailersi
Connecticut DEEP’s List of Compliant Electronics manufacturers Notice to Connecticut Retailersi: This list below identifies electronics manufacturers that are in compliance with the registration and payment obligations under Connecticut’s State-wide Electronics Program. Retailers must check this list before selling Covered Electronic Devices (“CEDs”) in Connecticut. If there is a brand of a CED that is not listed below including retail over the internet, the retailer must not sell the CED to Connecticut consumers pursuant to section 22a-634 of the Connecticut General Statutes. Manufacturer Brands CED Type Acer America Corp. Acer Computer, Monitor, Television, Printer eMachines Computer, Monitor Gateway Computer, Monitor, Television ALR Computer, Monitor Gateway 2000 Computer, Monitor AG Neovo Technology AG Neovo Monitor Corporation Amazon Fulfillment Service, Inc. Kindle Computers Amazon Kindle Kindle Fire Fire American Future Technology iBuypower Computer Corporation dba iBuypower Apple, Inc. Apple Computer, Monitor, Printer NeXT Computer, Monitor iMac Computer Mac Pro Computer Mac Mini Computer Thunder Bolt Display Monitor Archos, Inc. Archos Computer ASUS Computer International ASUS Computer, Monitor Eee Computer Nexus ASUS Computer EEE PC Computer Atico International USA, Inc. Digital Prism Television ATYME CORPRATION, INC. ATYME Television Bang & Olufsen Operations A/S Bang & Olufsen Television BenQ America Corp. BenQ Monitor Best Buy Insignia Television Dynex Television UB Computer Toshiba Television VPP Matrix Computer, Monitor Blackberry Limited Balckberry PlayBook Computer Bose Corp. Bose Videowave Television Brother International Corp. Brother Monitor, Printer Canon USA, Inc. Canon Computer, Monitor, Printer Oce Printer Imagistics Printer Cellco Partnership Verizon Ellipsis Computer Changhong Trading Corp. USA Changhong Television (Former Guangdong Changhong Electronics Co. LTD) Craig Electronics Craig Computer, Television Creative Labs, Inc. -
Accelerated AC Contingency Calculation on Commodity Multi
1 Accelerated AC Contingency Calculation on Commodity Multi-core SIMD CPUs Tao Cui, Student Member, IEEE, Rui Yang, Student Member, IEEE, Gabriela Hug, Member, IEEE, Franz Franchetti, Member, IEEE Abstract—Multi-core CPUs with multiple levels of parallelism In the computing industry, the performance capability of (i.e. data level, instruction level and task/core level) have become the computing platform has been growing rapidly in the last the mainstream CPUs for commodity computing systems. Based several decades at a roughly exponential rate [3]. The recent on the multi-core CPUs, in this paper we developed a high performance computing framework for AC contingency calcula- mainstream commodity CPUs enable us to build inexpensive tion (ACCC) to fully utilize the computing power of commodity computing systems with similar computational power as the systems for online and real time applications. Using Woodbury supercomputers just ten years ago. However, these advances in matrix identity based compensation method, we transform and hardware performance result from the increasing complexity pack multiple contingency cases of different outages into a of the computer architecture and they actually increase the dif- fine grained vectorized data parallel programming model. We implement the data parallel programming model using SIMD ficulty of fully utilizing the available computational power for instruction extension on x86 CPUs, therefore, fully taking advan- a specific application [4]. This paper focuses on fully utilizing tages of the CPU core with SIMD floating point capability. We the computing power of modern CPUs by code optimization also implement a thread pool scheduler for ACCC on multi-core and parallelization for specific hardware, enabling the real- CPUs which automatically balances the computing loads across time complete ACCC application for practical power grids on CPU cores to fully utilize the multi-core capability. -
User Guide Ty Pe S 8143, 8144, 8146 Ty Pe S 8422, 8423, 8427
ThinkCentre™ User Guide Ty pe s 8143, 8144, 8146 Ty pe s 8422, 8423, 8427 ThinkCentre™ User Guide Ty pe s 8143, 8144, 8146 Ty pe s 8422, 8423, 8427 Note Before using this information and the product it supports, be sure to read the “Important safety information” on page v and Appendix D, “Notices,” on page 43. Second Edition (June 2004) © Copyright International Business Machines Corporation 2004. All rights reserved. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Important safety information . .v Erasing a lost or forgotten password (clearing Conditions that require immediate action. .v CMOS) . .24 General safety guidelines . .vi Replacing the cover and connecting the cables. .25 Service . .vi Power cords and power adapters . .vi Chapter 2. Using the IBM Setup Utility Extension cords and related devices . vii program . .27 Plugs and outlets . vii Starting the IBM Setup Utility program . .27 Batteries . vii Viewing and changing settings . .27 Heat and product ventilation . viii Using passwords . .27 CD and DVD drive safety . viii Password considerations . .27 Additional safety information . .ix User Password . .28 Lithium battery notice . .x Administrator Password . .28 Modem safety information. .x IDE Drive User Password . .28 Laser compliance statement . .xi IDE Drive Master Password . .28 Setting, changing, and deleting a password. .29 Overview . xiii Using Security Profile by Device . .29 Information resources. xiii Selecting a startup device. .29 Selecting a temporary startup device . .30 Chapter 1. Installing options . .1 Changing the startup sequence . .30 Features . .1 Exiting from the IBM Setup Utility program . .30 Available options . -
Historical Perspective and Further Reading 162.E1
2.21 Historical Perspective and Further Reading 162.e1 2.21 Historical Perspective and Further Reading Th is section surveys the history of in struction set architectures over time, and we give a short history of programming languages and compilers. ISAs include accumulator architectures, general-purpose register architectures, stack architectures, and a brief history of ARMv7 and the x86. We also review the controversial subjects of high-level-language computer architectures and reduced instruction set computer architectures. Th e history of programming languages includes Fortran, Lisp, Algol, C, Cobol, Pascal, Simula, Smalltalk, C+ + , and Java, and the history of compilers includes the key milestones and the pioneers who achieved them. Accumulator Architectures Hardware was precious in the earliest stored-program computers. Consequently, computer pioneers could not aff ord the number of registers found in today’s architectures. In fact, these architectures had a single register for arithmetic instructions. Since all operations would accumulate in one register, it was called the accumulator , and this style of instruction set is given the same name. For example, accumulator Archaic EDSAC in 1949 had a single accumulator. term for register. On-line Th e three-operand format of RISC-V suggests that a single register is at least two use of it as a synonym for registers shy of our needs. Having the accumulator as both a source operand and “register” is a fairly reliable indication that the user the destination of the operation fi lls part of the shortfall, but it still leaves us one has been around quite a operand short. Th at fi nal operand is found in memory. -
Software Engineering a Abnormal End: Abend Abnormaal Einde De Beëindiging Van Een Proces Voordat Dat Proces Geheel Is Afgewerkt
1 Verklarende terminologielijst voor de Software Engineering A abnormal end: abend abnormaal einde De beëindiging van een proces voordat dat proces geheel is afgewerkt. abort (to) afbreken Een proces afbreken voordat het volledig is afgewerkt. absolute address absoluut adres Een adres dat permanent aan een eenheid of geheugenplaats is toegewezen en dat de eenheid of de geheugenplaats identificeert zonder dat daarvoor een vertaling of berekening nodig is. absolute assembler absoluut assembleerprogramma Een assembleerprogramma dat uitsluitend absolute code genereert. absolute code absolute code Code waarin alle adressen absoluut zijn. absolute coding absolute codering Een coderingsmethode waarin gebruik wordt gemaakt van instructies die absolute adressen bevatten. absolute expression absolute uitdrukking Een uitdrukking voorafgaande aan het moment waarop het assembleren van een programma plaatsvindt. Dit moment wordt niet beïnvloed door het verplaatsen van het programma. Een absolute uitdrukking kan een absoluut adres in een assembleertaal weergeven. absolute instruction absolute instructie 1. Een instructie in de definitieve uitvoerbare vorm. 2. Een computerinstructie waarin alle adressen uit absolute adressen bestaan. absolute loader absoluut laadprogramma Een programma dat een ander programma in het hoofdgeheugen kan plaatsen. Dit begint bij het initiële adres dat aan de code door het assembleerprogramma of de compiler is toegewezen en dat de adressen in de code niet verder wijzigt of aanpast. absolute load module absolute laadmodule 2 Een combinatie van werkmodules die op een gespecificeerd adres in het werkgeheugen wordt uitgevoerd. absolute machine code absolute machinecode Machinecode die steeds in vaste geheugenplaatsen moet worden geladen en niet mag worden verplaatst. Dit in tegenstelling tot verplaatsbare machinecode. absolute pathname absolute padnaam Een padnaam die de informatie bevat over de wijze waarop een bestand kan worden gevonden. -
MIPS IV Instruction Set
MIPS IV Instruction Set Revision 3.2 September, 1995 Charles Price MIPS Technologies, Inc. All Right Reserved RESTRICTED RIGHTS LEGEND Use, duplication, or disclosure of the technical data contained in this document by the Government is subject to restrictions as set forth in subdivision (c) (1) (ii) of the Rights in Technical Data and Computer Software clause at DFARS 52.227-7013 and / or in similar or successor clauses in the FAR, or in the DOD or NASA FAR Supplement. Unpublished rights reserved under the Copyright Laws of the United States. Contractor / manufacturer is MIPS Technologies, Inc., 2011 N. Shoreline Blvd., Mountain View, CA 94039-7311. R2000, R3000, R6000, R4000, R4400, R4200, R8000, R4300 and R10000 are trademarks of MIPS Technologies, Inc. MIPS and R3000 are registered trademarks of MIPS Technologies, Inc. The information in this document is preliminary and subject to change without notice. MIPS Technologies, Inc. (MTI) reserves the right to change any portion of the product described herein to improve function or design. MTI does not assume liability arising out of the application or use of any product or circuit described herein. Information on MIPS products is available electronically: (a) Through the World Wide Web. Point your WWW client to: http://www.mips.com (b) Through ftp from the internet site “sgigate.sgi.com”. Login as “ftp” or “anonymous” and then cd to the directory “pub/doc”. (c) Through an automated FAX service: Inside the USA toll free: (800) 446-6477 (800-IGO-MIPS) Outside the USA: (415) 688-4321 (call from a FAX machine) MIPS Technologies, Inc. -
Case No COMP/M.1694 - EMC / DATA GENERAL
EN Case No COMP/M.1694 - EMC / DATA GENERAL Only the English text is available and authentic. REGULATION (EEC) No 4064/89 MERGER PROCEDURE Article 6(1)(b) NON-OPPOSITION Date: 06/10/1999 Also available in the CELEX database Document No 399M1694 Office for Official Publications of the European Communities L-2985 Luxembourg COMMISSION OF THE EUROPEAN COMMUNITIES Brussels, 06.10.1999 SG(99)D/7991 In the published version of this decision, some information has been omitted pursuant to Article 17(2) of Council Regulation (EEC) No PUBLIC VERSION 4064/89 concerning non-disclosure of business secrets and other confidential information. The MERGER PROCEDURE omissions are shown thus […]. ARTICLE 6(1)(b) DECISION Where possible the information omitted has been replaced by ranges of figures or a general description. To the notifying party Dear Sirs, Subject : Case No IV/M.1694-EMC/DATA GENERAL Notification of 3-09-19999 pursuant to Article 4 of Council Regulation No 4064/89. 1. On 3 September 1999, the Commission received a notification of a proposed concentration pursuant to Article 4 of Council Regulation (EEC) No 4064/891 by which EMC Corporation (“EMC”), USA, will acquire sole control of Data General Corporation (“Data General”), USA. 2. After examination of the notification the Commission has concluded that the notified operation falls within the scope of Council Regulation (EEC) No 4064/89 and does not raise serious doubts as to its compatibility with the common market and with the EEA Agreement. I. THE PARTIES 3. EMC Corporation , based in the U.S.A, is active mainly in the design and manufacture of a wide range of information technology products, including hardware, software and related services. -
Hardware and Software Companies During the Microcomputer Revolution
Technology Companies Hardware and software houses of the microcomputer age James Tam Recall: Computers Before The Microprocessor James Tam Image: “A History of Computing Technology” (Williams) CPSC 409: The Microcomputer era The Microprocessor1, 2 • Intel was commissioned to design a special purpose system for a client. – Busicom (client): A Japanese hand-held calculator manufacturer – Prior to this the core money making business of Intel was manufacturing computer memory. • “Intel designed a set of four chips known as the MCS-4.”1 – The CPU for the chip was the 4004 (1971) – Also it came with ROM, RAM and a chip for I/O – It was found that by designing a general purpose computer and customizing it through software that this system could meet the client’s needs but reach a larger market. – Clock: 108 kHz3 1 http://www.intel.com/content/www/us/en/history/museum-story-of-intel-4004.html 2 https://spectrum.ieee.org/tech-history/silicon-revolution/chip-hall-of-fame-intel-4004-microprocessor James Tam 3 http://www.intel.com/pressroom/kits/quickreffam.htm The Microprocessor1,2 (2) • Intel negotiated an arrangement with Busicom so it could freely sell these chips to others. – Busicom eventually went bankrupt! – Intel purchased the rights to the chip and marketed it on their own. James Tam CPSC 409: The Microcomputer era The Microprocessor (3) • 8080 processor: second 8 bit (data) microprocessor (first was 8008). – Clock speed: 2 MHz – Used to power the Altair computer – Many, many other processors came after this: • 80286, 80386, 80486, Pentium Series I – IV, Celeron, Core • The microprocessors development revolutionized computers by allowing computers to be more widely used. -
And PC 750 (Type 6887)
Technical Information Manual PC 730 (Type 6877) and PC 750 (Type 6887) Technical Information Manual IBM PC 730 (Type 6877) and PC 750 (Type 6887) Note Before using this information and the product it supports, be sure to read the general information under Appendix B, “Notices and Trademarks” on page 65. First Edition (June 1996) The following paragraph does not apply to the United Kingdom or any country where such provisions are inconsistent with local law: INTERNATIONAL BUSINESS MACHINES CORPORATION PROVIDES THIS PUBLICATION “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Some states do not allow disclaimer of express or implied warranties in certain transactions, therefore, this statement may not apply to you. This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes will be incorporated in new editions of the publication. IBM may make improvements and/or changes in the product(s) and/or the program(s) described in this publication at any time. It is possible that this publication may contain reference to, or information about, IBM products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that IBM intends to announce such IBM products, programming, or services in your country. Requests for technical information about IBM products should be made to your IBM reseller or IBM marketing representative. IBM may have patents or pending patent applications covering subject matter in this document.