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Powerpc 750/7400 PMC Module

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Powerpc 750/7400 PMC Module PowerPC 750/7400 TM3 PMC Module Features imed at high performance, embedded applications, the TM3 is a high PowerPC 750 (G3) or 7400 (G4) CPU Aperformance processor module based on the latest PowerPC processor with up to 1 or 2Mbytes L2 Cache 256Mbytes SDRAM. The TM3 removes otherwise Upt o 256Mbytes SDRAM redundant system I/O such as networking to provide a processor node that is both fast and 512Kbytes FLASH efficient. To support this, the TM3 also includes fast DMA engines to move data quickly between other 132Mbytes/sec PCI (32-bit/33MHz rev 2.1) nodes or the host system. Bundled GNU Tools & Utilities Able to be used on its own, or as part of a multiprocessing system, the TM3 is ideal for VxWorks™ BSP embedded applications including DSP, imaging, PowerPC Linux Support computer telephony and transaction processing. Support AMC PowerTAP JTAG Emulator www.transtech-dsp.com PowerPC 7400 with AltiVec™ Branch The PowerPC 7400 is the latest Unit member of the PowerPC processor INST INST INST family and continues to provide a highly advanced superscalar Integer Floating-Point Vector Unit Unit Unit architecture to deliver very high GPRs FPRs VRs integer and floating-point performance. INST INST DATA DATA DATA DATA ADDR ADDR A major feature of the PowerPC Memory 7400 processor is the addition of a 128-bit vector processing unit. This PowerPC 7400 architecture overview is otherwise known as the AltiVec with AltiVec™ vector unit extension and operates in a SIMD Figure 1 mode (Single Instruction Multi-Data). See Figure 1 for an overview. With AltiVec, the PowerPC can accelerate language extensions, rather than many DSP and multimedia type relying on compiler efficiencies, applications by being able to achieve permits maximum performance to be anything up to 20 operations in a achievable. single CPU clock cycle. As an Through the Altivec Instruction example, the vector unit can process Set Architecture many application 16x 8-bit data elements in parallel. segments are supported including The vector unit can handle parallel Voice over IP (VoIP), speech data elements of other lengths recognition, voice/sound processing including floating-point. See Table 1 and communications including multi- and Figure 2 for summaries. channel modems, software modems, With the new vector unit come data encryption. The parallel nature 162 new instructions. These are of Altivec means that PowerPC 7400 similar to those found on the scalar can replace modem banks with a units, but in SIMD format. To single processor whereas many were implement these instructions at a previously needed. This simplicity high level, C language extensions makes development easier and have been made available. Using reduces cost. PowerPC 7400 Summary Specification n Internal CPU Speeds # Parallel Vector Operations Data Types Supported 350, 400 and 450MHz 16-way 8-bit signed & unsigned ints and chars n Bus Interface 8-way 16-bit signed & unsigned ints 64-bit bus with MPX/60x protocol 4-way 32-bit signed & unsigned ints and IEEE floating-point numbers n Cache L1: 32Kbyte instr + 32Kbyte data Parallelism with AltiVec technology execution unit L2: up to 2Mbytes Table 1 n Power Consumption 5W (typ)/11.5W (max) floating-point value a floating-point value b floating-point value c floating-point value d n Package floating-point value a' floating-point value b' floating-point value c' floating-point value d' 360 ball CBGA n Benchmark Estimates (450MHz) operation operation operation operation 21.4 SPECint95 20.4 SPECfp95 floating-point value w floating-point value x floating-point value y floating-point value z 825 MIPS n Execution Units Parallel floating-point operations with AltiVec integer (2), floating-point, vector, Figure 2 branch, load/store, system transfers by improving system flow Overview control. The result is an efficient PCI The TM3 is provided with a choice of interface capable of sustaining PowerPC 750 or PowerPC 7400 120Mbytes/sec to and from SDRAM. CPUs at different speed grades (and Full support for scatter/gather and higher speed parts as they become unaligned transfers is also included. available). As an initiator, the TM3 allows the To achieve maximum CPU and DMA engines to directly performance, the TM3 includes a 1 access other devices. or 2Mbyte L2 cache option (PowerPC 750 1Mbyte only) and Peripherals uses pipeline burst SRAMs. These The TM3 includes all the necessary are connected to the CPU by a resources required by leading real- dedicated backside bus running at time operating system such as a between 150 and 200MHz, flash BIOS ROM for boot firmware, depending on the core speed. non-volatile memory, a timer and a The CPU is connected to the serial port. The serial port is available SDRAM memory by an optimised for through a 9-way D-type connector, low latency and high bandwidth data and provides an invaluable resource streaming. for operating systems to implement diagnostics or configuration support. PCI Interface Utilities are supplied to test and The TM3 PCI interface is a PCI 2.1 program the BIOS and NVRAM, as compliant initiator and target. This well as programming examples for includes the ability to generate and the timer and serial port. respond to configuration cycles. To help maintain data structures across systems, the TM3 uses byte Sofware Tools and Utilities Summary n Linux for PowerPC Version 2.2 n VxWorks Bundled BSP Development Tools n TCP/IP Communications invariant addressing and hardware The TM3 includes a JTAG TAP TCP/IP across PCI for fast inter- endian-conversion. Also included is a socket and adapter that is processor communications pair of DMA engines with bus compatible with AMC’s PowerTAP™ mastering ability. This powerful debugger. This is functionally similar n Choice for Host Programming combination allows for high to a full in-circuit emulator. Support performance data transfers without The TM3 is bundled with a CD Windows NT, Linux, DOS and the CPU needing to re-manipulate containing PowerPC resources and Windows 95/98 the data. tools including: n GNU C Cross Compiler As a PCI target, all the TM3’s on n GNU C cross compiler for with run-time support board resources are visible. This Win32 and Linux hosts allows the host and other PCI n Host drivers, libraries and n PowerTAP™ Adaptor initiators access the TM3’s SDRAM, utilities for Windows 95/98, Compatible with full In-Circuit peripherals and control registers. Windows NT, Linux and DOS Emulator (ICE) As part of the PCI interface, the n PCI programming examples and TM3 has deep FIFO buffers. The libraries effect of this is to smooth out burst Block Diagram 1or2Mbyte L2 cache 64-256M 512K Serial SDRAM FLASH I/O Header PowerPC G3/G4 Timer & PCI/PCI Emulator NVRAM Bridge Connector Technical Specification Processor Serial Port CPU PowerPC 750 (G3): 366, 400MHz Ports 1 PowerPC 7400 (G4): 333, 400MHz Connector 9-way D-type (PC pin-out) L1 cache (on-chip) 32kbyte instruction, 32kbyte data Baud rate (max) 128K; (9600, no parity, stop - def) L2 cache 1Mbyte PBSRAM, 133-200MHz I/O Device 16550 compatible Memory Mechanical Type SDRAM Board form factor IEEE P1386.1 single width PMC Size 64/128/256 Mbytes Weight 115 g Bus width 64 bit Environmental Bus speed 66 MHz Power dissipation TBA Bursting 4-1-1-1-2-1-1-1 Operating temperature 0 to 65ºC FLASH 512Kbytes Storage temperature -15 to 85ºC PCI Interface Software Compliance PCI 2.1 Resources CD-ROM GNU C cross compiler, libraries, Width 32 bit examples and host utilities for Voltage keying 5V Windows 95/98 and Windows NT Speed 33 MHz Operating Systems VxWorks, PowerPC Linux 2.2 Bandwidth 132Mbytes/sec Ordering Information TM3-s-m PowerPC™ G3 with 1MByte L2 cache TM3A-s-m PowerPC™ G4 with 1MByte L2 cache TM3A2-s-m PowerPC™ G4 with 2MByte L2 cache where s: processor clock (MHz) - 333, 366, 400 m: memory (MBytes) - 64, 128, 256 example: TM3A2-400-128 400MHz PowerPC G4 with 2Mbytes L2 cache and 128Mbytes memory 20 Thornwood Drive, Ithaca, NY 14850-1263, USA Tel: 607 257 8678 Fax: 607 257 8679 email: [email protected] Manor Courtyard, Hughenden Avenue, High Wycombe, HP13 5RE, UK Tel: +44(0)1494 464432 Fax: +44(0)1494 464472 email: [email protected] www.transtech-dsp.com Transtech reserves the right to alter specifications without notice, in line with its policy of continuous development. Transtech cannot accept responsibility to any third party for loss or damage arising out of the use of this information. The PowerPC name and PowerPC logotype are registered trademarks of International Business Machines Corporation, used under license therefrom. Altivec is a trademark of Motorola Computers Inc. Transtech acknowledges all registered trademarks. Document Reference TM3D0300 © Copyright Transtech DSP 2000.
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