Copyright 2017 Corporation Notices and Disclaimers

Intel technologies may require enabled hardware, specific software, or services activation. Performance varies depending on system configuration. Check with your system manufacturer or retailer. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit http://www.intel.com/performance. Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specified circumstances and configurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction. § For more information go to http://www.intel.com/performance. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. No computer system can be absolutely secure. Intel, the Intel logo, , Intel vPro, Intel , Look Inside., are trademarks of Intel Corporation in the U.S. and/or other countries. © 2017 Intel Corporation. *Other names and brands may be claimed as the property of others.

Copyright 2017 Intel Corporation 2

CLOUD ECONOMICS INTELLIGENT DATA PRACTICES NETWORK TRANSFORMATION

Intel® Xeon® Scalable Platform

The industry’s Biggest platform advancement In a decade INTEL® XEON® SCALABLE processors The Foundation for Agile, Secure, Workload-Optimized Hybrid Cloud

UP TO UP TO SCALABLE PERFORMANCE SCALABLE PERFORMANCE 28 CORES 22 CORES AT LOW POWER ENTRY HARDWARE-ENHANCED SECURITY Good STANDARD RAS STANDARD RAS UP SOCKET WITH UPI SOCKET TO 2, 4 & 8 SUPPORT UP TO 3 LINKS 2 & 4 SUPPORT MODERATE TASKS Light TASKS M TOPLINE MEMORY DDR4 H WITH UP TO UPI LINKS 2666 Z UP TO 1.5 TB CHANNEL BANDWIDTH 3 INTEL® TURBO BOOST TECHNOLOGY AND ENTRY PERFORMANCE, Price Sensitive INTEL® HYPER-THREADING TECHNOLOGY ACCELERATOR RELIABILITY, AVAILABILITY FOR LIGHT WORKLOADS HIGHEST THROUGHPUT ADVANCED AND SERVICEABILITY FOR MODERATE WORKLOADS MAINSTREAM Efficient ENTRY

7 The Intel® Xeon® Scalable Processors: Intel® Xeon® PLATINUM PROCESSOR 81XX Series Platinum (2, 4, and 8 An Agile Solution Stack for Data Center Workloads Socket) Intel® Xeon® GOLD PROCESSOR + Up to 28 Cores + 2,4, or 8 socket configurations for 5 61XX Series Gold (2 and 4 Socket) best performance and scalability + Up to 22 Cores + Topline memory channel + Added 3rd UPI link for increased performance (1.5 TB memory dataflow across cores bandwidth on select SKUs) Intel® Xeon® SILVER PROCESSOR + Increased performance across + 3 UPI links option across 2S,4S,8S memory channels6 for improved scalability and inter- 41XX Series Silver (2 Socket) + Intel® AVX-512 with additional FMA core data flow + Up to 12 cores + Added Node Controller Support to Intel® Xeon® BRONZE PROCESSOR + 2S configuration with Improved assist in scaled node management Memory channel performance 51XX Series Gold (2 and 4 Socket) 31XX Series Bronze (2 Socket) + Intel® Turbo Boost Technology + Up to 14 cores • Up to 8 cores for higher frequency capability + Supports 2S and 4S configuration • 2S configuration + Intel® HT Technology for hyper for increased scalability • Improved core interconnect (UPI) threaded workloads + Increased core interconnect speed to over past gen boost data flow in multi-processor • 48 PCIe 3.0 lanes workloads • Intel® AVX-512 feature enabled + Advanced RAS features The Best Performance, • Standard RAS features Scalability, Core options, Efficient Performance at Low Mainstream Performance, Fast and all Hardware-Enhanced Entry Performance and security Power. Provides more horsepower Memory, More Interconnect Security features for the for price sensitive deployments for single purpose workloads Engines, Advanced Reliability most robust capability

Better performance, interconnectivity, scalability, and memory

8 Unified Intel® Xeon® Scalable Platform

2016 2017 2018 Intel® Xeon® Processor E7 Brickland Platform Intel® Xeon® Scalable Targeted at mission-critical Platform (codename Purley) applications that value a scale-up Skylake CPUs E7 v3 E7 v4 system with leadership18 cores memory capacity and advanced RAS Intel® Xeon® PLATINUM Intel® Xeon® GOLD Intel® Xeon® Processor E5 Grantley-EP Platform Targeted at a wide variety of Intel® Xeon® SILVER applications that value a balanced E5 v3 E5-4600 v4 (4S) system with leadership Intel® Xeon® BRONZE E5 v3 E5-2600 v4 performance/watt/$

Copyright 2017 Intel Corporation 9 Intel® Xeon® Scalable Processor Re-architected from the Ground Up

• Skylake core microarchitecture, with data • New mesh interconnect architecture • Intel® Speed Shift Technology center specific enhancements • Enhanced memory subsystem • Security & Virtualization enhancements • Intel® AVX-512 with 32 DP flops per core (MBE, PPK, MPX) • Modular IO with integrated devices • Data center optimized cache hierarchy – • Optional Integrated Intel® Omni-Path • New Intel® Ultra Path Interconnect 1MB L2 per core, non-inclusive L3 Fabric (Intel® OPA) (Intel® UPI)

Features Intel® Xeon® Processor E5-2600 v4 Intel® Xeon® Scalable Processor 6 Channels DDR4

Cores Per Socket Up to 22 Up to 28 DDR4 Core Core 2 or 3 UPI Threads Per Socket Up to 44 threads Up to 56 threads DDR4 Core Core UPI Last-level Cache (LLC) Up to 55 MB Up to 38.5 MB (non-inclusive) DDR4 QPI/UPI Speed (GT/s) 2x QPI channels @ 9.6 GT/s Up to 3x UPI @ 10.4 GT/s UPI DDR4 Core Core PCIe* Lanes/ 40 / 10 / PCIe* 3.0 (2.5, 5, 8 GT/s) UPI Controllers/Speed(GT/s) 48 / 12 / PCIe 3.0 (2.5, 5, 8 GT/s) DDR4 Shared L3 4 channels of up to 3 RDIMMs, 6 channels of up to 2 RDIMMs, Omni-Path Memory Population Omni-Path HFI LRDIMMs, or 3DS LRDIMMs LRDIMMs, or 3DS LRDIMMs DDR4 Max Memory Speed Up to 2400 Up to 2666 48 Lanes DMI3 PCIe* 3.0 TDP (W) 55W-145W 70W-205W

10 Platform Overview

3x16 PCIe* 3x16 PCIe 2 or 3 Intel® UPI Gen3 Gen3 Capabilities Details

Socket Skylake-SP Skylake-SP DDR4 Scalability 2S, 4S, 8S, and >8S (with node controller support) CPU 2666 CPU CPU TDP 70W – 205W OPA OPA 1x 100Gb OPA 1x 100Gb OPA Intel® C620 Series (code name Lewisburg PCH) Fabric Fabric Networking Intel® Omni-Path Fabric (integrated w/ CPU + discrete) 4x10GbE (integrated w/ chipset) DMI CPU VRs 100G/40G/25G discrete options OPA VRs Intel® C620 Series Compression and Intel® QuickAssist Technology option in chipset to Mem VRs Crypto Acceleration support 100Gb/s comp/decomp/crypto Intel® ME High USB3 100K RSA2K public key QAT IE Speed IO PCIe3 4x10GbE NIC SATA3 BMC Storage CPU integrated QuickData Technology, VMD, and NTB GPIO Intel® Optane™ SSD, Intel® 3D-NAND NVMe* & SATA SSD eSPI/LPC 10GbE SPI Security CPU Instruction Set enhancements (MBE, PPK, MPX) Manageability Engine with multiple secure boot options TPM Firmware Intel® Platform Trust Technology Intel® Key Protection Technology

BMC: Baseboard Management Controller PCH: Intel® IE: Innovation Engine Manageability Intel® Node Manager Intel® OPA: Intel® Omni-Path Architecture Intel QAT: Intel® QuickAssist Technology ME: Manageability Engine Intel® Datacenter Manager NIC: Network Interface Controller VMD: Volume Management Device NTB: Non-Transparent Bridge Innovation Engine (IE)

Copyright 2017 Intel Corporation 11 Platform Topologies 2S Configurations General Purpose/Storage/ 4S Configurations 8S Configuration HPC/Comms SP Enterprise and Cloud Enterprise LBG LBG

SKL SKL SKL SKL SKL SKL Intel® UPI

DMI * x4 * LBG LBG LBG 3x16 3x16 PCIe* 1x100G PCIe 1x100G SKL SKL Intel® OP Fabric Intel OP Fabric SKL SKL (2S-2UPI & 2S-3UPI shown)

DMI SKL SKL LBG LBG 3x16 PCIe

(4S-2UPI & 4S-3UPI shown) SKL SKL Intel® Xeon® Scalable Platform supports DMI 3x16 PCIe configurations ranging from 2S-2UPI to 8S LBG LBG

Copyright 2017 Intel Corporation 12 Copyright 2017 Intel Corporation 13 Overview

. Skylake core microarchitecture, with . New mesh interconnect architecture . Intel® Speed Shift Technology data center specific enhancements . Enhanced memory subsystem . Security & Virtualization enhancements . Intel® AVX-512 with 32 DP Flops per . Modular IO subsystem with integrated . Optional Integrated Intel® Omni-Path core devices Fabric (Intel® OPA) . Data center optimized cache hierarchy – . New Intel® Ultra Path Interconnect 1MB L2 per core, non-inclusive L3 (Intel® UPI

Intel® Xeon® Scalable Processor Features Intel® Xeon® Processor E5-2600 v4 6 Channels DDR4 (Skylake-SP) DDR4 Core Core Cores Per Socket Up to 22 Up to 28 2 or 3 UPI DDR4 Threads Per Socket Up to 44 threads Up to 56 threads Core Core UPI Last-level Cache (LLC) Up to 55 MB Up to 38.5 MB (non-inclusive) DDR4 UPI

QPI/UPI Speed (GT/s) 2x QPI channels @ 9.6 GT/s Up to 3x UPI @ 10.4 GT/s DDR4 Core Core PCIe* Lanes/ UPI 40 / 10 / PCIe 3.0 (2.5, 5, 8 GT/s) DDR4 Shared L3 Controllers/Speed(GT/s) 48 / 12 / PCIe 3.0 (2.5, 5, 8 GT/s) Omni Path 4 channels of up to 3 RDIMMs, 6 channels of up to 2 RDIMMs, DDR4 Omni Path HFI Memory Population LRDIMMs, or 3DS LRDIMMs LRDIMMs, or 3DS LRDIMMs 48 Lanes DMI3 Max Memory Speed Up to 2400 Up to 2666 PCIe 3.0 TDP (W) 55W-145W 70W-205W

Copyright 2017 Intel Corporation 14 Core Microarchitecture Enhancements Data Center Core

DecodersDecoders 5 Broadwell Skylake 32KB L1 I$ Pre decode Inst Q Decoders μop uArch uArch 6 Queue Front End Branch Prediction Unit μop Cache Out-of-order Window 192 224 In-flight Loads + Load Store Reorder Allocate/Rename/Retire 72 + 42 72 + 56 Buffer Buffer Buffer In order Stores Scheduler OOO Scheduler Entries 60 97 Port 0 Port 1 Port 5 Port 6 Port 4 Port 2 Port 3 Port 7 Registers – 168 + 168 180 + 168 ALU ALU ALU ALU Integer + FP Store Data Load/STA Load/STA STA Shift LEA LEA Shift INT JMP 2 MUL JMP 1 Allocation Queue 56 64/thread Load Data 2 L1D BW (B/Cyc) – FMA FMA FMA Memory 64 + 32 128 + 64 ALU ALU ALU Load Data 3 Memory Control Load + Store

VEC Shift Shift Shuffle DIV 4K+2M: 4K+2M: L2 Unified TLB 1536 1MB L2$ Fill Buffers 32KB L1 D$ 1024 Fill Buffers 1G: 16 . Larger and improved branch predictor, higher throughput decoder, larger window . Improved scheduler and execution engine, improved throughput and latency of divide/sqrt . More load/store bandwidth, deeper load/store buffers, improved prefetcher . Data center specific enhancements  Intel® AVX-512 with 2 FMAs per core, larger 1MB L2 per core Data center-specific enhancements to the core

Copyright 2017 Intel Corporation 15 Key Instruction Set Architecture Enhancements Compute Virtualization Security

Intel® AVX-512 Improved Time Stamp Counter Page Protection Keys (PPK) 2x compute density per core for vector Virtualization Extends paging architecture to provide a operations Reduces overhead on VMs migrating across page-granular, thread-private user-level processors running at different base memory protection frequency

Cache Management Instructions Mode Based Execution (MBE) CLFLUSHOPT – Lower latency cache line Protects against malicious kernel updates flush in a virtualized system CLWB – Cache line writeback to memory without invalidation

Copyright 2017 Intel Corporation 16 Intel® Advanced Vector Extensions 512 (Intel® AVX-512)

. 512-bit wide vectors Microarchitecture Instruction Set SP FLOPs / cycle DP FLOPs / cycle Intel® AVX-512 & . 32 operand registers Skylake 64 32 FMA . 8 64b mask registers Haswell / Broadwell Intel® AVX2 & FMA 32 16 . Embedded broadcast Sandybridge Intel® AVX (256b) 16 8 . Embedded rounding Nehalem SSE (128b) 8 4

Intel AVX-512 Instruction Types Intel AVX-512-F AVX-512 Foundation Instructions AVX-512-VL Vector Length Orthogonality: ability to operate on sub-512 vector sizes AVX-512-BW 512-bit Byte/Word support AVX-512-DQ Additional D/Q/SP/DP instructions (converts, transcendental support, etc.) AVX-512-CD Conflict Detect: used in vectorizing loops with potential address conflicts Intel® AVX-512 doubles the number of FLOPs per cycle

Copyright 2017 Intel Corporation 17 Performance and Efficiency with Intel® AVX-512

GFLOPs / Watt 6,00 4,83 LINPACK Performance 4,00 2,92 3,1 3259 3500 3,5 1,74 2,8 2,00 3000 2,5 3 1,00

2500 2,1 2,5 GFLOPs/Watt 0,00

2000 2 SSE4.2to Normalized SSE4.2 AVX AVX2 AVX512 2034

GFLOPs, Power GFLOPs, 1500 1178 1,5 Frequency 1000 669 1 GFLOPs / GHz 8,00 7,19 500 0,5 760 768 791 767 0 0 6,00 SSE4.2 AVX AVX2 AVX512 3,77 4,00 1,95

GFLOPs Power (W) Frequency (GHz) 2,00 1,00 GFLOPs/GHz 0,00

Intel® AVX is designed to balance power consumed by lowering SSE4.2to Normalized SSE4.2 AVX AVX2 AVX512 frequency when needed, while delivering significant performance gains and reduced runtimes

Source as of June 2017: Intel internal measurements on platform with Xeon Platinum 8180, Turbo enabled, UPI=10.4, SNC1, 6x32GB DDR4-2666 per CPU, 1 DPC. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.

Copyright 2017 Intel Corporation 18 New Mesh Interconnect Architecture Xeon® E7 v4 24-core die Skylake-SP 28-core die

QPI QPI PCI-E PCI-E PCI-E PCI-E X4 Link Link X16 X16 X8 (ESI) UBox PCU R3QPI R2PCI CB DMA IOAPIC 2x UPI x20 PCIe* x16 PCIe x16 On Pkg 1x UPI x20 PCIe x16 QPI Agent IIO * DMI x 4 PCIe x16 CBDMA

CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC

IDI/QPII IDI/QPII IDI/QPII IDI/QPII Cache Cache Cache Cache

Core BO LLC LLC BO Core Core BO LLC LLC BO Core

IDI IDI IDI Core IDI Core Core Core BO SAD 2.5MB 2.5MB SAD BO BO SAD 2.5MB 2.5MB SAD BO SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core

CBO CBO CBO CBO

IDI/QPII IDI/QPII IDI/QPII IDI/QPII Cache Cache Cache Cache DDR4 DDR4

Core BO LLC LLC BO Core Core BO LLC LLC BO Core MC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC MC

IDI IDI IDI Core IDI Core Core Core BO SAD 2.5MB 2.5MB SAD BO BO SAD 2.5MB 2.5MB SAD BO

CBO CBO CBO CBO DDR4 DDR4

IDI/QPII IDI/QPII IDI/QPII IDI/QPII Cache Cache Cache Cache SKX Core SKX Core SKX Core SKX Core

Core BO LLC LLC BO Core Core BO LLC LLC BO Core DDR4 DDR4

IDI IDI IDI Core IDI Core Core Core BO SAD 2.5MB 2.5MB SAD BO BO SAD 2.5MB 2.5MB SAD BO CBO CBO CBO CBO

CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC

IDI/QPII IDI/QPII IDI/QPII IDI/QPII Cache Cache Cache Cache

Core BO LLC LLC BO Core Core BO LLC LLC BO Core

IDI IDI IDI Core IDI Core Core Core BO SAD 2.5MB 2.5MB SAD BO BO SAD 2.5MB 2.5MB SAD BO

CBO CBO CBO CBO SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core

IDI/QPII IDI/QPII IDI/QPII IDI/QPII Cache Cache Cache Cache

Core BO LLC LLC BO Core Core BO LLC LLC BO Core

IDI IDI IDI Core IDI Core Core Core BO SAD 2.5MB 2.5MB SAD BO BO SAD 2.5MB 2.5MB SAD BO

CBO CBO CBO CBO CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC

IDI/QPII IDI/QPII IDI/QPII IDI/QPII Cache Cache Cache Cache

Core BO LLC LLC BO Core Core BO LLC LLC BO Core

IDI IDI IDI Core IDI Core Core Core BO SAD 2.5MB 2.5MB SAD BO BO SAD 2.5MB 2.5MB SAD BO SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core CBO CBO CBO CBO

CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC

SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core

Home Agent Home Agent DDR DDR DDR DDR CHA – Caching and Home Agent ; SF – Snoop Filter; LLC – Last Level Cache ; Mem Ctlr Mem Ctlr SKX Core – Skylake-SP Core ; UPI – Intel® UltraPath Interconnect Dual-ring in BroadwellServer (Intel® Xeon® Processor E5/E7) v. Mesh in Skylake-SP

Copyright 2017 Intel Corporation 19 Memory Subsystem

1x16/2x8/4x4 2x UPI x20 @ 1x16/2x8/4x4 PCIe @ 8GT/s 1x16/2x8/4x4 . 2 Memory Controllers, 3 channels each  total of 6 10.4GT/s PCIe @ 8GT/s x4 DMI PCIe @ 8GT/s memory channels – DDR4 up to 2666, 2 DIMMs per channel 2x UPI x20 PCIe* x16 PCIe x16 PCIe x16 DMI x4 – Support for RDIMM, LRDIMM, and 3DS-LRDIMM CBDMA – 1.5TB Max Memory Capacity per Socket (2 DPC with CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC 128GB DIMMs) Core Core Core Core – >60% increase in Memory BW per Socket compared

DDR 4 MC CHA/SF/LLC CHA/SF/LLC MC DDR 4 to Intel® Xeon® processor E5 v4 3X DDR4-2666 3x DDR4-2666 DDR 4 DDR 4 . Supports various optimizations to reduce LLC miss Core Core DDR 4 DDR 4 latency CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC . Introduces a new memory device failure detection and Core Core Core Core recovery scheme - Adaptive Double Device Data Correction (ADDDC) - that reduces bandwidth and capacity overhead

Copyright 2017 Intel Corporation 26 Sub-NUMA Cluster (SNC)

1x16/2x8/4x4 2x UPI x 20 @ 1x16/2x8/4x4 PCIe @ 8GT/s 1x UPI x 20 @ 1x16/2x8/4x4 10.4GT/s PCIe*@ 8GT/s x4 DMI 10.4GT/s PCIe @ 8GT/s . Prior generation supported Clusters-On-Die (COD) 2x UPI x 20 PCIe x16 PCIe x16 On Pkg 1x UPI x 20 PCIe x16 . SNC provides similar localization benefits as COD, DMI x 4 PCIe x16 CBDMA without some of its downsides: CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC – One UPI caching agent even in 2-SNC mode SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core

– Latency for memory accesses in remote cluster is DDR4/DDRT MC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC MC DDR4/DDRT 2400 smaller, no UPI flow 2400 DDR4/DDRT DDR4/DDRT SKX Core SKX Core SKX Core SKX Core

DDR4/DDRT DDR4/DDRT

DDRT DDRT

3xDDR4 3xDDR4 2667 3xDDR4 2667 – LLC capacity is utilized more efficiently in 2- CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC cluster mode, no duplication of lines in LLC SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core

CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC

UPI SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core SNC Prefetch CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC CHA/SF/LLC

UMA Disabled Disabled UMA, No prefetch SKX Core SKX Core SKX Core SKX Core SKX Core SKX Core Recommended default NUMA Disabled Enabled SNC Domain 0 SNC Domain 1 setting,1 cluster/socket NUMA Enabled Enabled 2 clusters per socket

Copyright 2017 Intel Corporation 27 Memory Performance Bandwidth-Latency Profile

Source as of June 2017: Intel internal measurements on platform with Xeon Platinum 8180, Turbo enabled, UPI=10.4, SNC1/SNC2, 6x32GB DDR4-2400/2666 per CPU, 1 DPC, and platform with E5-2699 v4, Turbo enabled, 4x32GB DDR4-2400, RHEL 7.0. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information go to http://www.intel.com/performance

Copyright 2017 Intel Corporation 28 Memory Performance Core to Memory Latency

NUMA - Local NUMA - Min Remote NUMA - Max Remote UMA - Min UMA - Max 220

200

180

160

140

120

LATENCY LATENCY (NS) Lower Lower isbetter 100

80

60 Intel® Xeon® E5-2699 v4, Intel® Xeon® E5-2699 v4, Intel® Xeon® E5-2699 v4, Intel® Xeon® Platinum Intel® Xeon® Platinum DDR4-2400, Dir+OSB DDR4-2400, Home Snp DDR4-2400, COD 8180, DDR4-2666 8180, DDR4-2666, SNC2

Source as of June 2017: Intel internal measurements on platform with Xeon Platinum 8180, Turbo enabled, UPI=10.4, 6x32GB DDR4-2666, 1 DPC, and platform with E5-2699 v4, Turbo enabled, 4x32GB DDR4-2400, RHEL 7.0. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit http://www.intel.com/performance.

Copyright 2017 Intel Corporation 29 Intel® Ultra Path Interconnect (Intel® UPI)

. Intel® Ultra Path Interconnect (Intel® UPI), replacing Intel® QPI . Faster link with improved bandwidth for a balanced system design . Improved messaging efficiency per packet . 3 UPI option for 2 socket – additional inter-socket bandwidth for non-NUMA optimized use-cases

Data Rate Data Efficiency

10.4 4% to 9.6 GT/s GT/s 21%

QPI UPI (per wire) Intel® UPI enables system scalability with higher inter-socket bandwidth Source as of June 2017: Intel internal measurements on platform with Xeon Platinum 8180, Turbo enabled, UPI=10.4, 6x32GB DDR4-2666, 1 DPC, and platform with E5-2699 v4, Turbo enabled, 4x32GB DDR4-2400, RHEL 7.0. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit http://www.intel.com/performance.

Copyright 2017 Intel Corporation 30 Intel® Xeon® Scalable Processor with Integrated Fabric

Single on-package Intel® Omni-Path Host Fabric Interface (HFI) Internal Faceplate-to- Fabric component interfaces to CPU using x16 PCIe* lanes Processor (IPF) Cable Fabric PCIe lanes are additional to the 48 PCIe lanes

QSFP QSFP

F connector CONNECTOR Single cable from SKL-F package connector to QSFP module CONNECTOR module Skylake-F Same socket for Skylake-SP and Skylake-F processors . Intel® Xeon® Scalable platform can be designed to support Internal Faceplate both processors Transition (IFT) Connector and Cage . Platform design requires an expanded keep-out zone and additional board components to accommodate both processors

Copyright 2017 Intel Corporation 34 Intel® Xeon® Scalable Processor Architecture Summary New Architectural Innovations for Data Center

. Up to 60% increase in compute density with Intel® AVX-512 . Improved performance and scalability with Mesh on-chip interconnect . L2 and L3 cache hierarchy optimized for data center workloads . Improved memory subsystem with up to 60% higher memory bandwidth . Faster and more efficient Intel® UPI interconnect for improved scalability . Improved integrated IO with up to 50% higher aggregate IO bandwidth . Increased protection against kernel tampering and user data corruption . Enhanced power management and RAS capability for improved utilization of resources

Copyright 2017 Intel Corporation 35 WHAT’S NEW

INTRODUCING THE NEW INTEL® XEON® SCALABLE PROCESSOR INTRODUCING THE NEW INTEL® XEON® W PROCESSOR BREAKTHROUGH PERFORMANCE PERFORMANCE OPTIMIZED FOR EXPERT WORKSTATIONS† FOR MAINSTREAM WORKSTATIONS †

© Copyright 2017 Intel Corporation 36 BREAKTHROUGH PERFORMANCEFOR EXPERT WORKSTATIONS† UP PERFORMANCE PERFORMANCE IMPROVEMENT UP IMPROVEMENT TO 2.71X 4-YEAR REFRESH1 TO 1.65X GEN-ON-GEN2 UP UP TO 56CORES TO 112THREADS

G WITH INTEL® DDR4 UP UP M H TURBO H TO4.2 Z BOOST TECHNOLOGY 2.0 TO3 TB 266 Z ULTIMAT ACCELERATOR THROUGHPUT WITH 6 † EXPANDABILITY, RELIABILITY, SECURITY E INFORMATION BASED ON DUAL-SOCKET CONFIGURATION WORLD RECORD PERFORMANCE New Intel® Xeon® Scalable Processor

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks. Configuration: Refer to Performance Benchmark Disclosure slide. Results have been estimated or simulated using internal Intel analysis or architecture simulation or modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance. *Other names and brands may be claimed as the property of others.

© Copyright 2017 Intel Corporation 37 PERFORMANCE OPTIMIZEDFOR MAINSTREAM WORKSTATIONS† UP PERFORMANCE PERFORMANCE IMPROVEMENT UP IMPROVEMENT TO 1.87X 4-YEAR REFRESH3 TO 1.38X GEN-ON-GEN4 G WITH INTEL® DDR4 UP UP M H TURBO H TO4.5 Z BOOST TECHNOLOGY 2.0 TO 512 GB 266 Z UP UP 6 TO 18 CORES TO 36THREADS MAINSTREAM PERFORMANCE WITH OPTIMIZED EXPANDABILITY, RELIABILITY, SECURITY†

AVAILABLE IN SINGLE-SOCKET CONFIGURATION ONLY

New Intel® Xeon® W Processor

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks. Configuration: Refer to Performance Benchmark Disclosure slide. Results have been estimated or simulated using internal Intel analysis or architecture simulation or modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance. *Other names and brands may be claimed as the property of others.

© Copyright 2017 Intel Corporation 38 NewINTEL® XEON® W PROCESSOR Mainstream performance, enhanced memory capabilities, hardware-enhanced security and reliability features for professional workstations.

• Up to 18 cores, 36 threads • Four channel DDR4-2666 ECC memory support • Intel® Turbo Boost Technology 2.0 • Intel® AVX-512 acceleration with up to 2 FMA • Support for LGA 2066 socket • 48 PCI Express 3.0 lanes • Intel® Mesh Architecture • Intel optimized 14nm+ process technology • Rebalanced Intel® smart cache hierarchy • Intel® vPro™ Technology • Intel® Hyper-Threading Technology (Intel® HT Technology) • Intel® Virtual RAID on Chip (Intel® VROC) • Integrated Intel® Ethernet: 1 Gigabit Ethernet

© Copyright 2017 Intel Corporation References: Intel® Advanced Vector Extensions 512 (Intel® AVX-512) 39 Intel’s optimized 14nm+ process technology featuring Processor Manufacturing Process Intel® Mesh Architecture NEW INTEL® XEON® W PROCESSORS Maximum Core Count Supported Up to 18 PERFORMANCE OPTIMIZED FOR MAINSTREAM WORKSTATIONS † Maximum Base Frequency Supported Up to 4.0 GHz Maximum Intel® Turbo Boost Up to 4.5 GHz Technology 2.0 Frequency Supported

Up to 24.75 MB of L3 Cache featuring rebalanced Processor Cache Memory Support Intel® Cache hierarchy

Intel® Turbo Boost 2.0 Technology, Intel® Hyper- Processor Performance Support Threading Technology (Intel® HT), Intel® Speed Shift Technology Up to 48 Lanes Up to Four Channels Intel® Advanced Vector Extension 512 PCI Express* 3.0 Intel® AVX-512 with up to 2 FMA support DDR4 2666 with ECC (Intel® AVX-512) Support

Maximum Number of Processor One Socket Sockets Supported

Thermal Design Point (TDP) Approximately 140 Watts

Socket Type Socket R4 (LGA-2066 Socket)

4 channels of DDR4 2666 MHz 2 DPC DMI System Memory Support RDIMM and LRDIMM with ECC support

PCI Express* 3.0 (Up to 24 lanes) Intel® Manageability Engine 11.10 Maximum System Memory Supported Up to 512GB Supported Chipset Intel® C422 Workstation Chipset Intel® vPro™ Technology USB* 3.0 (Up to 10 ports) PCI Express* 3.0 – Up to 24 lanes USB* 3.0 – Up to 10 ports PCH I/O Intel® Rapid Storage Technology SATA* 3.0 – Up to 8 ports SATA Gen 3 (Up to 8 ports) enterprise (Intel® RSTe) 5.0 DMI – Up to 4 lanes, Gen 3

Integrated Intel® Ethernet Standard Workstation Reliability, Intel® Manageability Engine Intel® ME 11.11 with Intel® Active Management 1 x 1 Gbase-T Serviceability and Availability (Intel® ME) Technology (Intel® AMT) and Intel® vPro™ Technology (RAS) Feature Set Intel® Rapid Storage Technology Intel® RSTe 5.0 and Intel® Virtual RAID on CPU (Intel® enterprise (Intel® RSTe) VROC) Processor, chipset and diagram provided for illustration purposes only

© Copyright 2017 Intel Corporation AVAILABLE IN SINGLE-SOCKET CONFIGURATION ONLY 40