CONTENTS Intellec 4 ...... 2 System Block Diagram ...... 3 Intellec 4 Control Console and Display ...... 4 Systems Software ...... 6 System Specification ...... 7 imm4-42 Central Processor Module ...... 8 imm4-22 Instruction/ Data Storage Module ...... 10 imm4-24 Data Storage Module ...... 12 imm4-72 RAM Control Module ...... 14 imm6-28 RAM Memory Module ...... 16 imm6-26 PROM Memory Module ...... 18 imm4-60 Input/Output Module ...... 20 imm6-76 PROM Programmer Module ...... 22 imm6-70 Universal Prototype Module ...... 24 imm6-72 Module Extender ...... 25

Today, offers the systems designer Every system will contain one CPU and an alternative to expensive minicom­ at least one ROM. While the use of puters or even more expensive random RAMs and Shift Registers is optional, logic systems ... the MCS-4 Micro they will be required for most practical Computer. Utilizing the technologies applications. These circuits make up the and experience gained in becoming the MCS-4 micro computer set, a family world's largest supplier of LSI compo­ of compatible LSI devices that require nents, Intel has made the power of the very little in the way of peripheral digital computer available at the inte­ circuitry to build working systems. In grated circuit level. One LSI circuit in a addition to the basic four devices, two DIP package contains the entire CPU of others, the 4008 and 4009, allow the the micro computer, and when this CPU to be used with standard memory circuit is combined with others to devices such as the 2102 RAM and the provide memory and control programs, 1702A PROM for program storage. This the computer is complete. The smallest eliminates the need for metal­ computer would consist of only two programmed ROMs and allows the user devices, both in DIP packages; when to program his devices himself without combined with I/O circuits and a clock requiring the generation of metal masks. it could function in relatively simple The resulting system operates on a applications. Computers for more com­ 10.8 fLs instruction cycle. The instruction plex applications can be built entirely set itself contains 46 instructions, on one small PC board containing all including Conditional Branching, Jump I/O circuits and clocks. to Subroutine and Indirect Fetching. The The final version of the micro computer system operates in either binary or that is used in your product will consist decimal arithmetic modes; addition of of a combination of two or more two 8-digit numbers is accomplished in basic parts. The 4004 CPU is the heart 850 fLs. The use of a bus allows the of the micro computer and is responsible user to expand the system easily. for all of the basic operations performed One CPU can directly drive up to 32,768- by the system. Data and certain types of ROM and up to 5120 bits of RAM. of programs will be stored in 4002 RAM circuits, while the basic program itself is stored in 4001 ROM circuits. Both the RAMs and ROMs provide I/O capability for the system. In addition, a special 4003 Shift Register can be used for expanding the number of system outputs. Intellec 4, and Micro Computer RAMs are used with special interface Standard Micro Computer Modules: Modules: The introduction of the circuitry to simulate the ROMs that are Micro computer modules are standard MCS-4 micro computer set by Intel has normally used with the MCS-4. Because cards that may be purchased individu­ resulted in the widespread use of new programs can be written into these ally. They are designed to be used with in everything from RAMs very easily, the time associated either the Intellec 4 or a system of your banks to blood analyzers. Available at with debugging programs is shortened own design. Additional Memory, I/O an order of magnitude lower cost than , dramatically. Then when the program is and other standard modules provide the lowest of the minicomputers, Intel's correct it can be transferred to either the expansion capability. MCS-4 micro computer is being used in normal 4001 metal programmed ROMs applications that were not feasible only used with the MCS-4, or optionally into a few short years ago. The use of micro the 1702A PROMs that are becoming computers reduces the task of system increasingly popular with this set. The design to one of writing programs and PROM, Programmable Read Only designing I/O circuits. And since Memory, is a special type of ROM that systems can be drastically changed with can be programmed, erased and few board changes by simply changing reprogrammed, all by the user. the control programs that direct the Intellec 4 Four- Micro Computer micro computer, the problem of obsoles­ Development System: The Intellec 4 cence is reduced. Thus micro computers is a flexible, inexpensive and simple can bri ng new systems to market very method for developing OEM systems. quickly and at a much lower develop­ It is a self-contained system, complete ment cost than previously possible. with 4004 Central Processor, crystal Still, the writing of the micro computer clock, power supplies, displays, control control programs does take time, and panel and finished cabinet. Built around since the programs are contained in a set of compatible boards called micro ROMs, metal programmed by Intel to computer modules, the Intellec is easily your specifications, any mistake in expanded to cover more complex programming is costly and time con­ applications. I/O channels provide sumIng. To minimize the time associated sixteen 4-bit input ports and thirty-two with the writing and debugging of 4-bit output ports-all TTL compatible. programs, Intel has developed the Programs are executed from one of Intellec 4 programming and prototype three 4K program memories. The system system for the MCS-4. Since the Intellec comes with a standard software package system does not use ROMs for program that includes a system monitor and storage, programming errors are easily resident assembler. The programmer and quickly corrected. can prepare his program in mnemonic form, assemble it, and use the monitor to load the assembled program for execu­ tion. Other development tools for the Intellec 4 include a cross assembler and simulator designed to operate on large general purpose computers. Intellec 4: Complete MCS-4 Micro 320 4-Bit Words of Data Storage Computer Development System Memory (Expandable to 2560 4-Bit Allows all Program Development to be Words) done in RAM Memory I/O Expandable to 32 4-Bit Output Standard Software Includes Resident Ports and 16 4-Bit Input Ports System Monitor and Assembler Direct Access to RAM Memory from 5K Eight-Bit Bytes of Program Mem­ Front Panel ory (Switchable in 4K Segments), Crystal Controlled Master System Expandable to 12K Consisting of: Clock 4K Bytes of PROM (Monitor) 4K Bytes of RAM 4K Bytes of PROM

The Intellec 4 is a complete micro com­ The main program memory of the Every Intellec 4 comes with two pieces puter development system for MCS-4 Intellec 4 is the imm6-28 RAM Memory of basic software, the System Monitor micro computer systems. Its modular Module (4096 x 8). It is interfaced to the contained in the 1702As and located on design allows the development of any Processor Module with the imm4-72 the imm4-42 module as described size MCS-4 system, and includes built-in RAM Control Module. Under control of above, and an Assembler. The features that make the development the System Monitor, programs may be Assembler is provided on paper tape process easier than ever before. loaded into the RAM Module and and loaded into and executed from The basic Intellec 4 consists of three executed. This allows software develop­ RAM program memory. micro computer modules (CPU, RAM ment in RAM memory, eliminating the With the PROM Programmer Module, and RAM CONTROL), power supplies, procedure of programming and eraSing the imm6-76, 1702A PROMs may be console and displays, all packaged in PROMs. programmed and verified by the a compact cabinet. The heart of the Expansion of the Intellec 4 may be done Intellec 4. system is the i mm4-42 Control Processor in three areas: program memory, data Module built around the 4004 CPU. storage memory and I/O. Using the 4008 and 4009 interface circuits use imm4-22 expands all three at once­ 1702A PROMs or 1302 ROMs to simu­ program memory to 4096 bytes, data late the 4001 ROMs that are used for storage memory to 2560 4-bit words and program storage in the standard MCS-4 I/O to sixteen input and sixteen output set (the module contains sockets so that ports. Other modules expand only the user may use either 1702A or 1302s certain of the three areas. The imm6-28 at his option). A special set of PROMs RAM Memory Module expands the contains the System Resident Monitor program storage area, the imm4-24 and when these are in place programs Data Storage Module expands data can be loaded into program RAM. Data storage, and the imm4-60 Input/Output storage is provided in four 4002 RAMs Module expands the system I/O. that have capacity for 320 four-bit Additional module locations are avail­ words. A crystal controlled master able in the Intellec 4 so the user may system clock, four 4-bit input ports, develop his own custom interface using eight 4-bit output ports with teletype the imm6-70 Universal Prototype interface and control complete the Module. All necessary control signals, module. data and address buses are present at the connectors of the unused module locations for this expansion. When memory, I/O and custom interfaces are added to the Intellec 4, care should be taken not to exceed the built-in power supply capability of the Intellec 4.

2 DATA I\. I\. CONTROL STORAGE ~ CPU BUS 16PORTV -./ CONSOLE v > MODULE imm4-24

CONSOLE DATA I\. STORAGE CONTROL CPU BUS ~ 16 PORTS) BUS / MODULE imm4-24

.A K 4 PORTS I lk PROM CPU MODULE 41/0 "I imm4-42 MONITOR PORTS I\. 4 PORTS) LP 7\.. INST BUS f--- ...-- f--- i--- CPU BUS CPU BUS - - - i--- ~ AO TO A7 '-/ VV). .A i--- I/O PORTS 14 and 15 i--- MEMORY CONTROL K"I MODULE imm4-72 VI\. COTO C3 * ~

;ATA JDDR

RAM MEMORY - .A MODULE INST ~ imm6-28 - I/O BUS / K8 PORTS I y 'I I/O MODULE imm4-60 CO TO C3 ~ 8 PORTS AO TO A7 v/

INSTRUCTION BUS 0 II 1\. A I/O BUS ) ( 8 PORTS I PROM MEMORY v "I I/O MODULE MODULE imm4-60 imm6-26 " "- (- CO TO C3 CO TO C3 8 PORTS ~ v> v

*Memory control module selects MONITOR, PROM or RAM for EXECUTION.

3 The Control Console directs and monitors all activities of the Intellec 4. Complete processor status and machine cycle conditions are dis­ played, and operational control of all processor activity is provided. Addi­ tional controls facilitating program debugging and hardware checkout are included on the control console.

ADDRESS is a display of the current EXECUTION is a display of the SEARCH ADDRESS CONTROLS: address being accessed in program processor data bus during execution of These switches control SEARCH MODE memory. an instruction. and CMA addressing. (see CMA 1. INDICATORS 0-11 are a display of 10. INDICATORS 0-7 display the con­ 25 and 26) the memory address being displayed tents of the processor bus during X2 18. RUN overrides SEARCH MODE during CMA or SEARCH operations. and X3 execution times. OPERATION. (see CMA and SEARCH ADDRESS 19. NEXT INST. causes search mode to CONTROL, 18-24) LAST RAM/ROM POINTER is a dis­ play of the current RAM and ROM terminate at the next location following STATUS is a display of the operating address pointer. the designated search address. mode of the processor. 11. INDICATORS 0-7 are a display of 20. DECR decrements the address 2. SEARCH COMPLETE indicates the X2 and X3 during the last SRC (send loaded from the ADDRESS/DATA processor has executed instructions register control) command. Validity of switches by one. until the search address and pass this display is indicated by the POINTER 21. INCR increments the address counter settings have been reached. VALID display. (see POINTER VALID 4) loaded from the ADDRESS/DATA (see SEARCH ADDRESS CONTROLS, switches by one. ADDRESS/DATA consists of twelve 17-21 and PASS COUNTER, 17) 22. lOAD loads the address from the switches through which both memory ADDRESS/DATA switches into an 3. CPU indicates the processor is addresses and data are entered during address register for SEARCH MODE or operating. SEARCH and CMA operation. (see CMA operation. 4. POINTER VALID indicates that the SEARCH ADDRESS 18-22 and CMA lAST RAM/ROM POINTER is valid. 25 & 26) TEST (see lAST RAM/ROM POINTER 11) 12. SWITCHES 0-11 are used to enter 23. HOLD sets the processor TEST line INSTRUCTION is a display of the memory addresses for SEARCH MODE to a true or false condition. information contained in the currently and CMA operation. (see SEARCH 24. ONE SHOT momentarily pulses the addressed location in memory. ADDRESS CONTROLS, 18-22 and CMA processor TEST line to a true condition. 23 and 24) 5. INDICATORS 0-3 (M2) and 4-7 (M1) CMA Console Memory Access 13. SWITCHES 0-7 are used to enter are a display of the instruction fetched 25. Enables and disables the console data into RAM PROGRAM MEMORY at M1 and M2 from the location memory access feature. displayed in ADDRESS. (see ADDRESS during a CMA operation. (see CMA 1 ) 25 and 26) 26. WRITE deposits the data in ADDRESS/DATA switches 0-7 in the ACTIVE BANK is a display of the MODE CONTROL consists of three memory address previously loaded from active bank of RAM data storage switches which select the bank of the ADDRESS/DATA switches. memory. program memory from which the processor executes code. RESET CONTROL 6. CM-RAM 0-3 indicators display the 27. RESET causes the processor or the active bank of RAM selected on the 14. MON selects the bank of memory system to be reset, depending upon previous DCl command. containing the system monitor. the MODE 28. 15. RAM selects the RAM program 28. MODE allows either the system or MODE is a display of the active bank memory bank for execution. of program memory. (see MODE the CPU only to be reset. CONTROL 14, 15 and 16) 16. PROM selects the optional PROM program memory for execution. POWER and PROM 7. MON indicates the memory contain­ 29. PROGRAM PROM POWER enables ing the Resident System Monitor is PASS COUNTER the high voltage for PROM program­ active. 17. SWITCHES 0-3 enter the data for ming. successive passes through the search 8. PROM indicates that the PROM 30. PROGRAM PROM is a zero insertion address during a SEARCH OPERATION. program memory bank is active. force socket for the PROM to be 9. RAM indicates the RAM program programmed. memory bank is active. 31. POWER is the master system power switch.

4 Standard Systems and Optional Optional Modules and Accessories Modules: Intellec 4 (imm 4-40A) o I/ O Modules Standard system includes the following o Data Storage Modules modules and accessories: o Instruction/Data Storage Modules o Central Processor Module o PROM Memory Module o Memory Control Module o Universal Prototype Module o RAM Memory Module o Module Extender o PROM Programmer Module o Rack Mounting Kit o Chassis with mother board o Power Supplies o Control and Display Console o Finished Cabinet o Standard Software System Monitor Assembler

6 2 3 4 9 11

/6~·--...,f--31

30

5 The Intellec 4 is supplied with two software products, the Resident System Monitor and the Symbolic Assembler. The System Monitor is permanently located in PROMs located on the CPU module. The Symbolic Assembler is supplied on paper tape and is loaded using the System Monitor.

System Monitor Symbolic Assembler Development Support: Cross Assem­ Loads and Punches Paper Tape Input via Prepunched Paper Tape bler and Simulator: In addition to the Displays and Alters Contents of RAM Output in 4004 Object Code standard software available with the Intellec 4, Intel offers a cross assembler Program Memory The Symbolic Assembler is a two pass and simulator written in FORTRAN IV Loads Constants into RAM Program type. During pass one the assembler constructs a symbol table from the and designed to run on a large scale Memory computer. These programs may be Moves Blocks of Data in RAM source text and generates a source listing. Diagnostics are also printed procured directly from Intel, or alter­ Program Memory during pass one and errors are flagged. natively, designers may contact one of Programs 1602A or 1702A PROMs Operator intervention of the tape reader several nation-wide computer time­ The System Monitor is contained in four and subsequent keyboard entries can sharing services for acces to programs. 1702A PROMs located on the processor be used to edit these errors. Assembler: The MCS-4 cross assem­ module of the Intellec 4, and is executed During pass two the assembler decodes bler generates 4004 object code from when the MODE CONTROL on the instructions, searches tables for symbolic assembly language instruc­ Control Console is set to MON. It ad?resses and generates the program tions. It is designed to operate from operates on the RAM Program Memory object tape. It also prints diagnostics to an interactive terminal. and is used to load programs from flag unrecognized instructions un­ Simulator: The MCS-4 simulator paper tape into RAM Program Memory, defined symbols and off page' provides a software simulation of the or to punch programs already con­ references. system. It tained in RAM Program Memory onto also provides execution monitoring paper tape in either BNPF or hexideci­ commands to aid in program develop­ mal format. The monitor also allows the ment. operator to edit the object code in RAM Program Memory. In this mode locations may be displayed and altered, blocks of program may be moved around, and data or instructions may be entered. The System Monitor also contains the software for programming Intel's 1602A or 1702A PROM through the use of the optional imm6-76 Programmer Module. This module can also be used for duplicating or verifying PROMs already containing programs.

6 Word Size: Data: 4 bits Operating Temp: O°C to 55°C Instruction: 8 or 16 DC Power Vcc=5V ±5%, O~S bits ~~ Supplies: Icc=12A Memory Size: 5K bytes expanda- (Standard VDD = -10V ±5%, ~\C~ ble to 12K bytes in Intellec 4) IDD=1.8A ~C~ three 4K byte mem- S~ ories selectable for AC Power 60Hz, 115 VAC, ~~S execution from the Requirement: 200 Watts control console. (Standard S~S~ Instruction Set: 46, including: con- Intellec 4) ditional branching, Physical Size: Intellec 4: binary and BCD 7" x 17%" x 12%" arithmetic, register Weight: 30 lb. to register and memory reference Standard System Monitor operations. Software: Assembler Machine 10.8f-tsec Cycle Time: Support Cross Assembler Software: Simulator System Clock: Crystal controlled Written in Standard at 750kHz ± 0.01 % Fortran IV I/O Channels: 4 input, expandable to 16. 8 output, expand- able to 48. TTL Compatible Test Line: Single level, under program control. Memory RAM: 1.0f-ts Cycle Time: PROM: 1.7f-ts

The standard Intellec 4 comes with the modules shown. Expansion capability of both I/O and memory to a full MCS-4 system is provided by ______using available locations on the motherboard. ~ ------­ --;l I~- ~ - I ./ I -' ~~J // I C::l

// I .,J- C'::l ,. ~ ,. ~I CPU I

~hh //)

PROM MEMORY MODULE I/O MODULE PROM PROGRAMMER MODULE

Intellec 4 Module Assignments

7 Complete microcomputer system with Sockets for 1K bytes of PROM (Intel the processor, program storage, data 1702A PROM) are provided storage, and I/O in a single module 320 words (4-bit) of data storage The heart of this module is Intel's (Intel 4002) are provided 4004 single chip four-bit parallel Four 4-bit input ports and eight 4-bit processor-p-channel silicon gate output ports (includes TTY interface) MOS Bus oriented expansion of memory Accumulator and sixteen working registers (4-bit) and I/O (maximum of 4K x 8 of pro­ gram storage, 2560 x 4 of data Subroutine nesting up to 3 levels storage, 16 input ports, 48 output CPU interfaces to standard semicon­ ports) ductor memory elements (provided Two phase crystal clock by Intel's standard memory and ,//O interface set 4008/4009)

This 4-bit Central Processor Module is a The heart of the module is Intel's 4004 Data Storage for the CPU module is complete MCS-4 micro computer CPU. This is a single-chip MaS contained in four 4002 RAMs , each with system in itself. This is the main module processor. It interprets and executes 46 a capacity of eighty 4-bit words. Data for Intel's Intellec 4"" systems, but it instructions including decimal arith­ Storage may be expanded to a maxi­ also contains all the elements to make it metic, register to register transfers, and mum of 32 RAMs using two Data a complete free-standing computer: conditional branching. Sixteen 4-bit Storage Modules (imm4-24) . Each RAM the 4004, 4-bit parallel CPU; 320 words index registers are provided and sub­ in the module also contains a 4-bit (4 bits) of data storage; capacity for routines may be nested up to three output port. 1K words (8 bits) of instruction storage; levels. Up to 4K instructions may be The CPU Module contains a total of four I/O ports (4-bit); and a crystal directly addressed, and instruction 4-bit input ports and eight 4-bit output controlled clock. memory can be expanded through bank ports. All I/O ports are TIL compatible. switching. I/O capability may be expanded by the Sockets are provided on the CPU addition of Input/Output Modules module for up to 1 K words of instruction (imm4-60) . A combination of I/O, in­ in PROM memory (using Intel 's 1702A struction storage and data storage programmable and erasable read -only­ expansion is also provided by the In­ memory). Thus systems may be de­ struction/Data Storage Module veloped on a custom basis and the (imm4-22). system personality may be altered All MCS-4 devices used in this module merely by changing a PROM. This CPU are manufactured using Intel's standard module is most advantageously used p-channel silicon gate process. on a free-standing basis when custom Modules use identical pins for Vee, systems are required. GND, VDD , clock, sync, and data bus Intel's 1302 metal mask programmed lines to simplify back plane wiring. The Central Processor Module ROM may be used in place of 1702A complete Intellec 4 system, along with for volume requirements or when it is support software, is available for de­ desirable to mix ROM with PROM in the velopment of 4-bit mi cro computer same system to satisfy semi-custom systems. requirements. To extend the instruction storage capa­ bility, use the PROM Memory Module (imm6-26) to extend up to an additional 4K of memory. Instructions may also be stored in RAM memory using the imm6-28 RAM Memory Module (4K x 8) and the imm4-72 Control Module. The imm4-72 provides complete capability for loading programs into RAM memory and bank switching of instruction memory from the imm4-42 to the imm6-28 for execution.

8 Word Size: Instruction: S or 16 I/O Expansion: To 16 input ports bits (via additional and 4S output ports Data: 4 bits modules) CPU: 4004 CPU I/O Interface: All I/O ports TTL 4-bit accumulator compatible. Bus for Sixteen 4-bit I/O expansion is registers TTL compatible. Subroutine nesting (Positive true logic) to three levels Peripherals: Interface for stan­ I nstruction Set: 46 including con­ dard ASf3 33 ditional branching, teletype is provided bi nary and deci mal MCS-4 one 4004 CPU arithmetic, register Components two 4002-1 RAMs to register, and I/O on Module: two 4002-2 RAMs Memory Size: Instruction: Capa­ one 400S llnterface city for 256 to 1 K one 4009 (Set bytes (S bits) in four sockets for PROM or mask 1702A PROM programmed ROM Board 6.1S"xS.0"x (program memory Dimensions: 0.062" must be purchased Board to be on 0.5" separately) centers min Data Storage: 320 words (4 bits) Connector: Dual 50-pin on 0.125" centers Memory Instruction: To a Connectors in rack Expansion: maximum of 4K must be positioned (via additional bytes in PROM or on 0.5" centers min modules) switchable to addi­ Wirewrap tional 4K bytes in P / N CS001 00 from RAM through SAE special control card PIN Data: To 2560 words VPB01C50EOOA1 Memory Instruction Storage: from CDC Interface: TTL compatible Operating Temp: O°C to 55°C MOS via Intel's Power 400S/4009 Vcc= +5V ±5% Requirement: Data Storage: MOS Icc = 1.2A max, O.SA Typical via 4004 CPU data bus VDD = -10V ±5% IDD=0.2A max, System Clock: Crystal controlled, 0.1 A Typical 750kHz (±0.01 %) Support Cross Assembler Processor Cycle Software: Simulator Time: 10.SfLS Written in I/O Channels: Four 4-bit input FORTRAN IV ports, eight 4-bit latching output ports

FOUR 4-BIT CM RAM LINES RAM OUTPUT PORTS * *(ALL RAM OUTPUT PORTS ARE COMPLEMENT) I I I ! I I CM RAM o 1 2 3 o 1 2 3 LINE t t t t 1}}}t TWO PHASE FOUR 40025 TEST CRYSTAL 4004 CPU 320 WORDS x 4 BITS LINE ...... -- CLOCK r- DATA STORAGE (750kHz) It 2 • ,1. CLOCKS (cp" CP2) SYNC RESE T LINE /4 4-BIT , DATA BUS

t ~ ~ ~ ~ ~ • FOUR INPUT O}1 4-BIT 4008 INSTRUCTION Ao-A7 ,8 ,8 4009 ADDRESS STORAGE MUX ~ 2 INPUT CM-R OM ~ , , I/O DEVICE LATCH lkx8 3 . PORTS ~ ~ 4-BIT CHIP L4 ,4 IN OUT I/O EXPANSION BUS EN BL SELECT , DECODING • ~ FOUR --~ --~ ~ ~ 4-BIT Co - C:3 /4 Co-C3 ,4 OUTPUT t OUTPUT , I/O , -- LATCHES PORTS SELECT ~ ~} DECODING ~ I Co-C3 Ao-A7! INSTRUCTIONS i FROM MEMORY MEMORY Do-D7 ADDRESS I FOR MEMORY EXPANSION imm4-42 Block Diagram 9 Sockets for up to four 1702A PROMs (1024 words of program storage) Four 4002 RAMs (320 words of data storage) Four 4-Bit Input Ports (16 bits) Eight 4-Bit Latching Output Ports (32 bits) Direct Interface with imm4-42 Central Processor Module

The imm4-22 Instruction/Data Storage Module provides the most economical approach for program/ data storage memory and I/O expansion of your Intellec 4 or custom MCS-4 system. Each imm4-22 contains both program memory and data storage memory as well as associated I/O ports. Up to 1024 eight-bit words of program storage may be had in the form of 1702A PROMs or 1302 ROMs which plug into four available sockets on the imm4-22 module. The module comes with four 4002 RAMs for 320 4-bit words of data Instruction/Data Storage Module storage. Each 4004 RAM contains a 4-bit latching output po rt; and, in addition, there are four each input and output ports which interface directly with a Central Processor Module. A complete system of 4096 words of program storage, 128 words of data storage, 16 input ports and 32 output ports may be assembled with only one imm4-42 Central Processor Module and three imm4-22 Instruction/Data Storage Modules.

10 Word Size: Program Memory: Connector: Dual 50-pin on B bits 0.125" centers. Data Memory: Connectors in rack 4 bits must be positioned Memory Program Storage: on 0.5" centers min Capacity: 1024 words Wirewrap Data Storage: PIN CB00100 320 words from SAE PIN MCS-4 two 4002-1 RAMs VPB01 C50EOOA 1 Components two 4002-2 RAMs from CDC on Module: four sockets for Board 6.1B" x B.O" x 1702 PROMs Dimensions: 0.062". Board to be on 0.5" I/O Capacity: Program Memory centers min. Associated: Four 4-bit input ports and four 4-bit latch­ DC Power Vcc= +5V ±5% ing output ports Requirement: Icc = 1.4A max., Data Storage: O.BA Typical * Four 4-bit latching VDD = -10V ±5% output ports IDD=0.5A max., o. 25A Typical * *Includes four C1702As

FOUR 4-BIT RAM OUTPUT PORTS* I 1 10 1 2 3 CM RAM LINE ~

FOUR 4002s 320 x 4 DATA STORAGE

CLOCKS(4)~~:~ ____----.-Jt t I RESET j ~BITDATABUS~.~--~.~----~;r(~4------~ 0 0-03 I/Oo-I/~ ...-I-4 __ ..... ~ ____-----4 8 INSTRUCTION 8 1 FOUR STORAGE ~~...... 0'0-07 INPUT O} 4-BIT 1k x 8 INSTRUCTION MUX 2 INPUT :~~~E~~ {AO_A7 FROM MEMORY PORTS 3

Co-~ +-4...... CHIP SELECT DECODING

1 FOUR OUTPUT O} 4-BIT 1...... ----+------1.1 I/O SELECT ..,...... ,,..4______...... LATCHES 2 OUTPUT DECODING PORTS 3 ENBL _____.....J i i *RAM OUTPUT PORTS ARE COMPLEMENT LOGIC imm4-22 Block Diagram

11 Up to sixteen 4002 RAMs (1 280 4-bit words of Read/Write data storage) Up to sixteen 4-bit Latching Output Ports (64 bits) On-board decoding for system expansion to 32 4002 RAMs (2560 4-bit words)

The imm4-24 Data Storage Module is designed to provide data storage and output capability for an MCS-4 system. The module initially contains one bank of four 4002 RAMs (320 4-bit words) . This may be expanded to four banks totaling 1280 words of storage. Each 4002 RAM has a 4-bit latching output port bui lt in . For a full comple­ ment of 4002 RAM s there are 64 bits of output organized as si xteen 4-bit outputs. The imm4-24 is designed for a direct interface with the imm4-42 Central Processor Module. In systems Data Storage Module requiring larger amounts of storage than 1280 words, decoding on the imm4-24 module allows the user to expand his total storage to 2560 4-bit words using two imm4-24 Data Storage Modules.

12 Word Size: 4 bits Connector: Dual SO-pin on Storage 1280 words (Four 0.12S" centers. Capacity: 4002 RAMs in­ Connectors in rack cluded on module. must be positioned Twelve additional on O.S" centers min. 4002 RAMs may be Wirewrap added to the PIN C800100 module. Each 4002 from SAE RAM contains one PIN 4-bit latching VPB01CSOEOOA1 output port.) from CDC MCS-4 components Ribbon Type on module: four PIN 3417 from 3M 4002-1 RAMs, Board 6.18" x 8.0" x twelve additional Dimensions: 0.062". Board to be sockets for 4002 on O.S" centers min. RAMs. Output Capacity: Sixteen 4-bit ports Operating (64 bits) Temperature: DC Power Vcc= +SV ±S% Requirement: Icc=0.6A max., 0.3A typical VDD = -10V ±S% IDD=0.6A max., 0.3A typical

SIXTEEN - 4-BIT OUTPUT PORTS I I PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT o 1 2 3 456 7 8 9 10 11 12 13 14 15 ~t. t. t. t. t. t. t. t. -t.-t.t.t. {. t. t. t. BANK 0 BANK 1 BANK 2 BANK 3 FOUR 4002 RAMs FOUR 4002 RAMs FOUR 4002 RAMs FOUR 4002 RAMs

,~ Il ~ Il 'Il Il 'Il

CLOCKS ,2 (¢1. ¢2) , RESET SYNC _ .. DATA BUS - L 0 0-03 '4

FP ENBL CM RAM 0 MEMORY EXPANSION CM RAM 1 .. CONTROL CM RAM 2 • LOGIC CM RAM 3 --'". Imm4-24 Block Diagram

13 Complete interface for imm4-42 Central Processor Module to imm6-28 RAM Memory Module Facilitates program development in random access read/write memory for M CS-4 systems Capability of direct access to program memory Provides direct access to 4k bytes of RAM with ability to alter any location Controls selection of three separate Program Memories (2 PROM Mem­ ories, 1 RAM Memory)

The imm4-72 RAM Control Module gives Only one of the three memories may be the MCS-4 the convenience of random selected as executable program memory access read/write program memory at anyone time and the imm4-72 with complete freedom to select anyone Module controls this selection. In ad­ of three separate memories. Memory dition, the imm4-72 handles all read/ No.1 is located on the imm4-42 Central write communication between processor Processor Module and is 1024 x 8 bits and random access memory. Selection in size. It may be composed of one to of a memory module also generates a four 1702A PROMs. In use it may master reset so that execution of contain a user program or a system program in the selected module begins executive monitor as in the case of the at location zero. One further mode of Intellec 4. Memory No.2 is a random operation is provided, that of direct access read/write memory 4096 x 8 bits access to memory. The imm4-72 allows in size. This memory is a separate the direct examination of any location module, the imm6-28 RAM Memory of the selected memory. Altering loca­ Module. When it is selected it may be tions in read/write RAM may also be used as both executable program accomplished through this direct access memory and data storage. Since this to memory. This permits loading and memory may be loaded under program reading of the 4096 bytes of RAM control it becomes extremely useful for directly. program development since it bypasses the steps of programming and erasing PROMs. Memory NO.3 is an imm6-26 PROM Memory Module. It may be composed of from one to sixteen 1702A PROMs or 1302 ROMs for from 256 to 4096 bytes of instruction. It may contain a user program or a utility program, such as an assembler.

14 r-pD 7 .. PD 6 ~ DTM 7 PD 5 --- DTM6 DATA FROM PD 4 DTM 5 FRONT PANEL - .. PD 3 ·.- DTM4 DATA TO -"" PD 2 DATA DTM3 MEMORY PD 1 • DTM 2 .. MUX L-PD 0 .- DTM 1 DTMO r-DFM 7 .. DFM 6 .- .. DFM 5 .- DATA FROM DFM4 .. DATA MEMORY - DFM 3 ~ MUX DFM 2 .- DFM 1 .~ t DFMO '-- - l r DATA FROM liDO} TO CPU --- I/O 3 ... ADDRESS C 2 ..... UPPER {C3 ADDRESS FROM CPU C 1 .. MUX CO ---· MAD 11 CMA ADDRESS .....--- PA 10 ~ FROM MAD 10 FRONT PANEL fA"PA 9 ~ MAD 9 PA 8 ..· MAD 8 MONITOR --" MONITOR INDICATOR RAM MEM RAM INDICATOR

PROM MEM ~ PROM INDICATOR . CONTROL BUS HOLD CONTROL --" DMAWRITE ~ ENBL MONITOR LOGIC ADDRESS F/L --~ ENBL PROM WRITE ENBL RAM TO .. MEMORY WEN .- BYTE 1 -PA7 .. .- MAD 7 SYS RESET BYTE 2 ..... PA6 ... MAD 6 PA 5 --~ - MAD 5 CMA ADDRESS PA4 ... MAD 4 FROM FRONT - PA3 ~ MAD 3 PANEL - PA 2 .. MAD 2 PA 1 ...- MAD 1 ... LOWER PAO .-... MAD 0 '-F- A7 .. ADDRESS Au ---.. MUX As ~ ADDRESS _ ~ ..--.. FROM CPU ~ A3 ..... A2 .. A, ~

--'" ~Ao ~ imm4-72 Block Diagram

15 4096 8-bit bytes per module Static memory, no clocks required Interfaces with imm4-42 4-bit Central Processor Module Single + 5V power supply Low power requirements Provides Intellec 4 with 4K bytes of read/write program memory

The imm6-28 RAM Memory Module is a standard 4K x 8 memory module de­ signed for use with the Intellec 4 Micro­ computer Development System. This module contains address and data buffers, read/write timing circuits and is implemented with Intel's 2102 1K x 1 static RAM . This basic memory module is organized as 4096 x 8. When used with the imm4-42 4-bit Central Processor Module in the Intellec 4, the imm6-28 becomes a read/write program memory. This feature in the Intellec 4 greatly enhances the user's RAM Memory Module ability to quickly develop programs and bypasses the step of programming PROMs.

16 RiW ~ READ/ BYTE 1 WRITE .. CONTROL ~ BYTE 2 - J

DBO ~ MDO

DB1 MD1

DB2 MD2

-'" 8 8 DB3 ~ MEMORY ARRAY MD3 INPUT I / OUTPUT , I DB4 ~ BUFFER BUFFER -'" 4096 x 8 - MD4 DB5 ---.. MD5 ... DB6 - MD6 DB7 -..... MD7 DATA TO D ATA MEMORY F ROM • M EMORY MAD 12 --..

MAD 12 MODULE SELECT MAD 13

MAD 13 --- .. MAD 14 - MAD 14 ~ MODULE ~ MAD 15 ~ SELECT LOGIC ADDRESS BUFFER MAD 15 ------.. , , , MS12 ~ ~ 'I' I'

MS13 ~ MS 14 .. 1 MAD 0 MAD 1 MAD 2 MAD 3 MAD 4 MAD 5 MAD 6 MAD 7 MAD 8 MAD 9 MAD 10 MAD 11 MS15 MEMORY ADDRESS RAM j MOD ENBL ADR STB 1 ImmS-28 Block Diagram

17 Provides sockets for up to sixteen PROMs (4096 x 8) Static memory, no clocks required Interfaces directly with imm4-42 4-bit Central Processor Module Accepts Intel 1602A or 1702A PROMs or 1302 ROMs

The imm6-26 PROM Memory Module provides a capacity for up to 4096 instructions for MCS-4 systems. It interfaces directly with the imm4-42 4-bit Central Processor Module. Each PROM Memory Module has sockets for from one to sixteen of Intel's 1602A or 1702A PROMs. In addition, the 1302 mask programmed ROM may be used in place of the PROMs in OEM applications.

PROM Memory Module

18 Memory Size: 4K bytes Board 6.1S"xS.0"x Word Length: S bits Dimensions: 0.062". Board to be on 0.5" centers min. Interface: TTL compatible inputs; open col­ lector outputs Operating (positive true logic) Temperature: Capacity: 256 to 4096 bytes in DC Power Vcc= +5V ±5% 256 byte increments Requirement: Icc = 1.6A max., Connector: 1.1 A typical' Dual 50-pin on V = -1 OV ±5% 0.125" centers. DD Connectors in rack IDD=1.6A max., must be positioned 1 .OA typical' on 0.5" centers min. Wirewrap 'Board loaded with all 16 PROMs. PIN CS00100 2PROMs or ROMs not included with from SAE board. PIN VPB01C50EOOA1 from CDC

MAD 0 ...

MAD 1 --'"

MAD 2 ... ,,8 MAD 3~ ADDRESS

~ BUFFER MAD 4 ~ MDO MAD 5 -'" ~ MD1 ... MAD 6 --.. 1-----.. MD2 MAD 7~ ~ MD3 MEMORY ,,8 DATA ARRAY BUFFER ~ MD4

~---.. MD5 MAD 8 .. ~ MD6 MAD 9~ CHIP ,16 256 x 8 SELECT , TO !------.. MD7 MAD 1O~ LOGIC 4096 x 8 MAD 1 1 .. DATA FROM 'I' MEMORY

MAD 12 ~ MAD 12 -- MAD 13 .. MODULE SELECT MAD 13 - RAM - MOD MAD 14 ----. ENBL MAD 14 ----- MODULE MAD 15 ~ SELECT LOGIC MAD 15 -----

MS12 ...

MS 13 ~

MS 14 ~

MS15 ~

PROM MOD ENBL • imm6·26 Block Diagram

19 Eight 4-Bit Input Ports (32 lines) Eight 4-Bit Latching Output Ports (32 lines) TTL Compatible Direct Interface with imm4-42 Central Processor Module Easy Expansion to Full Complement of 110 with On-board Decoding 110 Expansion without Additional Memory

The imm4-60 Input/Output Module provides eight 4-bit input ports and eight 4-bit latching output ports for use with the imm4-42 Central Processor Module. This module allows expansion of I/O capability of an Intellec 4 or custom MCS-4 system without additional memory. On-board decoding permits a maximum of two I/O modules to be interfaced with the imm4-42 Central Processor Module for up to sixteen 4-bit input ports and sixteen 4-bit latching output ports. In this configuration the lower four input and output ports on one Input/Output Module I/O module are suppressed because the . ports located on the imm4-42 take precedence. All I/O lines are available at the top of the module and all are TTL compatible.

20 Word Size: 4 bits Board 6.1S" x S.O" x Capacity: Eight 4-bit input Dimensions: 0.062". Board to be ports; eight 4-bit on 0.5" centers min. latching output ports Interface: TTL compatible Operating Connector: Dual 50-pin on Temperature: 0.125" centers. DC Power Vcc = +5V ±5%, Connectors in rack Requirement: Icc = 0.9 A max., must be positioned 0.5 A typical on 0.5" centers min. Wirewrap PIN CS00100 from SAE PIN VPB01 C50E­ OOA 1 from CDC Ribbon Type PIN 3417 from 3M

iN OUT

,It ,,5 ADDRESS 7 I/O PORT /3 SELECT I

/3 f

/4 /4 PORT 0 } • * , PORT 0 /4 /4 PORT 1 PORT 1 , I /4 PORT 2 ~4 ; • I PORT 2 /4 /4 EIGHT 4-BIT PORT 3 PORT 3 , INPUT OUTPUT EIGHT 4-BIT INPUT " /4 MUX LATCHES /4 OUTPUT PORTS PORT 4 } • , PORT 4 PORTS /4 ~4 PORT5 PORT5 } • I /4 PORT 6 ; ~4 , PORT6 .L4~ • -.. BUFFER /4 7 /4 PORT 7 , ~ , PORT 7

/4 / I/O 0 TO I/O 3

imm4-60 Block Diagram

21 High speed programming of Intel's 1702A or 1602A PROM All necessary timing and level shifting included Direct interface with Intel's Intellec 4 Micro 'computer Development System

The imm6-76 PROM Programmer The software to control this module is Module provides all necessary hardware contained in the four existing PROMs of for PROM programming capability for the executive monitor. This software is the Intellec 4 micro computer develop­ specifically written for the Intellec 4 ment system. and allows both programming and This module slips into the Intellec 4 and verification of 1602A and 1702A provides all connections to the zero PROMs. In addition, the contents of any insertion force socket on the front panel. PROM may be listed or loaded into All required timing and level shifting is memory for duplication. accomplished on the module utilizing The imm6-76 may also be used as a the high voltage power supply already stand alone PROM programmer with located in the Intellec 4. toggle switches or with another com­ puter providing data address and control signals.

22 System All inputs and Connector: Dual SO-pin on Interface: outputs are TTL 0.12S" centers. compatible and Connectors in rack available at the must be positioned ribbon connector at on O.S" centers the top of the min. module. Control for Wirewrap either "True" or PIN CS00100 "False" data is from SAE provided. Direct PIN interface to VPB01 CSOEOOA 1 Intellec 4. from CDC Ribbon Type Control Contained in the PIN 3417from 3M Software: Intellec 4 executive Board 6.1S" x S.O" x monitor. Dimensions: 0.062". Board to be on O.S" centers min.

Operating Temperature: DC Power Vee = +SV ±S%, Requirements: lee = O.SA max., O.SA typical VDD = -9V ±S%, IDD = 0.1A max., O.OSA typical

A.C. Power Vp = SOVRMS Requirement: Ip = 1.0A max.

ADDRESS ADDR (0-7 ) £8 ., } BUFFERS ,8 AND I ADR OUT

ADDR CTL ~ LEVEL (0-7) SHIFTERS .- Vccs

,5 CONTROL BUS I ~ GND---' PRGM POWER ~ ,4 V ---. SUPPLY CS (0-3 ) I cc ~ Voo /GND PROGRAM REGULATOR PULSE Voo-----' ~ VBB TO PROM CONTROL ,,4 TIMING BUFFERS STAT (0-3) Vp ------. AND LEVEL VGG INTERFACE I 1-----. SHIFTERS 1-----. CS

,8 _ Vccs DATA IN (0-7) ',8 DATA OUT (0-7) , DATA DATA OUT CTL .... BUFFERS ,8 - AND I DATA (0-7) DATA OUT ENBL I11III LEVEL SHIFTERS DATA IN CTL

DATA IN ENBL ~ Imm6-76 Block Diagram

23 Provides breadboard capability for Capacity for SO 1S-pin or 14-pin developing custom interfaces sockets or 24 24-pin sockets Standard size of all micro computer All power is bused on board. Pins on modules PC connector and pins to individual 3M 40-pin ribbon connector on top of sockets are uncommitted for maxi­ module provides direct I/O connec­ mum flexibility tions Will accept standard wirewrap sockets with 0.1 in. x 0.3 in. or 0.1 in. x O.S in. lead spacing

The imm6-70 Universal Prototype Module is a standard size microcom­ puter module with power buses which interface with the Intellec 4. It provides a standard format for phototyping both customer interface and system control. I/O interface is provided through ribbon­ type connectors on the top of the module. The module will accept dual in-line packaged components having pin center-to-center dimensions of 0.100 inch by 0.300 inch or 0.100 inch by Universal Prototype Module 0.600 inch. These parts should be mounted in standard wirewrap sockets.

Capacity: 60 16-pin or 14-pin sockets or 24 24-pin sockets. Standard wirewrap sockets with pi ns on 0.100" by 0.300" centers or 0.100" by 0.600" centers. Board spacing dependent on com­ ponents and sockets used. Connector: Dual 50-pin on 0.125" centers. Wirewrap PIN CB00100 from SAE PIN VPB01 C50EOOA 1 from CDC Ribbon Type PIN 3417 from 3M Board 6.1B" x B.O" x Dimensions: 0.062". Board to be on 0.5" centers min.

24 Allows any module to be extended for ease of debugging, testing, and maintenance Standard dual 50-pin configuration for use with all micro computer modules

The imm6-72 Module Extender is de­ signed to be used with the Intellec 4. It allows the operator to extend any module out of the cage for servicing while maintaining all electrical connections.

Module Extender

Connector: Dual 50-pin on 0.125" centers. Connectors in rack must be positioned on 0.5" centers min. Wirewrap PIN CS001 00 from SAE PI N VPB01 C50E­ OOA 1 from CDC Extending con­ nector is mounted on board. Board 6.1S" x S.O" x Dimensions : 0.062". Board to be on 0.5" centers min.

25 inter INTEL CORPORATION • 3065 Bowers Ave., Santa Clara, California 95051 • (408) 246-7501

'1974. Printed in U.S.A. MCS-027-174/25K